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| author | Mulin Chao <MLChao@nuvoton.com> | 2018-03-26 13:25:45 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-04-01 20:58:47 -0700 |
| commit | 4da2dfcbec94cac411ec73910dcabbc62a44f90d (patch) | |
| tree | bb24d7fd9ef32ecb5a2804fcc48617460f5dbc97 /chip/npcx/hwtimer_chip.h | |
| parent | ba20a766609679648e92c5fd1cd209b5b6c8483f (diff) | |
| download | chrome-ec-4da2dfcbec94cac411ec73910dcabbc62a44f90d.tar.gz | |
npcx: lpc: fixed bug that ec gets stuck in lpc_sib_wait_hostxx routines.
If an ITIM32 timeout event occurred during lpc_sib_wait_host_read_done()
and lpc_sib_wait_host_write_done() routines, in rare case, ec might have
a chance to gets stuck since ec's interrupts are disabled when CSWR/CSRD
bits are high forever. (Normally, CSWR/CSRD bits won't be always high.
These bits are high forever also means something wrong on LPC/eSPI
bus.)
In order to prevent this situation, the CL checks TO_STS bit of ITCTS
in these routines. If this bit is set, restoring ITIM32 preload counter
value to maximum value and processing overflow will be done by
force_time().
BRANCH=eve,fizz,poppy
BUG=b:76182199
TEST=No build errors for npcx series. Passed test command of CL 979389
on npcx_evb. No symptom occurred during warm reset stress test on
soraka.
Change-Id: Ic645f7c5a2a1e49a3c1f3d7e089dd66b4bb75ac6
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/979874
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Diffstat (limited to 'chip/npcx/hwtimer_chip.h')
| -rw-r--r-- | chip/npcx/hwtimer_chip.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/chip/npcx/hwtimer_chip.h b/chip/npcx/hwtimer_chip.h index 08cf8e278f..3b00b0dea5 100644 --- a/chip/npcx/hwtimer_chip.h +++ b/chip/npcx/hwtimer_chip.h @@ -32,4 +32,7 @@ uint16_t __hw_clock_event_count(void); /* Returns time delay because of deep idle */ uint32_t __hw_clock_get_sleep_time(uint16_t pre_evt_cnt); +/* Handle ITIM32 overflow if interrupt is disabled */ +void __hw_clock_handle_overflow(uint32_t clksrc_high); + #endif /* __CROS_EC_HWTIMER_CHIP_H */ |