diff options
| author | Vincent Palatin <vpalatin@chromium.org> | 2015-04-10 17:30:29 -0700 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-04-11 03:11:02 +0000 |
| commit | 007fadda59dc617976eb87bcc325af7453d11a53 (patch) | |
| tree | 4f95b88f73fa1966ad2023ad68727fa8b659ba8d /chip/stm32/adc-stm32f0.c | |
| parent | 72ca4cc9f9460c0637ea786af9f35e64c5b3da12 (diff) | |
| download | chrome-ec-007fadda59dc617976eb87bcc325af7453d11a53.tar.gz | |
stm32f0: make ADC watchdog feature modular
The ADC watchdog is about 2/3 of the ADC code size and it is not
optimized out when not used because adc_read_channel() needs to
stop/restart the watchdog if somebody is using it.
The feature is enabled by default to keep the current behavior on
STM32F0 platform, and it is turned off on samus_pd :
This is saving 448 bytes of flash (and 8 bytes of RAM).
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=make buildall and check the firmware size before and after.
when CONFIG_ADC_WATCHDOG is disabled, adc_enable_watchdog() is not
compiled if there is any user the build will fail.
Change-Id: Ie2450bc2a8fd97662322fd3ce87e93c3fece6c6f
Reviewed-on: https://chromium-review.googlesource.com/265303
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'chip/stm32/adc-stm32f0.c')
| -rw-r--r-- | chip/stm32/adc-stm32f0.c | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/chip/stm32/adc-stm32f0.c b/chip/stm32/adc-stm32f0.c index 6fdabc0789..c6e1d94b62 100644 --- a/chip/stm32/adc-stm32f0.c +++ b/chip/stm32/adc-stm32f0.c @@ -18,9 +18,6 @@ struct mutex adc_lock; -static int watchdog_ain_id; -static int watchdog_delay_ms; - static const struct dma_option dma_adc_option = { STM32_DMAC_ADC, (void *)&STM32_ADC_DR, STM32_DMA_CCR_MSIZE_32_BIT | STM32_DMA_CCR_PSIZE_32_BIT, @@ -35,6 +32,11 @@ static void adc_configure(int ain_id) STM32_ADC_CFGR1 &= ~0x1; } +#ifdef CONFIG_ADC_WATCHDOG + +static int watchdog_ain_id; +static int watchdog_delay_ms; + static void adc_continuous_read(int ain_id) { adc_configure(ain_id); @@ -193,6 +195,14 @@ int adc_set_watchdog_delay(int delay_ms) return EC_SUCCESS; } +#else /* CONFIG_ADC_WATCHDOG */ + +static int adc_watchdog_enabled(void) { return 0; } +static int adc_enable_watchdog_no_lock(void) { return 0; } +static int adc_disable_watchdog_no_lock(void) { return 0; } + +#endif /* CONFIG_ADC_WATCHDOG */ + int adc_read_channel(enum adc_channel ch) { const struct adc_t *adc = adc_channels + ch; |