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authorTom Hughes <tomhughes@chromium.org>2022-09-21 14:10:01 -0700
committerTom Hughes <tomhughes@chromium.org>2022-09-22 12:49:33 -0700
commit2bcf863b492fe7ed8105c853814dba6ed32ba719 (patch)
treefcf6ce5810f9ff9e3c8cce434812dd75492269ed /chip/stm32/adc-stm32l4.c
parente5fb0b9ba488614b5684e640530f00821ab7b943 (diff)
parent28712dae9d7ed1e694f7622cc083afa71090d4d5 (diff)
downloadchrome-ec-firmware-fpmcu-bloonchipper-release.tar.gz
Merge remote-tracking branch cros/main into firmware-fpmcu-bloonchipper-releasefirmware-fpmcu-bloonchipper-release
Generated by: ./util/update_release_branch.py --board bloonchipper --relevant_paths_file ./util/fingerprint-relevant-paths.txt firmware- fpmcu-bloonchipper-release Relevant changes: git log --oneline e5fb0b9ba4..28712dae9d -- board/hatch_fp board/bloonchipper common/fpsensor docs/fingerprint driver/fingerprint util/getversion.sh ded9307b79 util/getversion.sh: Fix version when not in a git repo 956055e692 board: change Google USB vendor info 71b2ef709d Update license boilerplate text in source code files 33e11afda0 Revert "fpsensor: Build fpsensor source file with C++" c8d0360723 fpsensor: Build fpsensor source file with C++ bc113abd53 fpsensor: Fix g++ compiler error 150a58a0dc fpsensor: Fix fp_set_sensor_mode return type b33b5ce85b fpsensor: Remove nested designators for C++ compatibility 2e864b2539 tree-wide: const-ify argv for console commands 56d8b360f9 test: Add test for get ikm failure when seed not set 3a3d6c3690 test: Add test for fpsensor trivial key failure 233e6bbd08 fpsensor_crypto: Abstract calls to hmac_SHA256 0a041b285b docs/fingerprint: Typo correction c03fab67e2 docs/fingerprint: Fix the path of fputils.py 0b5d4baf5a util/getversion.sh: Fix empty file list handling 6e128fe760 FPMCU dev board environment with Satlab 3eb29b6aa5 builtin: Move ssize_t to sys/types.h 345d62ebd1 docs/fingerprint: Update power numbers for latest dartmonkey release c25ffdb316 common: Conditionally support printf %l and %i modifiers 9a3c514b45 test: Add a test to check if the debugger is connected 54e603413f Move standard library tests to their own file 43fa6b4bf8 docs/fingerprint: Update power numbers for latest bloonchipper release 25536f9a84 driver/fingerprint/fpc/bep/fpc_sensor_spi.c: Format with clang-format 4face99efd driver/fingerprint/fpc/libfp/fpc_sensor_pal.h: Format with clang-format 738de2b575 trng: Rename rand to trng_rand 14b8270edd docs/fingerprint: Update dragonclaw power numbers 0b268f93d1 driver/fingerprint/fpc/libfp/fpc_private.c: Format with clang-format f80da163f2 driver/fingerprint/fpc/libfp/fpc_private.h: Format with clang-format 5e9c85c9b1 driver/fingerprint/fpc/libfp/fpc_sensor_pal.c: Format with clang-format c1f9dd3cf8 driver/fingerprint/fpc/libfp/fpc_bio_algorithm.h: Format with clang-format eb1e1bed8d driver/fingerprint/fpc/libfp/fpc1145_private.h: Format with clang-format 6e7b611821 driver/fingerprint/fpc/bep/fpc_bio_algorithm.h: Format with clang-format e0589cd5e2 driver/fingerprint/fpc/bep/fpc1035_private.h: Format with clang-format 7905e556a0 common/fpsensor/fpsensor_crypto.c: Format with clang-format 21289d170c driver/fingerprint/fpc/bep/fpc1025_private.h: Format with clang-format 98a20f937e common/fpsensor/fpsensor_state.c: Format with clang-format a2d255d8af common/fpsensor/fpsensor.c: Format with clang-format 73055eeb3f driver/fingerprint/fpc/bep/fpc_private.c: Format with clang-format 0f7b5cb509 common/fpsensor/fpsensor_private.h: Format with clang-format 1ceade6e65 driver/fingerprint/fpc/bep/fpc_private.h: Format with clang-format dc3e9008b8 board/hatch_fp/board.h: Format with clang-format dca9d74321 Revert "trng: Rename rand to trng_rand" a6b0b3554f trng: Rename rand to trng_rand 28d0b75b70 third_party/boringssl: Remove unused header BRANCH=None BUG=b:246424843 b:234181908 b:244781166 b:234181908 b:244387210 BUG=b:242720240 chromium:1098010 b:180945056 b:236025198 b:234181908 BUG=b:234181908 b:237344361 b:131913998 b:236386294 b:234143158 BUG=b:234781655 b:215613183 b:242720910 TEST=`make -j buildall` TEST=./test/run_device_tests.py --board bloonchipper Test "aes": PASSED Test "cec": PASSED Test "cortexm_fpu": PASSED Test "crc": PASSED Test "flash_physical": PASSED Test "flash_write_protect": PASSED Test "fpsensor_hw": PASSED Test "fpsensor_spi_ro": PASSED Test "fpsensor_spi_rw": PASSED Test "fpsensor_uart_ro": PASSED Test "fpsensor_uart_rw": PASSED Test "mpu_ro": PASSED Test "mpu_rw": PASSED Test "mutex": PASSED Test "pingpong": PASSED Test "printf": PASSED Test "queue": PASSED Test "rollback_region0": PASSED Test "rollback_region1": PASSED Test "rollback_entropy": PASSED Test "rtc": PASSED Test "sha256": PASSED Test "sha256_unrolled": PASSED Test "static_if": PASSED Test "stdlib": PASSED Test "system_is_locked_wp_on": PASSED Test "system_is_locked_wp_off": PASSED Test "timer_dos": PASSED Test "utils": PASSED Test "utils_str": PASSED Test "stm32f_rtc": PASSED Test "panic_data_bloonchipper_v2.0.4277": PASSED Test "panic_data_bloonchipper_v2.0.5938": PASSED Force-Relevant-Builds: all Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I264ad0ffe7afcd507a1e483c6e934a9c4fea47c3
Diffstat (limited to 'chip/stm32/adc-stm32l4.c')
-rw-r--r--chip/stm32/adc-stm32l4.c40
1 files changed, 21 insertions, 19 deletions
diff --git a/chip/stm32/adc-stm32l4.c b/chip/stm32/adc-stm32l4.c
index 8609d44f5d..e67ae4a8fd 100644
--- a/chip/stm32/adc-stm32l4.c
+++ b/chip/stm32/adc-stm32l4.c
@@ -1,4 +1,4 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -21,7 +21,7 @@ struct adc_profile_t {
/* Register values. */
uint32_t cfgr1_reg;
uint32_t cfgr2_reg;
- uint32_t smpr_reg; /* Default Sampling Rate */
+ uint32_t smpr_reg; /* Default Sampling Rate */
uint32_t ier_reg;
/* DMA config. */
const struct dma_option *dma_option;
@@ -36,11 +36,11 @@ struct adc_profile_t {
#endif
#if defined(CHIP_FAMILY_STM32L4)
-#define ADC_CALIBRATION_TIMEOUT_US 100000U
-#define ADC_ENABLE_TIMEOUT_US 200000U
-#define ADC_CONVERSION_TIMEOUT_US 200000U
+#define ADC_CALIBRATION_TIMEOUT_US 100000U
+#define ADC_ENABLE_TIMEOUT_US 200000U
+#define ADC_CONVERSION_TIMEOUT_US 200000U
-#define NUMBER_OF_ADC_CHANNEL 2
+#define NUMBER_OF_ADC_CHANNEL 2
uint8_t adc1_initialized;
#endif
@@ -51,15 +51,15 @@ uint8_t adc1_initialized;
#endif
static const struct dma_option dma_continuous = {
- STM32_DMAC_ADC, (void *)&STM32_ADC_DR,
+ STM32_DMAC_ADC,
+ (void *)&STM32_ADC_DR,
STM32_DMA_CCR_MSIZE_32_BIT | STM32_DMA_CCR_PSIZE_32_BIT |
- STM32_DMA_CCR_CIRC,
+ STM32_DMA_CCR_CIRC,
};
static const struct adc_profile_t profile = {
/* Sample all channels continuously using DMA */
- .cfgr1_reg = STM32_ADC_CFGR1_OVRMOD |
- STM32_ADC_CFGR1_CONT |
+ .cfgr1_reg = STM32_ADC_CFGR1_OVRMOD | STM32_ADC_CFGR1_CONT |
STM32_ADC_CFGR1_DMACFG,
.cfgr2_reg = 0,
.smpr_reg = CONFIG_ADC_SAMPLE_TIME,
@@ -87,7 +87,7 @@ static void adc_init(const struct adc_t *adc)
/* set ADC clock to 20MHz */
STM32_ADC1_CCR &= ~0x003C0000;
- STM32_ADC1_CCR |= 0x00080000;
+ STM32_ADC1_CCR |= 0x00080000;
STM32_RCC_AHB2ENR |= STM32_RCC_HB2_GPIOA;
STM32_RCC_AHB2ENR |= STM32_RCC_HB2_GPIOB;
@@ -101,13 +101,13 @@ static void adc_init(const struct adc_t *adc)
}
static void adc_configure(int ain_id, int ain_rank,
- enum stm32_adc_smpr sample_rate)
+ enum stm32_adc_smpr sample_rate)
{
/* Select Sampling time and channel to convert */
- if (ain_id <= 10) {
+ if (ain_id <= 10) {
STM32_ADC1_SMPR1 &= ~(7 << ((ain_id - 1) * 3));
STM32_ADC1_SMPR1 |= (sample_rate << ((ain_id - 1) * 3));
- } else {
+ } else {
STM32_ADC1_SMPR2 &= ~(7 << ((ain_id - 11) * 3));
STM32_ADC1_SMPR2 |= (sample_rate << ((ain_id - 11) * 3));
}
@@ -172,7 +172,8 @@ int adc_read_channel(enum adc_channel ch)
/* wait for the end of calibration */
wait_loop_index = ((ADC_CALIBRATION_TIMEOUT_US *
- (CPU_CLOCK / (100000 * 2))) / 10);
+ (CPU_CLOCK / (100000 * 2))) /
+ 10);
while (STM32_ADC1_CR & STM32_ADC1_CR_ADCAL) {
if (wait_loop_index-- == 0)
break;
@@ -181,8 +182,9 @@ int adc_read_channel(enum adc_channel ch)
/* Enable ADC */
STM32_ADC1_ISR |= STM32_ADC1_ISR_ADRDY;
STM32_ADC1_CR |= STM32_ADC1_CR_ADEN;
- wait_loop_index = ((ADC_ENABLE_TIMEOUT_US *
- (CPU_CLOCK / (100000 * 2))) / 10);
+ wait_loop_index =
+ ((ADC_ENABLE_TIMEOUT_US * (CPU_CLOCK / (100000 * 2))) /
+ 10);
while (!(STM32_ADC1_ISR & STM32_ADC1_ISR_ADRDY)) {
wait_loop_index--;
if (wait_loop_index == 0)
@@ -196,8 +198,8 @@ int adc_read_channel(enum adc_channel ch)
STM32_ADC1_CR |= BIT(3); /* JADSTART */
/* Wait for end of injected conversion */
- wait_loop_index = ((ADC_CONVERSION_TIMEOUT_US *
- (CPU_CLOCK / (100000 * 2))) / 10);
+ wait_loop_index =
+ ((ADC_CONVERSION_TIMEOUT_US * (CPU_CLOCK / (100000 * 2))) / 10);
while (!(STM32_ADC1_ISR & BIT(6))) {
if (wait_loop_index-- == 0)
break;