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authorJack Rosenthal <jrosenth@chromium.org>2021-11-04 12:11:58 -0600
committerCommit Bot <commit-bot@chromium.org>2021-11-05 04:22:34 +0000
commit252457d4b21f46889eebad61d4c0a65331919cec (patch)
tree01856c4d31d710b20e85a74c8d7b5836e35c3b98 /chip/stm32/adc_chip.h
parent08f5a1e6fc2c9467230444ac9b582dcf4d9f0068 (diff)
downloadchrome-ec-stabilize-14395.B-ish.tar.gz
In the interest of making long-term branch maintenance incur as little technical debt on us as possible, we should not maintain any files on the branch we are not actually using. This has the added effect of making it extremely clear when merging CLs from the main branch when changes have the possibility to affect us. The follow-on CL adds a convenience script to actually pull updates from the main branch and generate a CL for the update. BUG=b:204206272 BRANCH=ish TEST=make BOARD=arcada_ish && make BOARD=drallion_ish Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Diffstat (limited to 'chip/stm32/adc_chip.h')
-rw-r--r--chip/stm32/adc_chip.h68
1 files changed, 0 insertions, 68 deletions
diff --git a/chip/stm32/adc_chip.h b/chip/stm32/adc_chip.h
deleted file mode 100644
index 7e3c688c14..0000000000
--- a/chip/stm32/adc_chip.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/* Copyright 2012 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* STM32-specific ADC module for Chrome EC */
-
-#ifndef __CROS_EC_ADC_CHIP_H
-#define __CROS_EC_ADC_CHIP_H
-
-#ifdef CHIP_FAMILY_STM32L4
-enum stm32_adc_smpr {
- STM32_ADC_SMPR_DEFAULT = 0,
- STM32_ADC_SMPR_2_5_CY,
- STM32_ADC_SMPR_6_5_CY,
- STM32_ADC_SMPR_12_5_CY,
- STM32_ADC_SMPR_24_5_CY,
- STM32_ADC_SMPR_47_5_CY,
- STM32_ADC_SMPR_92_5_CY,
- STM32_ADC_SMPR_247_5_CY,
- STM32_ADC_SMPR_640_5_CY,
- STM32_ADC_SMPR_COUNT,
-};
-#else
-enum stm32_adc_smpr {
- STM32_ADC_SMPR_DEFAULT = 0,
- STM32_ADC_SMPR_1_5_CY,
- STM32_ADC_SMPR_7_5_CY,
- STM32_ADC_SMPR_13_5_CY,
- STM32_ADC_SMPR_28_5_CY,
- STM32_ADC_SMPR_41_5_CY,
- STM32_ADC_SMPR_55_5_CY,
- STM32_ADC_SMPR_71_5_CY,
- STM32_ADC_SMPR_239_5_CY,
- STM32_ADC_SMPR_COUNT,
-};
-#endif
-
-/* Data structure to define ADC channels. */
-struct adc_t {
- const char *name;
- int factor_mul;
- int factor_div;
- int shift;
- int channel;
-#ifdef CHIP_FAMILY_STM32L4
- int rank;
-#endif
-
-#if defined(CHIP_FAMILY_STM32F0) || defined(CHIP_FAMILY_STM32L4)
- enum stm32_adc_smpr sample_rate; /* Sampling Rate of the channel */
-#endif
-};
-
-/* Disable ADC module when we don't need it anymore. */
-void adc_disable(void);
-
-/* Minimum and maximum values returned by adc_read_channel(). */
-#define ADC_READ_MIN 0
-#define ADC_READ_MAX 4095
-
-/* Just plain id mapping for code readability */
-#define STM32_AIN(x) (x)
-
-/* Add for ADCs with RANK */
-#define STM32_RANK(x) (x)
-
-#endif /* __CROS_EC_ADC_CHIP_H */