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authorJack Rosenthal <jrosenth@chromium.org>2021-11-04 12:11:58 -0600
committerCommit Bot <commit-bot@chromium.org>2021-11-05 04:22:34 +0000
commit252457d4b21f46889eebad61d4c0a65331919cec (patch)
tree01856c4d31d710b20e85a74c8d7b5836e35c3b98 /chip/stm32/config-stm32l100.h
parent08f5a1e6fc2c9467230444ac9b582dcf4d9f0068 (diff)
downloadchrome-ec-stabilize-14526.57.B-ish.tar.gz
In the interest of making long-term branch maintenance incur as little technical debt on us as possible, we should not maintain any files on the branch we are not actually using. This has the added effect of making it extremely clear when merging CLs from the main branch when changes have the possibility to affect us. The follow-on CL adds a convenience script to actually pull updates from the main branch and generate a CL for the update. BUG=b:204206272 BRANCH=ish TEST=make BOARD=arcada_ish && make BOARD=drallion_ish Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Diffstat (limited to 'chip/stm32/config-stm32l100.h')
-rw-r--r--chip/stm32/config-stm32l100.h43
1 files changed, 0 insertions, 43 deletions
diff --git a/chip/stm32/config-stm32l100.h b/chip/stm32/config-stm32l100.h
deleted file mode 100644
index 2c4efcc6df..0000000000
--- a/chip/stm32/config-stm32l100.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/* Copyright 2013 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Memory mapping */
-#define CONFIG_FLASH_SIZE_BYTES 0x00020000
-#define CONFIG_FLASH_BANK_SIZE 0x1000
-#define CONFIG_FLASH_ERASE_SIZE 0x0100 /* erase bank size */
-
-/*
- * TODO(crosbug.com/p/23805): Technically we can write in word-mode (4 bytes at
- * a time), but that's really slow, and older host interfaces which can't ask
- * about the ideal size would then end up writing in that mode instead of the
- * faster page mode. So lie about the write size for now. Once all software
- * (flashrom, u-boot, ectool) which cares has been updated to know about ver.1
- * of EC_CMD_GET_FLASH_INFO, we can remove this workaround.
- */
-#define CONFIG_FLASH_WRITE_SIZE 0x0080
-
-/* Ideal write size in page-mode */
-#define CONFIG_FLASH_WRITE_IDEAL_SIZE 0x0080
-
-#define CONFIG_RAM_BASE 0x20000000
-#define CONFIG_RAM_SIZE 0x00002800
-
-/* Number of IRQ vectors on the NVIC */
-#define CONFIG_IRQ_COUNT 45
-
-/* Flash erases to 0, not 1 */
-#define CONFIG_FLASH_ERASED_VALUE32 0
-
-/* Use DMA for UART receive */
-#define CONFIG_UART_RX_DMA
-
-/* Fake hibernate mode */
-#define CONFIG_STM32L_FAKE_HIBERNATE
-
-/* USB packet ram config */
-#define CONFIG_USB_RAM_BASE 0x40006000
-#define CONFIG_USB_RAM_SIZE 512
-#define CONFIG_USB_RAM_ACCESS_TYPE uint32_t
-#define CONFIG_USB_RAM_ACCESS_SIZE 4