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authorJack Rosenthal <jrosenth@chromium.org>2021-11-04 12:11:58 -0600
committerCommit Bot <commit-bot@chromium.org>2021-11-05 04:22:34 +0000
commit252457d4b21f46889eebad61d4c0a65331919cec (patch)
tree01856c4d31d710b20e85a74c8d7b5836e35c3b98 /chip/stm32/config-stm32l442.h
parent08f5a1e6fc2c9467230444ac9b582dcf4d9f0068 (diff)
downloadchrome-ec-stabilize-14526.57.B-ish.tar.gz
In the interest of making long-term branch maintenance incur as little technical debt on us as possible, we should not maintain any files on the branch we are not actually using. This has the added effect of making it extremely clear when merging CLs from the main branch when changes have the possibility to affect us. The follow-on CL adds a convenience script to actually pull updates from the main branch and generate a CL for the update. BUG=b:204206272 BRANCH=ish TEST=make BOARD=arcada_ish && make BOARD=drallion_ish Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Diffstat (limited to 'chip/stm32/config-stm32l442.h')
-rw-r--r--chip/stm32/config-stm32l442.h24
1 files changed, 0 insertions, 24 deletions
diff --git a/chip/stm32/config-stm32l442.h b/chip/stm32/config-stm32l442.h
deleted file mode 100644
index 54ba9bac8d..0000000000
--- a/chip/stm32/config-stm32l442.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/* Copyright 2017 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Memory mapping */
-#define CONFIG_FLASH_SIZE_BYTES 0x00040000 /* 256 kB */
-#define CONFIG_FLASH_BANK_SIZE 0x800 /* 2 kB */
-#define CONFIG_FLASH_ERASE_SIZE 0x800 /* 2 KB */
-#define CONFIG_FLASH_WRITE_SIZE 0x8 /* 64 bits */
-
-/* Ideal write size in page-mode */
-#define CONFIG_FLASH_WRITE_IDEAL_SIZE 0x100 /* 256 (32 double words) */
-
-/*
- * SRAM1 (48kB) at 0x20000000
- * SRAM2 (16kB) at 0x10000000 (and aliased at 0x2000C000)
- * so they are contiguous.
- */
-#define CONFIG_RAM_BASE 0x20000000
-#define CONFIG_RAM_SIZE 0x00010000 /* 64 kB */
-
-/* Number of IRQ vectors on the NVIC */
-#define CONFIG_IRQ_COUNT 82