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authorJack Rosenthal <jrosenth@chromium.org>2021-11-04 12:11:58 -0600
committerCommit Bot <commit-bot@chromium.org>2021-11-05 04:22:34 +0000
commit252457d4b21f46889eebad61d4c0a65331919cec (patch)
tree01856c4d31d710b20e85a74c8d7b5836e35c3b98 /chip/stm32/crc_hw.h
parent08f5a1e6fc2c9467230444ac9b582dcf4d9f0068 (diff)
downloadchrome-ec-stabilize-14345.B-ish.tar.gz
In the interest of making long-term branch maintenance incur as little technical debt on us as possible, we should not maintain any files on the branch we are not actually using. This has the added effect of making it extremely clear when merging CLs from the main branch when changes have the possibility to affect us. The follow-on CL adds a convenience script to actually pull updates from the main branch and generate a CL for the update. BUG=b:204206272 BRANCH=ish TEST=make BOARD=arcada_ish && make BOARD=drallion_ish Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Diffstat (limited to 'chip/stm32/crc_hw.h')
-rw-r--r--chip/stm32/crc_hw.h41
1 files changed, 0 insertions, 41 deletions
diff --git a/chip/stm32/crc_hw.h b/chip/stm32/crc_hw.h
deleted file mode 100644
index 2a50d5760e..0000000000
--- a/chip/stm32/crc_hw.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/* Copyright 2014 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#ifndef __CROS_EC_CRC_HW_H
-#define __CROS_EC_CRC_HW_H
-/* CRC-32 hardware implementation with USB constants */
-
-#include "clock.h"
-#include "registers.h"
-
-static inline void crc32_init(void)
-{
- /* switch on CRC controller */
- STM32_RCC_AHBENR |= BIT(6); /* switch on CRC controller */
- /* Delay 1 AHB clock cycle after the clock is enabled */
- clock_wait_bus_cycles(BUS_AHB, 1);
- /* reset CRC state */
- STM32_CRC_CR = STM32_CRC_CR_RESET | STM32_CRC_CR_REV_OUT
- | STM32_CRC_CR_REV_IN_WORD;
- while (STM32_CRC_CR & 1)
- ;
-}
-
-static inline void crc32_hash32(uint32_t val)
-{
- STM32_CRC_DR = val;
-}
-
-static inline void crc32_hash16(uint16_t val)
-{
- STM32_CRC_DR16 = val;
-}
-
-static inline uint32_t crc32_result(void)
-{
- return STM32_CRC_DR ^ 0xFFFFFFFF;
-}
-
-#endif /* __CROS_EC_CRC_HW_H */