diff options
| author | Vic Yang <victoryang@chromium.org> | 2014-10-04 18:39:13 +0800 |
|---|---|---|
| committer | chrome-internal-fetch <chrome-internal-fetch@google.com> | 2014-10-07 20:58:52 +0000 |
| commit | bd59d5bfb6a9e6fa116e19f11fe31ae98cc00e88 (patch) | |
| tree | ec9a9a4febd28a2d85c6cc193805d1b308af6b93 /chip/stm32/uart.c | |
| parent | 08c53f231df4d7c09c396b5ccfd021fb64608cbd (diff) | |
| download | chrome-ec-bd59d5bfb6a9e6fa116e19f11fe31ae98cc00e88.tar.gz | |
Add support for STM32F373
This mostly reuses chip drivers for STM32F and STM32F0. Since this chip
doesn't fit either STM32F or STM32F0, let's use symlink to specify which
drivers to use for STM32F3.
This is just the preparatory work and it's not verified on a chip yet.
BUG=chrome-os-partner:32660
TEST=make buildall to make sure this doesn't break anything
BRANCH=None
Change-Id: I709ed49265e8f84552251a97d03b9b98496de99e
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/221412
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'chip/stm32/uart.c')
| -rw-r--r-- | chip/stm32/uart.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/chip/stm32/uart.c b/chip/stm32/uart.c index aa5ea2ffca..67b405fe65 100644 --- a/chip/stm32/uart.c +++ b/chip/stm32/uart.c @@ -197,7 +197,8 @@ static void uart_freq_change(void) int freq; int div; -#if defined(CHIP_FAMILY_STM32F0) && (UARTN <= 2) +#if (defined(CHIP_FAMILY_STM32F0) || defined(CHIP_FAMILY_STM32F3)) && \ + (UARTN <= 2) /* * UART is clocked from HSI (8MHz) to allow it to work when waking * up from sleep @@ -209,7 +210,8 @@ static void uart_freq_change(void) #endif div = DIV_ROUND_NEAREST(freq, CONFIG_UART_BAUD_RATE); -#if defined(CHIP_FAMILY_STM32L) || defined(CHIP_FAMILY_STM32F0) +#if defined(CHIP_FAMILY_STM32L) || defined(CHIP_FAMILY_STM32F0) || \ + defined(CHIP_FAMILY_STM32F3) if (div / 16 > 0) { /* * CPU clock is high enough to support x16 oversampling. @@ -236,13 +238,13 @@ DECLARE_HOOK(HOOK_FREQ_CHANGE, uart_freq_change, HOOK_PRIO_DEFAULT); void uart_init(void) { /* Enable USART clock */ -#ifdef CHIP_FAMILY_STM32F0 +#if defined(CHIP_FAMILY_STM32F0) || defined(CHIP_FAMILY_STM32F3) #if (UARTN == 1) STM32_RCC_CFGR3 |= 0x0003; /* USART1 clock source from HSI(8MHz) */ #elif (UARTN == 2) STM32_RCC_CFGR3 |= 0x030000; /* USART2 clock source from HSI(8MHz) */ #endif /* UARTN */ -#endif /* CHIP_FAMILY_STM32F0 */ +#endif /* CHIP_FAMILY_STM32F0 || CHIP_FAMILY_STM32F3 */ #if (UARTN == 1) STM32_RCC_APB2ENR |= STM32_RCC_PB2_USART1; |