diff options
author | tim <tim2.lin@ite.corp-partner.google.com> | 2020-02-13 14:37:38 +0800 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2020-02-21 09:26:28 +0000 |
commit | 937af456b82fad241049f02d276ad8f66b25a2de (patch) | |
tree | 6a51ca139e49035b49f4fdd82a8d86b2bc962d46 /chip | |
parent | f18b94ab43c8a7fce3aee0077c09fa5608924659 (diff) | |
download | chrome-ec-937af456b82fad241049f02d276ad8f66b25a2de.tar.gz |
it83xx/dac: add DAC module
The DAC module has four channels. We can
set output voltage when DAC channel is
enabled by this driver.
BUG=b:149094279
BRANCH=none
TEST=The console command #dac set as follows:
read: dac [ch]
write: dac [ch] [voltage]
[ch]:2-5, [voltage]:0(disable)-3300
Change-Id: I8e815cb5bc749467581d5f771fd6f9e0995fca3b
Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2046685
Reviewed-by: Diana Z <dzigterman@chromium.org>
Diffstat (limited to 'chip')
-rw-r--r-- | chip/it83xx/build.mk | 1 | ||||
-rw-r--r-- | chip/it83xx/dac.c | 90 | ||||
-rw-r--r-- | chip/it83xx/dac_chip.h | 58 | ||||
-rw-r--r-- | chip/it83xx/registers.h | 8 |
4 files changed, 156 insertions, 1 deletions
diff --git a/chip/it83xx/build.mk b/chip/it83xx/build.mk index 238ce155e2..eb4473f4a9 100644 --- a/chip/it83xx/build.mk +++ b/chip/it83xx/build.mk @@ -27,6 +27,7 @@ chip-$(CONFIG_FPU)+=it83xx_fpu.o endif chip-$(CONFIG_PWM)+=pwm.o chip-$(CONFIG_ADC)+=adc.o +chip-$(CONFIG_DAC)+=dac.o chip-$(CONFIG_HOSTCMD_X86)+=lpc.o ec2i.o chip-$(CONFIG_HOSTCMD_ESPI)+=espi.o chip-$(CONFIG_SPI_MASTER)+=spi_master.o diff --git a/chip/it83xx/dac.c b/chip/it83xx/dac.c new file mode 100644 index 0000000000..695d1cbc68 --- /dev/null +++ b/chip/it83xx/dac.c @@ -0,0 +1,90 @@ +/* Copyright 2020 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* IT83xx DAC module for Chrome EC */ + +#include "console.h" +#include "dac_chip.h" +#include "gpio.h" +#include "hooks.h" +#include "registers.h" +#include "util.h" + +/* DAC module enable */ +void dac_enable_channel(enum chip_dac_channel ch) +{ + IT83XX_DAC_DACPDREG &= ~IT83XX_DAC_POWDN(ch); +} + +/* DAC module disable */ +void dac_disable_channel(enum chip_dac_channel ch) +{ + IT83XX_DAC_DACPDREG |= IT83XX_DAC_POWDN(ch); +} + +/* Set DAC output voltage */ +void dac_set_output_voltage(enum chip_dac_channel ch, int mv) +{ + IT83XX_DAC_DACDAT(ch) = mv * DAC_RAW_DATA / DAC_AVCC; +} + +/* Get DAC output voltage */ +int dac_get_output_voltage(enum chip_dac_channel ch) +{ + return IT83XX_DAC_DACDAT(ch) * DAC_AVCC / DAC_RAW_DATA; +} + +/* DAC module Initialization */ +static void dac_init(void) +{ + /* Configure GPIOs */ + gpio_config_module(MODULE_DAC, 1); +} +DECLARE_HOOK(HOOK_INIT, dac_init, HOOK_PRIO_INIT_DAC); + +static int command_dac(int argc, char **argv) +{ + char *e; + int ch, mv, rv; + + if (argc < 2) + return EC_ERROR_PARAM_COUNT; + + ch = strtoi(argv[1], &e, 0); + if (*e) + return EC_ERROR_PARAM1; + if (ch < 2 || ch > 5) { + ccprintf("ch%d is not supported\n", ch); + return EC_ERROR_PARAM1; + } + + if (argc == 2) { + if (!(IT83XX_DAC_DACPDREG & IT83XX_DAC_POWDN(ch))) { + /* Get DAC output voltage */ + rv = dac_get_output_voltage(ch); + ccprintf("DAC ch%d VOLT=%dmV\n", ch, rv); + } else + ccprintf("The DAC ch%d is powered down.\n", ch); + } else { + /* + * DAC data register raw data + * 0 ~ 0xFF(8-bit) = voltage 0 ~ 3300mV + */ + mv = strtoi(argv[2], &e, 0); + if (*e) + return EC_ERROR_PARAM2; + if (mv) { + /* Set DAC output voltage */ + dac_set_output_voltage(ch, mv); + dac_enable_channel(ch); + } else + dac_disable_channel(ch); + } + + return EC_SUCCESS; +} +DECLARE_CONSOLE_COMMAND(dac, command_dac, + "[ch2-5] [0-3300mV]", + "Enable or disable(0mV) DAC output voltage."); diff --git a/chip/it83xx/dac_chip.h b/chip/it83xx/dac_chip.h new file mode 100644 index 0000000000..fa50769c85 --- /dev/null +++ b/chip/it83xx/dac_chip.h @@ -0,0 +1,58 @@ +/* Copyright 2020 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* IT83xx DAC module for Chrome EC */ + +#ifndef __CROS_EC_DAC_CHIP_H +#define __CROS_EC_DAC_CHIP_H + +#define DAC_AVCC 3300 +/* + * Each channel generates an output ranging + * from 0V to AVCC with 8-bit resolution. + */ +#define DAC_RAW_DATA (BIT(8) - 1) + +/* List of DAC channels. */ +enum chip_dac_channel { + CHIP_DAC_CH2 = 2, + CHIP_DAC_CH3, + CHIP_DAC_CH4, + CHIP_DAC_CH5, +}; + +/** + * DAC module enable. + * + * @param ch Channel to enable. + */ +void dac_enable_channel(enum chip_dac_channel ch); + +/** + * DAC module disable. + * + * @param ch Channel to disable. + */ +void dac_disable_channel(enum chip_dac_channel ch); + +/** + * Set DAC output voltage. + * + * @param ch Channel to set. + * @param mv Setting ch output voltage. + */ +void dac_set_output_voltage(enum chip_dac_channel ch, int mv); + +/** + * Get DAC output voltage. + * + * @param ch Channel to get. + * + * @return Getting ch output voltage. + */ +int dac_get_output_voltage(enum chip_dac_channel ch); + +#endif /* __CROS_EC_DAC_CHIP_H */ + diff --git a/chip/it83xx/registers.h b/chip/it83xx/registers.h index dfa8c2ad11..3eceda91de 100644 --- a/chip/it83xx/registers.h +++ b/chip/it83xx/registers.h @@ -1087,6 +1087,13 @@ enum clock_gate_offsets { #define IT83XX_ADC_VCH16DATL REG8(IT83XX_ADC_BASE+0x6B) #define IT83XX_ADC_ADCDVSTS2 REG8(IT83XX_ADC_BASE+0x6C) +/* Digital to Analog Converter (DAC) */ +#define IT83XX_DAC_BASE 0x00F01A00 + +#define IT83XX_DAC_DACPDREG REG8(IT83XX_DAC_BASE+0x01) +#define IT83XX_DAC_POWDN(ch) BIT(ch) +#define IT83XX_DAC_DACDAT(ch) REG8(IT83XX_DAC_BASE+0x02+ch) + /* Keyboard Controller (KBC) */ #define IT83XX_KBC_BASE 0x00F01300 @@ -1550,7 +1557,6 @@ extern const int hibernate_wake_pins_used; /* --- MISC (not implemented yet) --- */ #define IT83XX_PS2_BASE 0x00F01700 -#define IT83XX_DAC_BASE 0x00F01A00 #define IT83XX_EGPIO_BASE 0x00F02100 #define IT83XX_CIR_BASE 0x00F02300 #define IT83XX_DBGR_BASE 0x00F02500 |