diff options
author | Randall Spangler <rspangler@chromium.org> | 2012-06-07 09:51:29 -0700 |
---|---|---|
committer | Gerrit <chrome-bot@google.com> | 2012-06-07 12:07:38 -0700 |
commit | c8eb271d6ab48d8d40ab08e83881965f91887e34 (patch) | |
tree | 0453c750fe632d3e21e333ea3e61355e248389b4 /chip | |
parent | d9c385da744d46ca25e87e70ef8e4e1c46b71ae6 (diff) | |
download | chrome-ec-c8eb271d6ab48d8d40ab08e83881965f91887e34.tar.gz |
Stay in G3 when power applied
We were going straight to S5. When the PCH first goes into S5 after
power-loss, it decides to boot for some reason. So, stay in G3.
Still exit G3 if waking from hibernate or if the power button is
pressed when the EC boots on a power-on reset.
BUG=chrome-os-partner:10239
TEST=manual
1) Unplug battery and AC power. Plug in AC power. System does not boot.
2) Press power button. System boots now.
3) From console, 'hibernate 10'. Close and open lid. System boots.
4) From console, 'hibernate 10'. Press power button. System boots.
5) Hold power+esc+refresh. System boots into recovery.
6) Hold power+esc. EC reboots. Release esc. System stays off.
7) Unplug battery and AC power. Plug in AC power while holding power button.
System boots.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Change-Id: I7612a40ab5ebe41d356ac3a6b89cedf1174125f4
Reviewed-on: https://gerrit.chromium.org/gerrit/24729
Commit-Ready: Randall Spangler <rspangler@chromium.org>
Tested-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'chip')
-rw-r--r-- | chip/lm4/power_button.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/chip/lm4/power_button.c b/chip/lm4/power_button.c index d4fac1b77a..1c37ec690d 100644 --- a/chip/lm4/power_button.c +++ b/chip/lm4/power_button.c @@ -308,6 +308,7 @@ static void set_initial_pwrbtn_state(void) /* In recovery mode, so send a power button pulse to * the PCH so it powers on. */ CPRINTF("[%T PB init-recovery]\n"); + chipset_exit_hard_off(); set_pwrbtn_to_pch(0); pwrbtn_state = PWRBTN_STATE_BOOT_RECOVERY; tnext_state = get_time().val + PWRBTN_INITIAL_US; @@ -328,6 +329,7 @@ static void set_initial_pwrbtn_state(void) * system. Note that on EVT+, if the system is off, lid is * open, and you plug it in, it'll turn on due to AC detect. */ CPRINTF("[%T PB init-hib-wake]\n"); + chipset_exit_hard_off(); set_pwrbtn_to_pch(0); if (get_power_button_pressed()) pwrbtn_state = PWRBTN_STATE_WAS_OFF; @@ -338,8 +340,11 @@ static void set_initial_pwrbtn_state(void) /* Copy initial power button state to PCH and memory-mapped * switch positions. */ set_pwrbtn_to_pch(get_power_button_pressed() ? 0 : 1); - if (get_power_button_pressed()) + if (get_power_button_pressed()) { + /* Wake chipset if power button is pressed at boot */ + chipset_exit_hard_off(); *memmap_switches |= EC_SWITCH_POWER_BUTTON_PRESSED; + } } } |