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| author | Leifu Zhao <leifu.zhao@intel.com> | 2021-01-04 12:12:21 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-01-08 18:09:32 +0000 |
| commit | d5ed045a43c3b5e0c535c40adbd25b1fd44ba087 (patch) | |
| tree | 9cb6370db1415eddd549294fbc491554b395d120 /chip | |
| parent | 8f345341c39e82fc3dfe923137b0d07e29ce240a (diff) | |
| download | chrome-ec-d5ed045a43c3b5e0c535c40adbd25b1fd44ba087.tar.gz | |
ish: enable handling reset in AON code
Enable handling reset in AON code for ish 5.4 on tgl rvp.
BUG=b:176689775
BRANCH=none
TEST=ish reset properly when host reboot.
Signed-off-by: Leifu Zhao <leifu.zhao@intel.com>
Change-Id: I9d53d668bf5b459e21519cab4fcaa28c753ff266
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2607954
Reviewed-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Tested-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
Auto-Submit: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Diffstat (limited to 'chip')
| -rw-r--r-- | chip/ish/aontaskfw/ish_aontask.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/chip/ish/aontaskfw/ish_aontask.c b/chip/ish/aontaskfw/ish_aontask.c index ab9d02abbf..ab3749477f 100644 --- a/chip/ish/aontaskfw/ish_aontask.c +++ b/chip/ish/aontaskfw/ish_aontask.c @@ -670,6 +670,9 @@ static void handle_d0i2(void) clear_vnnred_aoncg(); + if (IS_ENABLED(CONFIG_ISH_NEW_PM) && (PMU_RST_PREP & PMU_RST_PREP_AVAIL)) + handle_reset(ISH_PM_STATE_RESET_PREP); + /* set main SRAM intto normal mode */ PMU_LDO_CTRL = PMU_LDO_ENABLE_BIT; @@ -725,6 +728,9 @@ static void handle_d0i3(void) clear_vnnred_aoncg(); + if (IS_ENABLED(CONFIG_ISH_NEW_PM) && (PMU_RST_PREP & PMU_RST_PREP_AVAIL)) + handle_reset(ISH_PM_STATE_RESET_PREP); + /* power on main SRAM */ sram_power(1); @@ -801,7 +807,8 @@ static void handle_reset(enum ish_pm_state pm_state) * Sx for long time. * */ - if (IPC_ISH_RMP2 & DMA_ENABLED_MASK) { + if (IS_ENABLED(CONFIG_ISH_NEW_PM) || + (IPC_ISH_RMP2 & DMA_ENABLED_MASK)) { /* clear ISH2HOST doorbell register */ *IPC_ISH2HOST_DOORBELL_ADDR = 0; |