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authorJack Rosenthal <jrosenth@chromium.org>2021-11-04 12:11:58 -0600
committerCommit Bot <commit-bot@chromium.org>2021-11-05 04:22:34 +0000
commit252457d4b21f46889eebad61d4c0a65331919cec (patch)
tree01856c4d31d710b20e85a74c8d7b5836e35c3b98 /common/cbi_eeprom.c
parent08f5a1e6fc2c9467230444ac9b582dcf4d9f0068 (diff)
downloadchrome-ec-stabilize-14333.B-ish.tar.gz
In the interest of making long-term branch maintenance incur as little technical debt on us as possible, we should not maintain any files on the branch we are not actually using. This has the added effect of making it extremely clear when merging CLs from the main branch when changes have the possibility to affect us. The follow-on CL adds a convenience script to actually pull updates from the main branch and generate a CL for the update. BUG=b:204206272 BRANCH=ish TEST=make BOARD=arcada_ish && make BOARD=drallion_ish Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Diffstat (limited to 'common/cbi_eeprom.c')
-rw-r--r--common/cbi_eeprom.c84
1 files changed, 0 insertions, 84 deletions
diff --git a/common/cbi_eeprom.c b/common/cbi_eeprom.c
deleted file mode 100644
index 2761f0b977..0000000000
--- a/common/cbi_eeprom.c
+++ /dev/null
@@ -1,84 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Support Cros Board Info EEPROM */
-
-#include "console.h"
-#include "cros_board_info.h"
-#include "gpio.h"
-#include "i2c.h"
-#include "system.h"
-#include "timer.h"
-#include "util.h"
-
-#define CPRINTS(format, args...) cprints(CC_SYSTEM, "CBI " format, ## args)
-
-/*
- * We allow EEPROMs with page size of 8 or 16. Use 8 to be the most compatible.
- * This causes a little more overhead for writes, but we are not writing to the
- * EEPROM outside of the factory process.
- */
-#define EEPROM_PAGE_WRITE_SIZE 8
-#define EEPROM_PAGE_WRITE_MS 5
-
-static int eeprom_read(uint8_t offset, uint8_t *data, int len)
-{
- return i2c_read_block(I2C_PORT_EEPROM, I2C_ADDR_EEPROM_FLAGS,
- offset, data, len);
-}
-
-static int eeprom_is_write_protected(void)
-{
- if (IS_ENABLED(CONFIG_BYPASS_CBI_EEPROM_WP_CHECK))
- return 0;
-#if defined(CONFIG_WP_ACTIVE_HIGH)
- return gpio_get_level(GPIO_WP);
-#else
- return !gpio_get_level(GPIO_WP_L);
-#endif
-}
-
-static int eeprom_write(uint8_t *cbi)
-{
- uint8_t *p = cbi;
- int rest = ((struct cbi_header *)p)->total_size;
-
- while (rest > 0) {
- int size = MIN(EEPROM_PAGE_WRITE_SIZE, rest);
- int rv;
-
- rv = i2c_write_block(I2C_PORT_EEPROM, I2C_ADDR_EEPROM_FLAGS,
- p - cbi, p, size);
- if (rv) {
- CPRINTS("Failed to write for %d", rv);
- return rv;
- }
- /* Wait for internal write cycle completion */
- msleep(EEPROM_PAGE_WRITE_MS);
- p += size;
- rest -= size;
- }
-
- return EC_SUCCESS;
-}
-
-#ifdef CONFIG_EEPROM_CBI_WP
-void cbi_latch_eeprom_wp(void)
-{
- CPRINTS("WP latched");
- gpio_set_level(GPIO_EC_CBI_WP, 1);
-}
-#endif /* CONFIG_EEPROM_CBI_WP */
-
-const struct cbi_storage_driver eeprom_drv = {
- .store = eeprom_write,
- .load = eeprom_read,
- .is_protected = eeprom_is_write_protected,
-};
-
-const struct cbi_storage_config_t cbi_config = {
- .storage_type = CBI_STORAGE_TYPE_EEPROM,
- .drv = &eeprom_drv,
-};