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authorTom Hughes <tomhughes@chromium.org>2022-09-21 14:10:01 -0700
committerTom Hughes <tomhughes@chromium.org>2022-09-22 12:49:33 -0700
commit2bcf863b492fe7ed8105c853814dba6ed32ba719 (patch)
treefcf6ce5810f9ff9e3c8cce434812dd75492269ed /core/riscv-rv32i/panic.c
parente5fb0b9ba488614b5684e640530f00821ab7b943 (diff)
parent28712dae9d7ed1e694f7622cc083afa71090d4d5 (diff)
downloadchrome-ec-firmware-fpmcu-bloonchipper-release.tar.gz
Merge remote-tracking branch cros/main into firmware-fpmcu-bloonchipper-releasefirmware-fpmcu-bloonchipper-release
Generated by: ./util/update_release_branch.py --board bloonchipper --relevant_paths_file ./util/fingerprint-relevant-paths.txt firmware- fpmcu-bloonchipper-release Relevant changes: git log --oneline e5fb0b9ba4..28712dae9d -- board/hatch_fp board/bloonchipper common/fpsensor docs/fingerprint driver/fingerprint util/getversion.sh ded9307b79 util/getversion.sh: Fix version when not in a git repo 956055e692 board: change Google USB vendor info 71b2ef709d Update license boilerplate text in source code files 33e11afda0 Revert "fpsensor: Build fpsensor source file with C++" c8d0360723 fpsensor: Build fpsensor source file with C++ bc113abd53 fpsensor: Fix g++ compiler error 150a58a0dc fpsensor: Fix fp_set_sensor_mode return type b33b5ce85b fpsensor: Remove nested designators for C++ compatibility 2e864b2539 tree-wide: const-ify argv for console commands 56d8b360f9 test: Add test for get ikm failure when seed not set 3a3d6c3690 test: Add test for fpsensor trivial key failure 233e6bbd08 fpsensor_crypto: Abstract calls to hmac_SHA256 0a041b285b docs/fingerprint: Typo correction c03fab67e2 docs/fingerprint: Fix the path of fputils.py 0b5d4baf5a util/getversion.sh: Fix empty file list handling 6e128fe760 FPMCU dev board environment with Satlab 3eb29b6aa5 builtin: Move ssize_t to sys/types.h 345d62ebd1 docs/fingerprint: Update power numbers for latest dartmonkey release c25ffdb316 common: Conditionally support printf %l and %i modifiers 9a3c514b45 test: Add a test to check if the debugger is connected 54e603413f Move standard library tests to their own file 43fa6b4bf8 docs/fingerprint: Update power numbers for latest bloonchipper release 25536f9a84 driver/fingerprint/fpc/bep/fpc_sensor_spi.c: Format with clang-format 4face99efd driver/fingerprint/fpc/libfp/fpc_sensor_pal.h: Format with clang-format 738de2b575 trng: Rename rand to trng_rand 14b8270edd docs/fingerprint: Update dragonclaw power numbers 0b268f93d1 driver/fingerprint/fpc/libfp/fpc_private.c: Format with clang-format f80da163f2 driver/fingerprint/fpc/libfp/fpc_private.h: Format with clang-format 5e9c85c9b1 driver/fingerprint/fpc/libfp/fpc_sensor_pal.c: Format with clang-format c1f9dd3cf8 driver/fingerprint/fpc/libfp/fpc_bio_algorithm.h: Format with clang-format eb1e1bed8d driver/fingerprint/fpc/libfp/fpc1145_private.h: Format with clang-format 6e7b611821 driver/fingerprint/fpc/bep/fpc_bio_algorithm.h: Format with clang-format e0589cd5e2 driver/fingerprint/fpc/bep/fpc1035_private.h: Format with clang-format 7905e556a0 common/fpsensor/fpsensor_crypto.c: Format with clang-format 21289d170c driver/fingerprint/fpc/bep/fpc1025_private.h: Format with clang-format 98a20f937e common/fpsensor/fpsensor_state.c: Format with clang-format a2d255d8af common/fpsensor/fpsensor.c: Format with clang-format 73055eeb3f driver/fingerprint/fpc/bep/fpc_private.c: Format with clang-format 0f7b5cb509 common/fpsensor/fpsensor_private.h: Format with clang-format 1ceade6e65 driver/fingerprint/fpc/bep/fpc_private.h: Format with clang-format dc3e9008b8 board/hatch_fp/board.h: Format with clang-format dca9d74321 Revert "trng: Rename rand to trng_rand" a6b0b3554f trng: Rename rand to trng_rand 28d0b75b70 third_party/boringssl: Remove unused header BRANCH=None BUG=b:246424843 b:234181908 b:244781166 b:234181908 b:244387210 BUG=b:242720240 chromium:1098010 b:180945056 b:236025198 b:234181908 BUG=b:234181908 b:237344361 b:131913998 b:236386294 b:234143158 BUG=b:234781655 b:215613183 b:242720910 TEST=`make -j buildall` TEST=./test/run_device_tests.py --board bloonchipper Test "aes": PASSED Test "cec": PASSED Test "cortexm_fpu": PASSED Test "crc": PASSED Test "flash_physical": PASSED Test "flash_write_protect": PASSED Test "fpsensor_hw": PASSED Test "fpsensor_spi_ro": PASSED Test "fpsensor_spi_rw": PASSED Test "fpsensor_uart_ro": PASSED Test "fpsensor_uart_rw": PASSED Test "mpu_ro": PASSED Test "mpu_rw": PASSED Test "mutex": PASSED Test "pingpong": PASSED Test "printf": PASSED Test "queue": PASSED Test "rollback_region0": PASSED Test "rollback_region1": PASSED Test "rollback_entropy": PASSED Test "rtc": PASSED Test "sha256": PASSED Test "sha256_unrolled": PASSED Test "static_if": PASSED Test "stdlib": PASSED Test "system_is_locked_wp_on": PASSED Test "system_is_locked_wp_off": PASSED Test "timer_dos": PASSED Test "utils": PASSED Test "utils_str": PASSED Test "stm32f_rtc": PASSED Test "panic_data_bloonchipper_v2.0.4277": PASSED Test "panic_data_bloonchipper_v2.0.5938": PASSED Force-Relevant-Builds: all Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I264ad0ffe7afcd507a1e483c6e934a9c4fea47c3
Diffstat (limited to 'core/riscv-rv32i/panic.c')
-rw-r--r--core/riscv-rv32i/panic.c96
1 files changed, 48 insertions, 48 deletions
diff --git a/core/riscv-rv32i/panic.c b/core/riscv-rv32i/panic.c
index 5860fba072..a2ce9213d9 100644
--- a/core/riscv-rv32i/panic.c
+++ b/core/riscv-rv32i/panic.c
@@ -1,4 +1,4 @@
-/* Copyright 2019 The Chromium OS Authors. All rights reserved.
+/* Copyright 2019 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -13,7 +13,7 @@
/**
* bit[3-0] @ mcause, general exception type information.
*/
-static const char * const exc_type[16] = {
+static const char *const exc_type[16] = {
"Instruction address misaligned",
"Instruction access fault",
"Illegal instruction",
@@ -38,12 +38,12 @@ static const char * const exc_type[16] = {
/* General purpose register (s0) for saving software panic reason */
#define SOFT_PANIC_GPR_REASON 11
/* General purpose register (s1) for saving software panic information */
-#define SOFT_PANIC_GPR_INFO 10
+#define SOFT_PANIC_GPR_INFO 10
void software_panic(uint32_t reason, uint32_t info)
{
- asm volatile ("mv s0, %0" : : "r"(reason) : "s0");
- asm volatile ("mv s1, %0" : : "r"(info) : "s1");
+ asm volatile("mv s0, %0" : : "r"(reason) : "s0");
+ asm volatile("mv s1, %0" : : "r"(info) : "s1");
if (in_interrupt_context())
asm("j excep_handler");
else
@@ -58,7 +58,7 @@ void panic_set_reason(uint32_t reason, uint32_t info, uint8_t exception)
* If it was called earlier (eg. when saving riscv.mepc) calling it
* once again won't remove any data
*/
- struct panic_data * const pdata = get_panic_data_write();
+ struct panic_data *const pdata = get_panic_data_write();
uint32_t warning_mepc;
uint32_t *regs;
@@ -85,7 +85,7 @@ void panic_set_reason(uint32_t reason, uint32_t info, uint8_t exception)
void panic_get_reason(uint32_t *reason, uint32_t *info, uint8_t *exception)
{
- struct panic_data * const pdata = panic_get_data();
+ struct panic_data *const pdata = panic_get_data();
uint32_t *regs;
if (pdata && pdata->struct_version == 2) {
@@ -100,34 +100,34 @@ void panic_get_reason(uint32_t *reason, uint32_t *info, uint8_t *exception)
#endif /* CONFIG_SOFTWARE_PANIC */
static void print_panic_information(uint32_t *regs, uint32_t mcause,
- uint32_t mepc)
+ uint32_t mepc)
{
panic_printf("=== EXCEPTION: MCAUSE=%x ===\n", mcause);
- panic_printf("S11 %08x S10 %08x S9 %08x S8 %08x\n",
- regs[0], regs[1], regs[2], regs[3]);
- panic_printf("S7 %08x S6 %08x S5 %08x S4 %08x\n",
- regs[4], regs[5], regs[6], regs[7]);
- panic_printf("S3 %08x S2 %08x S1 %08x S0 %08x\n",
- regs[8], regs[9], regs[10], regs[11]);
- panic_printf("T6 %08x T5 %08x T4 %08x T3 %08x\n",
- regs[12], regs[13], regs[14], regs[15]);
- panic_printf("T2 %08x T1 %08x T0 %08x A7 %08x\n",
- regs[16], regs[17], regs[18], regs[19]);
- panic_printf("A6 %08x A5 %08x A4 %08x A3 %08x\n",
- regs[20], regs[21], regs[22], regs[23]);
- panic_printf("A2 %08x A1 %08x A0 %08x TP %08x\n",
- regs[24], regs[25], regs[26], regs[27]);
- panic_printf("GP %08x RA %08x SP %08x MEPC %08x\n",
- regs[28], regs[29], regs[30], mepc);
+ panic_printf("S11 %08x S10 %08x S9 %08x S8 %08x\n", regs[0],
+ regs[1], regs[2], regs[3]);
+ panic_printf("S7 %08x S6 %08x S5 %08x S4 %08x\n", regs[4],
+ regs[5], regs[6], regs[7]);
+ panic_printf("S3 %08x S2 %08x S1 %08x S0 %08x\n", regs[8],
+ regs[9], regs[10], regs[11]);
+ panic_printf("T6 %08x T5 %08x T4 %08x T3 %08x\n", regs[12],
+ regs[13], regs[14], regs[15]);
+ panic_printf("T2 %08x T1 %08x T0 %08x A7 %08x\n", regs[16],
+ regs[17], regs[18], regs[19]);
+ panic_printf("A6 %08x A5 %08x A4 %08x A3 %08x\n", regs[20],
+ regs[21], regs[22], regs[23]);
+ panic_printf("A2 %08x A1 %08x A0 %08x TP %08x\n", regs[24],
+ regs[25], regs[26], regs[27]);
+ panic_printf("GP %08x RA %08x SP %08x MEPC %08x\n", regs[28],
+ regs[29], regs[30], mepc);
#ifdef CONFIG_DEBUG_EXCEPTIONS
if ((regs[SOFT_PANIC_GPR_REASON] & 0xfffffff0) == PANIC_SW_BASE) {
#ifdef CONFIG_SOFTWARE_PANIC
panic_printf("Software panic reason: %s\n",
- panic_sw_reasons[(regs[SOFT_PANIC_GPR_REASON] -
- PANIC_SW_BASE)]);
+ panic_sw_reasons[(regs[SOFT_PANIC_GPR_REASON] -
+ PANIC_SW_BASE)]);
panic_printf("Software panic info: %d\n",
- regs[SOFT_PANIC_GPR_INFO]);
+ regs[SOFT_PANIC_GPR_INFO]);
#endif
} else {
panic_printf("Exception type: %s\n", exc_type[(mcause & 0xf)]);
@@ -138,7 +138,7 @@ static void print_panic_information(uint32_t *regs, uint32_t mcause,
void report_panic(uint32_t *regs)
{
uint32_t i, mcause, mepc;
- struct panic_data * const pdata = get_panic_data_write();
+ struct panic_data *const pdata = get_panic_data_write();
mepc = get_mepc();
mcause = get_mcause();
@@ -171,36 +171,36 @@ void panic_data_print(const struct panic_data *pdata)
#ifdef CONFIG_PANIC_CONSOLE_OUTPUT
static void ccprint_panic_information(uint32_t *regs, uint32_t mcause,
- uint32_t mepc)
+ uint32_t mepc)
{
ccprintf("=== EXCEPTION: MCAUSE=%x ===\n", mcause);
- ccprintf("S11 %08x S10 %08x S9 %08x S8 %08x\n",
- regs[0], regs[1], regs[2], regs[3]);
- ccprintf("S7 %08x S6 %08x S5 %08x S4 %08x\n",
- regs[4], regs[5], regs[6], regs[7]);
- ccprintf("S3 %08x S2 %08x S1 %08x S0 %08x\n",
- regs[8], regs[9], regs[10], regs[11]);
- ccprintf("T6 %08x T5 %08x T4 %08x T3 %08x\n",
- regs[12], regs[13], regs[14], regs[15]);
- ccprintf("T2 %08x T1 %08x T0 %08x A7 %08x\n",
- regs[16], regs[17], regs[18], regs[19]);
+ ccprintf("S11 %08x S10 %08x S9 %08x S8 %08x\n", regs[0], regs[1],
+ regs[2], regs[3]);
+ ccprintf("S7 %08x S6 %08x S5 %08x S4 %08x\n", regs[4], regs[5],
+ regs[6], regs[7]);
+ ccprintf("S3 %08x S2 %08x S1 %08x S0 %08x\n", regs[8], regs[9],
+ regs[10], regs[11]);
+ ccprintf("T6 %08x T5 %08x T4 %08x T3 %08x\n", regs[12], regs[13],
+ regs[14], regs[15]);
+ ccprintf("T2 %08x T1 %08x T0 %08x A7 %08x\n", regs[16], regs[17],
+ regs[18], regs[19]);
cflush();
- ccprintf("A6 %08x A5 %08x A4 %08x A3 %08x\n",
- regs[20], regs[21], regs[22], regs[23]);
- ccprintf("A2 %08x A1 %08x A0 %08x TP %08x\n",
- regs[24], regs[25], regs[26], regs[27]);
- ccprintf("GP %08x RA %08x SP %08x MEPC %08x\n",
- regs[28], regs[29], regs[30], mepc);
+ ccprintf("A6 %08x A5 %08x A4 %08x A3 %08x\n", regs[20], regs[21],
+ regs[22], regs[23]);
+ ccprintf("A2 %08x A1 %08x A0 %08x TP %08x\n", regs[24], regs[25],
+ regs[26], regs[27]);
+ ccprintf("GP %08x RA %08x SP %08x MEPC %08x\n", regs[28], regs[29],
+ regs[30], mepc);
#ifdef CONFIG_DEBUG_EXCEPTIONS
if ((regs[SOFT_PANIC_GPR_REASON] & 0xfffffff0) == PANIC_SW_BASE) {
#ifdef CONFIG_SOFTWARE_PANIC
ccprintf("Software panic reason: %s\n",
- panic_sw_reasons[(regs[SOFT_PANIC_GPR_REASON] -
- PANIC_SW_BASE)]);
+ panic_sw_reasons[(regs[SOFT_PANIC_GPR_REASON] -
+ PANIC_SW_BASE)]);
ccprintf("Software panic info: %d\n",
- regs[SOFT_PANIC_GPR_INFO]);
+ regs[SOFT_PANIC_GPR_INFO]);
#endif /* CONFIG_SOFTWARE_PANIC */
} else {
ccprintf("Exception type: %s\n", exc_type[(mcause & 0xf)]);