diff options
| author | Vincent Palatin <vpalatin@chromium.org> | 2013-06-05 17:15:05 -0700 |
|---|---|---|
| committer | chrome-internal-fetch <chrome-internal-fetch@google.com> | 2014-06-18 06:08:45 +0000 |
| commit | 5fa52a895b6acd5d976a24dd571a44eaa3cb1ad1 (patch) | |
| tree | 667ccc50249a31eec51199811b9fd3780ba52729 /core | |
| parent | 4957dcbd87cd75d91bca772fef93ec2e0256ea4f (diff) | |
| download | chrome-ec-5fa52a895b6acd5d976a24dd571a44eaa3cb1ad1.tar.gz | |
stm32: add USB driver
Enough USB support to be able to enumerate the device and use bulk or
interrupt endpoints.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:28295
TEST=with the following USB console CL, connect a Fruitpie through USB
and use its console over USB.
Change-Id: I37b7f3b6a754cb82ab5f940ea20122d2e16b3b5b
Reviewed-on: https://chromium-review.googlesource.com/193983
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'core')
| -rw-r--r-- | core/cortex-m/ec.lds.S | 20 | ||||
| -rw-r--r-- | core/cortex-m0/ec.lds.S | 20 |
2 files changed, 40 insertions, 0 deletions
diff --git a/core/cortex-m/ec.lds.S b/core/cortex-m/ec.lds.S index e345bc93ca..dcadd43a6a 100644 --- a/core/cortex-m/ec.lds.S +++ b/core/cortex-m/ec.lds.S @@ -18,6 +18,9 @@ MEMORY { FLASH (rx) : ORIGIN = FW_OFF(SECTION), LENGTH = FW_SIZE(SECTION) IRAM (rw) : ORIGIN = CONFIG_RAM_BASE, LENGTH = CONFIG_RAM_SIZE +#ifdef CONFIG_USB + USB_RAM (rw) : ORIGIN = CONFIG_USB_RAM_BASE, LENGTH = CONFIG_USB_RAM_SIZE +#endif } SECTIONS { @@ -120,6 +123,14 @@ SECTIONS KEEP(*(.rodata.deferred)) __deferred_funcs_end = .; + __usb_desc = .; + KEEP(*(.rodata.usb_desc_conf)) + KEEP(*(SORT(.rodata.usb_desc*))) + . = ALIGN(2); /* USB transfers enjoy 16-bit aligned size */ + __usb_desc_end = .; + . = ALIGN(4); + KEEP(*(.rodata.usb_ep)) + . = ALIGN(4); *(.rodata*) @@ -208,6 +219,15 @@ SECTIONS ASSERT(FW_SIZE(SECTION) > (LOADADDR(.data) + SIZEOF(.data) - FW_OFF(SECTION)), "No room left in the flash") + +#ifdef CONFIG_USB + .usb_ram (NOLOAD) : { + __usb_ram_start = .; + . = ALIGN(8); + *(.usb_ram.btable) + *(.usb_ram.data) + } > USB_RAM +#endif #if !(defined(SECTION_IS_RO) && defined(CONFIG_FLASH)) /DISCARD/ : { *(.google) diff --git a/core/cortex-m0/ec.lds.S b/core/cortex-m0/ec.lds.S index 28e52869f8..beb819afa6 100644 --- a/core/cortex-m0/ec.lds.S +++ b/core/cortex-m0/ec.lds.S @@ -18,6 +18,9 @@ MEMORY { FLASH (rx) : ORIGIN = FW_OFF(SECTION), LENGTH = FW_SIZE(SECTION) IRAM (rw) : ORIGIN = CONFIG_RAM_BASE, LENGTH = CONFIG_RAM_SIZE +#ifdef CONFIG_USB + USB_RAM (rw) : ORIGIN = CONFIG_USB_RAM_BASE, LENGTH = CONFIG_USB_RAM_SIZE +#endif } SECTIONS { @@ -120,6 +123,14 @@ SECTIONS KEEP(*(.rodata.deferred)) __deferred_funcs_end = .; + __usb_desc = .; + KEEP(*(.rodata.usb_desc_conf)) + KEEP(*(SORT(.rodata.usb_desc*))) + . = ALIGN(2); /* USB transfers enjoy 16-bit aligned size */ + __usb_desc_end = .; + . = ALIGN(4); + KEEP(*(.rodata.usb_ep)) + . = ALIGN(4); *(.rodata*) @@ -197,6 +208,15 @@ SECTIONS ASSERT(FW_SIZE(SECTION) > (LOADADDR(.data) + SIZEOF(.data) - FW_OFF(SECTION)), "No room left in the flash") + +#ifdef CONFIG_USB + .usb_ram (NOLOAD) : { + __usb_ram_start = .; + . = ALIGN(8); + *(.usb_ram.btable) + *(.usb_ram.data) + } > USB_RAM +#endif #if !(defined(SECTION_IS_RO) && defined(CONFIG_FLASH)) /DISCARD/ : { *(.google) |