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authorDino Li <Dino.Li@ite.com.tw>2022-05-31 15:47:56 +0800
committerChromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com>2022-06-09 14:23:17 +0000
commitadae86b9387e261919d5e9921814f0d8f31f49fa (patch)
tree7de5be1216d1e7241b60a8a8fa0bf9af92be98ab /core
parentd7b18cfc30d985ccfc67ee09c6d73a38f229ee57 (diff)
downloadchrome-ec-adae86b9387e261919d5e9921814f0d8f31f49fa.tar.gz
config: riscv: add CONFIG_RISCV_EXTENSION_M configuration
This makes the 'M' extension to be configurable. BUG=b:235297478 BRANCH=asurada,cherry,icarus TEST=- buildall - ISA for cherry images includes "M" extension (-march=rv32imac) Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: I56957a6767378121443659a170ca33896ada67ce Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3690041 Reviewed-by: Eric Yilun Lin <yllin@google.com>
Diffstat (limited to 'core')
-rw-r--r--core/riscv-rv32i/build.mk5
1 files changed, 4 insertions, 1 deletions
diff --git a/core/riscv-rv32i/build.mk b/core/riscv-rv32i/build.mk
index 34f059e70c..376bd2c093 100644
--- a/core/riscv-rv32i/build.mk
+++ b/core/riscv-rv32i/build.mk
@@ -12,8 +12,11 @@ $(call set-option,CROSS_COMPILE,$(CROSS_COMPILE_riscv),\
# Enable FPU extension if config option of FPU is enabled.
_FPU_EXTENSION=$(if $(CONFIG_FPU),f,)
+# Enable the 'M' extension if config option of RISCV_EXTENSION_M is enabled.
+_M_EXTENSION=$(if $(CONFIG_RISCV_EXTENSION_M),m,)
# CPU specific compilation flags
-CFLAGS_CPU+=-march=rv32ima$(_FPU_EXTENSION)c -mabi=ilp32$(_FPU_EXTENSION) -Os
+CFLAGS_CPU+=-march=rv32i$(_M_EXTENSION)a$(_FPU_EXTENSION)c
+CFLAGS_CPU+=-mabi=ilp32$(_FPU_EXTENSION) -Os
# RISC-V does not trap division by zero, enable the sanitizer to check those.
# With `-fsanitize-undefined-trap-on-error`, we lose a bit of specificity on the
# exact issue, but the added code is as small as it gets.