diff options
| author | Jack Rosenthal <jrosenth@chromium.org> | 2022-06-27 14:44:45 -0600 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-06-29 11:12:14 +0000 |
| commit | dff1026222b16383301e2c963abb8c2fb6081f06 (patch) | |
| tree | 3f6b18932bab16e13a277d41bda05f58be3cd0ee /core | |
| parent | 7d89813c3da82651f055e7665999a962a4b20ccd (diff) | |
| download | chrome-ec-dff1026222b16383301e2c963abb8c2fb6081f06.tar.gz | |
core/riscv-rv32i/cpu.h: Format with clang-format
BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: I59efbf82a107052607f7cdeb4766c268fd079f74
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3729869
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Diffstat (limited to 'core')
| -rw-r--r-- | core/riscv-rv32i/cpu.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/core/riscv-rv32i/cpu.h b/core/riscv-rv32i/cpu.h index e46b893ad6..7bc5c81b04 100644 --- a/core/riscv-rv32i/cpu.h +++ b/core/riscv-rv32i/cpu.h @@ -25,7 +25,7 @@ /* write Exception Program Counter register */ static inline void set_mepc(uint32_t val) { - asm volatile ("csrw mepc, %0" : : "r"(val)); + asm volatile("csrw mepc, %0" : : "r"(val)); } /* read Exception Program Counter register */ @@ -33,7 +33,7 @@ static inline uint32_t get_mepc(void) { uint32_t ret; - asm volatile ("csrr %0, mepc" : "=r"(ret)); + asm volatile("csrr %0, mepc" : "=r"(ret)); return ret; } @@ -42,7 +42,7 @@ static inline uint32_t get_mcause(void) { uint32_t ret; - asm volatile ("csrr %0, mcause" : "=r"(ret)); + asm volatile("csrr %0, mcause" : "=r"(ret)); return ret; } |