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author | Michał Barnaś <mb@semihalf.com> | 2022-08-10 17:48:40 +0200 |
---|---|---|
committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2023-02-14 19:06:34 +0000 |
commit | 9263f14536b8ad64682362070d4f5fd7c1c8c7c6 (patch) | |
tree | daff36a9727fe7385678ea7df09376367ac0aa2e /docs | |
parent | 8b79c53a600731ea68129896bb3d93c0d248da32 (diff) | |
download | chrome-ec-9263f14536b8ad64682362070d4f5fd7c1c8c7c6.tar.gz |
zephyr: remove shi node and add references to shi0
This commit removes the references to internal shi node in device tree
and changes them to shi0 from the Zephyr device trees.
Changes also the compatible string from internal to upstream one
by removing the 'cros' prefix and removes the binding files.
BRANCH=main
BUG=b:265763662
TEST=run the host commands test on affected boards
LOW_COVERAGE_REASON=No tests are available for EC on-chip peripherals.
Change-Id: Iefdba23680d7734013de128f1b8878bac2c96cfa
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4180585
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Michał Barnaś <barnas@google.com>
Tested-by: Michał Barnaś <barnas@google.com>
Diffstat (limited to 'docs')
-rw-r--r-- | docs/zephyr/zephyr_ap_ec_comm.md | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/docs/zephyr/zephyr_ap_ec_comm.md b/docs/zephyr/zephyr_ap_ec_comm.md index dca948fbe9..711b2449ec 100644 --- a/docs/zephyr/zephyr_ap_ec_comm.md +++ b/docs/zephyr/zephyr_ap_ec_comm.md @@ -110,20 +110,19 @@ selected host interface and SoC family. Each SoC driver has specific compatibility string which is used to get node with configuration from the device tree. For example, the nuvoton npcx chip uses compatibility string -`nuvoton,npcx-cros-shi`. +`nuvoton,npcx-shi`. The node's required properties are defined in yaml files: [SHI bindings] ``` / { - shi: shi@4000f000 { - compatible = "nuvoton,npcx-cros-shi"; + shi0: shi@4000f000 { + compatible = "nuvoton,npcx-shi"; reg = <0x4000f000 0x120>; interrupts = <18 1>; clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL5 1>; pinctrl-0 = <&altc_shi_sl>; shi-cs-wui =<&wui_io53>; - label = "SHI"; }; } ``` |