diff options
| author | Shawn Nematbakhsh <shawnn@chromium.org> | 2015-02-28 13:12:54 -0800 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-03-04 22:08:09 +0000 |
| commit | 1746c5b0d9b369bf8d11600ef822ae65f84c9fc1 (patch) | |
| tree | 3a52a04a52770120c2023e2984562fb8e4066665 /driver/pi3usb9281.h | |
| parent | 7f48c9a6b3029478cc78e60bec9fb3cc2859af92 (diff) | |
| download | chrome-ec-1746c5b0d9b369bf8d11600ef822ae65f84c9fc1.tar.gz | |
pi3usb9281: Always set reserved control bits
Bits 1 and 3 of the control register are read 1, write 1, but RO
firmware may have zero'd these bits. Therefore, always set the bits
high, ignoring the read value.
TEST=Manual on Samus. Starting from .90 RO, flash new RW and verify
BC1.2 charger detection is working.
BUG=chrome-os-partner:37241
BRANCH=Samus
Change-Id: I2f71718f74e50fe9b664dbe3da1578ee4c995136
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/254880
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Diffstat (limited to 'driver/pi3usb9281.h')
| -rw-r--r-- | driver/pi3usb9281.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/driver/pi3usb9281.h b/driver/pi3usb9281.h index 49a078ee6f..56b126c1e3 100644 --- a/driver/pi3usb9281.h +++ b/driver/pi3usb9281.h @@ -26,6 +26,8 @@ #define PI3USB9281_CTRL_SWITCH_AUTO (1 << 4) /* Bits 5 thru 7 are read X, write 0 */ #define PI3USB9281_CTRL_MASK 0x1f +/* Bits 1 and 3 are read 1, write 1 */ +#define PI3USB9281_CTRL_RSVD_1 0x0a #define PI3USB9281_PIN_MANUAL_VBUS (3 << 0) #define PI3USB9281_PIN_MANUAL_DP (1 << 2) |