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| author | Jack Rosenthal <jrosenth@chromium.org> | 2022-06-27 14:52:56 -0600 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-07-01 11:50:47 +0000 |
| commit | 2bb5b7b873345e2e0f965ecf43e81f37e9e2bbad (patch) | |
| tree | 2f6d63d0778846d5a62777d68c6e54202e1b8f04 /driver/ppc | |
| parent | fec7f586e1165b4ab9689140b17a5df1b583f635 (diff) | |
| download | chrome-ec-2bb5b7b873345e2e0f965ecf43e81f37e9e2bbad.tar.gz | |
driver/ppc/sn5s330.h: Format with clang-format
BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: Iffd4ca27c93af9235859003fddde1fa1af3c173a
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730051
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Diffstat (limited to 'driver/ppc')
| -rw-r--r-- | driver/ppc/sn5s330.h | 114 |
1 files changed, 57 insertions, 57 deletions
diff --git a/driver/ppc/sn5s330.h b/driver/ppc/sn5s330.h index 9768906182..ebcb46ce45 100644 --- a/driver/ppc/sn5s330.h +++ b/driver/ppc/sn5s330.h @@ -27,15 +27,15 @@ enum sn5s330_pp_idx { SN5S330_PP_COUNT, }; -#define SN5S330_FUNC_SET1 0x50 -#define SN5S330_FUNC_SET2 0x51 -#define SN5S330_FUNC_SET3 0x52 -#define SN5S330_FUNC_SET4 0x53 -#define SN5S330_FUNC_SET5 0x54 -#define SN5S330_FUNC_SET6 0x55 -#define SN5S330_FUNC_SET7 0x56 -#define SN5S330_FUNC_SET8 0x57 -#define SN5S330_FUNC_SET9 0x58 +#define SN5S330_FUNC_SET1 0x50 +#define SN5S330_FUNC_SET2 0x51 +#define SN5S330_FUNC_SET3 0x52 +#define SN5S330_FUNC_SET4 0x53 +#define SN5S330_FUNC_SET5 0x54 +#define SN5S330_FUNC_SET6 0x55 +#define SN5S330_FUNC_SET7 0x56 +#define SN5S330_FUNC_SET8 0x57 +#define SN5S330_FUNC_SET9 0x58 #define SN5S330_FUNC_SET10 0x59 #define SN5S330_FUNC_SET11 0x5A #define SN5S330_FUNC_SET12 0x5B @@ -62,72 +62,72 @@ enum sn5s330_pp_idx { #define SN5S330_INT_MASK_FALL_REG2 0x2A #define SN5S330_INT_MASK_FALL_REG3 0x2B -#define PPX_ILIM_DEGLITCH_0_US_20 0x1 -#define PPX_ILIM_DEGLITCH_0_US_50 0x2 -#define PPX_ILIM_DEGLITCH_0_US_100 0x3 -#define PPX_ILIM_DEGLITCH_0_US_200 0x4 -#define PPX_ILIM_DEGLITCH_0_US_1000 0x5 -#define PPX_ILIM_DEGLITCH_0_US_2000 0x6 -#define PPX_ILIM_DEGLITCH_0_US_10000 0x7 +#define PPX_ILIM_DEGLITCH_0_US_20 0x1 +#define PPX_ILIM_DEGLITCH_0_US_50 0x2 +#define PPX_ILIM_DEGLITCH_0_US_100 0x3 +#define PPX_ILIM_DEGLITCH_0_US_200 0x4 +#define PPX_ILIM_DEGLITCH_0_US_1000 0x5 +#define PPX_ILIM_DEGLITCH_0_US_2000 0x6 +#define PPX_ILIM_DEGLITCH_0_US_10000 0x7 /* Internal VBUS Switch Current Limit Settings (min) */ -#define SN5S330_ILIM_0_35 0 -#define SN5S330_ILIM_0_63 1 -#define SN5S330_ILIM_0_90 2 -#define SN5S330_ILIM_1_14 3 -#define SN5S330_ILIM_1_38 4 -#define SN5S330_ILIM_1_62 5 -#define SN5S330_ILIM_1_86 6 -#define SN5S330_ILIM_2_10 7 -#define SN5S330_ILIM_2_34 8 -#define SN5S330_ILIM_2_58 9 -#define SN5S330_ILIM_2_82 10 -#define SN5S330_ILIM_3_06 11 -#define SN5S330_ILIM_3_30 12 +#define SN5S330_ILIM_0_35 0 +#define SN5S330_ILIM_0_63 1 +#define SN5S330_ILIM_0_90 2 +#define SN5S330_ILIM_1_14 3 +#define SN5S330_ILIM_1_38 4 +#define SN5S330_ILIM_1_62 5 +#define SN5S330_ILIM_1_86 6 +#define SN5S330_ILIM_2_10 7 +#define SN5S330_ILIM_2_34 8 +#define SN5S330_ILIM_2_58 9 +#define SN5S330_ILIM_2_82 10 +#define SN5S330_ILIM_3_06 11 +#define SN5S330_ILIM_3_30 12 /* FUNC_SET_2 */ -#define SN5S330_SBU_EN BIT(4) +#define SN5S330_SBU_EN BIT(4) /* FUNC_SET_3 */ -#define SN5S330_PP1_EN BIT(0) -#define SN5S330_PP2_EN BIT(1) -#define SN5S330_VBUS_DISCH_EN BIT(2) -#define SN5S330_SET_RCP_MODE_PP1 BIT(5) -#define SN5S330_SET_RCP_MODE_PP2 BIT(6) +#define SN5S330_PP1_EN BIT(0) +#define SN5S330_PP2_EN BIT(1) +#define SN5S330_VBUS_DISCH_EN BIT(2) +#define SN5S330_SET_RCP_MODE_PP1 BIT(5) +#define SN5S330_SET_RCP_MODE_PP2 BIT(6) /* FUNC_SET_4 */ -#define SN5S330_VCONN_EN BIT(0) -#define SN5S330_CC_POLARITY BIT(1) -#define SN5S330_CC_EN BIT(4) -#define SN5S330_VCONN_ILIM_SEL BIT(5) +#define SN5S330_VCONN_EN BIT(0) +#define SN5S330_CC_POLARITY BIT(1) +#define SN5S330_CC_EN BIT(4) +#define SN5S330_VCONN_ILIM_SEL BIT(5) /* FUNC_SET_8 */ -#define SN5S330_VCONN_DEGLITCH_MASK (3 << 6) -#define SN5S330_VCONN_DEGLITCH_63_US (0 << 6) -#define SN5S330_VCONN_DEGLITCH_125_US BIT(6) -#define SN5S330_VCONN_DEGLITCH_640_US (2 << 6) -#define SN5S330_VCONN_DEGLITCH_1280_US (3 << 6) +#define SN5S330_VCONN_DEGLITCH_MASK (3 << 6) +#define SN5S330_VCONN_DEGLITCH_63_US (0 << 6) +#define SN5S330_VCONN_DEGLITCH_125_US BIT(6) +#define SN5S330_VCONN_DEGLITCH_640_US (2 << 6) +#define SN5S330_VCONN_DEGLITCH_1280_US (3 << 6) /* FUNC_SET_9 */ -#define SN5S330_FORCE_OVP_EN_SBU BIT(1) -#define SN5S330_PP2_CONFIG BIT(2) -#define SN5S330_PWR_OVR_VBUS BIT(3) -#define SN5S330_OVP_EN_CC BIT(4) -#define SN5S330_CONFIG_UVP BIT(5) -#define SN5S330_FORCE_ON_VBUS_OVP BIT(6) -#define SN5S330_FORCE_ON_VBUS_UVP BIT(7) +#define SN5S330_FORCE_OVP_EN_SBU BIT(1) +#define SN5S330_PP2_CONFIG BIT(2) +#define SN5S330_PWR_OVR_VBUS BIT(3) +#define SN5S330_OVP_EN_CC BIT(4) +#define SN5S330_CONFIG_UVP BIT(5) +#define SN5S330_FORCE_ON_VBUS_OVP BIT(6) +#define SN5S330_FORCE_ON_VBUS_UVP BIT(7) /* INT_STATUS_REG3 */ -#define SN5S330_VBUS_GOOD BIT(0) +#define SN5S330_VBUS_GOOD BIT(0) /* INT_STATUS_REG4 */ -#define SN5S330_DIG_RES BIT(0) -#define SN5S330_DB_BOOT BIT(1) -#define SN5S330_VSAFE0V_STAT BIT(2) -#define SN5S330_VSAFE0V_MASK BIT(3) +#define SN5S330_DIG_RES BIT(0) +#define SN5S330_DB_BOOT BIT(1) +#define SN5S330_VSAFE0V_STAT BIT(2) +#define SN5S330_VSAFE0V_MASK BIT(3) /* FUNC_SET_10 */ -#define SN5S330_PP1_RCP_OFFSET BIT(4) +#define SN5S330_PP1_RCP_OFFSET BIT(4) /* * INT_MASK_RISE/FALL_EDGE_1 |