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authorKevin K Wong <kevin.k.wong@intel.com>2016-10-17 20:45:36 -0700
committerchrome-bot <chrome-bot@chromium.org>2016-11-11 23:11:43 -0800
commit7300bc56c050d68485368d70d6dc123fbefcd6df (patch)
tree22ecfea4e57b477b5a43b10f0d8c0d01953616c9 /driver
parent3de9c1dcd04b73c069204fcabfc1db4eafc309fe (diff)
downloadchrome-ec-7300bc56c050d68485368d70d6dc123fbefcd6df.tar.gz
reef: enable tcpc low power mode
BUG=chrome-os-partner:55158,chrome-os-partner:55889,chrome-os-partner:55890 BRANCH=none TEST=on reef use ina (pp3300_pd_a_mw) to check tcpc power consumption Change-Id: I5a2904f4e549b7da22242848bb3b1887331ecadd Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-on: https://chromium-review.googlesource.com/399882 Reviewed-by: David Hendricks <dhendrix@chromium.org>
Diffstat (limited to 'driver')
-rw-r--r--driver/tcpm/anx74xx.c3
-rw-r--r--driver/tcpm/tcpci.c3
-rw-r--r--driver/tcpm/tcpci.h1
3 files changed, 7 insertions, 0 deletions
diff --git a/driver/tcpm/anx74xx.c b/driver/tcpm/anx74xx.c
index e22e1a49dd..fc242bc1f0 100644
--- a/driver/tcpm/anx74xx.c
+++ b/driver/tcpm/anx74xx.c
@@ -556,6 +556,9 @@ static int anx74xx_tcpc_drp_toggle(int port)
/* Disable CC software Control */
rv = anx74xx_cc_software_ctrl(port, 0);
+#ifdef CONFIG_USB_PD_TCPC_LOW_POWER
+ anx74xx_set_power_mode(port, ANX74XX_STANDBY_MODE);
+#endif
return rv;
}
#endif
diff --git a/driver/tcpm/tcpci.c b/driver/tcpm/tcpci.c
index a9232e411c..3f4b52657e 100644
--- a/driver/tcpm/tcpci.c
+++ b/driver/tcpm/tcpci.c
@@ -142,6 +142,9 @@ static int tcpci_tcpc_drp_toggle(int port)
rv |= tcpc_write(port, TCPC_REG_COMMAND,
TCPC_REG_COMMAND_LOOK4CONNECTION);
+#ifdef CONFIG_USB_PD_TCPC_LOW_POWER
+ rv |= tcpc_write(port, TCPC_REG_COMMAND, TCPC_REG_COMMAND_I2CIDLE);
+#endif
return rv;
}
#endif
diff --git a/driver/tcpm/tcpci.h b/driver/tcpm/tcpci.h
index 165b206bf1..42f851cfe2 100644
--- a/driver/tcpm/tcpci.h
+++ b/driver/tcpm/tcpci.h
@@ -82,6 +82,7 @@
#define TCPC_REG_COMMAND 0x23
#define TCPC_REG_COMMAND_LOOK4CONNECTION 0x99
+#define TCPC_REG_COMMAND_I2CIDLE 0xFF
#define TCPC_REG_DEV_CAP_1 0x24
#define TCPC_REG_DEV_CAP_2 0x26