summaryrefslogtreecommitdiff
path: root/driver
diff options
context:
space:
mode:
authorDiana Z <dzigterman@chromium.org>2022-09-19 13:07:08 -0600
committerChromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com>2022-09-20 23:31:23 +0000
commite9314be72f512c90917a37957d7e48cabaf55c3d (patch)
treee00c5a62d9b4eff53abb34355b7de149bfdf407d /driver
parent656458dcc316ab75437f24fc03df273f4be2ecd0 (diff)
downloadchrome-ec-e9314be72f512c90917a37957d7e48cabaf55c3d.tar.gz
Zephyr: Add shim support for PS8818
Add support for the PS8818 in the shim so it can be configured using the devicetree. Note that all of the PS8818's include file is "public" in that boards regularly manipulate the registers directly rather than through well-formed APIs. BRANCH=None BUG=b:244457125 TEST=zmake build skyrim Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ia182ca5617d312db2acb8fb7680a7847a3a7ecb8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3905887 Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com> Reviewed-by: Keith Short <keithshort@chromium.org>
Diffstat (limited to 'driver')
-rw-r--r--driver/retimer/ps8818.c2
-rw-r--r--driver/retimer/ps8818.h96
2 files changed, 1 insertions, 97 deletions
diff --git a/driver/retimer/ps8818.c b/driver/retimer/ps8818.c
index e78aa58693..dff1b33a64 100644
--- a/driver/retimer/ps8818.c
+++ b/driver/retimer/ps8818.c
@@ -8,10 +8,10 @@
#include "chipset.h"
#include "common.h"
#include "console.h"
+#include "driver/retimer/ps8818_public.h"
#include "gpio.h"
#include "i2c.h"
#include "ioexpander.h"
-#include "ps8818.h"
#include "usb_mux.h"
#define PS8818_DEBUG 0
diff --git a/driver/retimer/ps8818.h b/driver/retimer/ps8818.h
deleted file mode 100644
index 3f0aba963b..0000000000
--- a/driver/retimer/ps8818.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/* Copyright 2019 The ChromiumOS Authors
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- *
- * PS8818 retimer.
- */
-#include "usb_mux.h"
-
-#ifndef __CROS_EC_USB_RETIMER_PS8818_H
-#define __CROS_EC_USB_RETIMER_PS8818_H
-
-#define PS8818_I2C_ADDR_FLAGS 0x28
-
-/*
- * PAGE 0 Register Definitions
- */
-#define PS8818_REG_PAGE0 0x00
-
-#define PS8818_REG0_FLIP 0x00
-#define PS8818_FLIP_CONFIG BIT(7)
-#define PS8818_FLIP_NON_RESERVED_MASK 0xE0
-
-#define PS8818_REG0_MODE 0x01
-#define PS8818_MODE_DP_ENABLE BIT(7)
-#define PS8818_MODE_USB_ENABLE BIT(6)
-#define PS8818_MODE_NON_RESERVED_MASK 0xC0
-
-#define PS8818_REG0_DPHPD_CONFIG 0x02
-#define PS8818_DPHPD_CONFIG_INHPD_DISABLE BIT(7)
-#define PS8818_DPHPD_PLUGGED BIT(6)
-#define PS8818_DPHPD_NON_RESERVED_MASK 0xFC
-
-/*
- * PAGE 1 Register Definitions
- */
-#define PS8818_REG_PAGE1 0x01
-
-#define PS8818_REG1_APTX1EQ_10G_LEVEL 0x00
-#define PS8818_REG1_APTX2EQ_10G_LEVEL 0x02
-#define PS8818_REG1_CRX1EQ_10G_LEVEL 0x08
-#define PS8818_REG1_CRX2EQ_10G_LEVEL 0x0A
-#define PS8818_REG1_APRX1_DE_LEVEL 0x0C
-#define PS8818_REG1_APTX1EQ_5G_LEVEL 0x70
-#define PS8818_REG1_APTX2EQ_5G_LEVEL 0x72
-#define PS8818_REG1_CRX1EQ_5G_LEVEL 0x78
-#define PS8818_REG1_CRX2EQ_5G_LEVEL 0x7A
-#define PS8818_EQ_LEVEL_UP_9DB (0)
-#define PS8818_EQ_LEVEL_UP_10DB (1)
-#define PS8818_EQ_LEVEL_UP_12DB (2)
-#define PS8818_EQ_LEVEL_UP_13DB (3)
-#define PS8818_EQ_LEVEL_UP_16DB (4)
-#define PS8818_EQ_LEVEL_UP_17DB (5)
-#define PS8818_EQ_LEVEL_UP_18DB (6)
-#define PS8818_EQ_LEVEL_UP_19DB (7)
-#define PS8818_EQ_LEVEL_UP_20DB (8)
-#define PS8818_EQ_LEVEL_UP_21DB (9)
-#define PS8818_EQ_LEVEL_UP_MASK (0x0F)
-
-#define PS8818_REG1_RX_PHY 0x6D
-#define PS8818_RX_INPUT_TERM_112_OHM (0 << 6)
-#define PS8818_RX_INPUT_TERM_104_OHM (1 << 6)
-#define PS8818_RX_INPUT_TERM_96_OHM (2 << 6)
-#define PS8818_RX_INPUT_TERM_85_OHM (3 << 6)
-#define PS8818_RX_INPUT_TERM_MASK (3 << 6)
-
-#define PS8818_REG1_DPEQ_LEVEL 0xB6
-#define PS8818_DPEQ_LEVEL_UP_9DB (0 << 3)
-#define PS8818_DPEQ_LEVEL_UP_10DB (1 << 3)
-#define PS8818_DPEQ_LEVEL_UP_12DB (2 << 3)
-#define PS8818_DPEQ_LEVEL_UP_13DB (3 << 3)
-#define PS8818_DPEQ_LEVEL_UP_16DB (4 << 3)
-#define PS8818_DPEQ_LEVEL_UP_17DB (5 << 3)
-#define PS8818_DPEQ_LEVEL_UP_18DB (6 << 3)
-#define PS8818_DPEQ_LEVEL_UP_19DB (7 << 3)
-#define PS8818_DPEQ_LEVEL_UP_20DB (8 << 3)
-#define PS8818_DPEQ_LEVEL_UP_21DB (9 << 3)
-#define PS8818_DPEQ_LEVEL_UP_MASK (0x0F << 3)
-
-/*
- * PAGE 2 Register Definitions
- */
-#define PS8818_REG_PAGE2 0x02
-
-#define PS8818_REG2_TX_STATUS 0x42
-#define PS8818_REG2_RX_STATUS 0x46
-#define PS8818_STATUS_NORMAL_OPERATION BIT(7)
-#define PS8818_STATUS_10_GBPS BIT(5)
-
-extern const struct usb_mux_driver ps8818_usb_retimer_driver;
-
-int ps8818_i2c_read(const struct usb_mux *me, int page, int offset, int *data);
-int ps8818_i2c_write(const struct usb_mux *me, int page, int offset, int data);
-int ps8818_i2c_field_update8(const struct usb_mux *me, int page, int offset,
- uint8_t field_mask, uint8_t set_value);
-
-#endif /* __CROS_EC_USB_RETIMER_PS8818_H */