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| author | Duncan Laurie <dlaurie@chromium.org> | 2016-01-21 13:37:12 -0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-01-21 23:43:59 -0800 |
| commit | 09a1fee89210ddea70c0935b3d2eea232b7ca28e (patch) | |
| tree | 035a348030ad0386b97ed9dbfaeb001080734dc8 /power/skylake.c | |
| parent | 89bcc93547212bd915b46a4c6df7f4e754cc4f0f (diff) | |
| download | chrome-ec-09a1fee89210ddea70c0935b3d2eea232b7ca28e.tar.gz | |
skylake: Fix for RTCRST check in S5 power down path
The power state machine goes through POWER_S5 state both when
sequencing up and down, but we only should check for it to
time out on the way up. In order to know what direction it
is going add a variable to indicate the direction.
On samus where this was done before it did not go through
POWER_S5 on the way down, instead going directly to POWER_S5G3
so I did not run into this same issue.
BUG=chrome-os-partner:49564
BRANCH=glados
TEST=successfully power down without the EC thinking it is
timing out and trying to reset RTC.
Change-Id: I1f53f3a252bdc2ec8c656e30b3de7f98aaa661a0
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/322898
Reviewed-by: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'power/skylake.c')
| -rw-r--r-- | power/skylake.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/power/skylake.c b/power/skylake.c index d149d0d873..1272575a5b 100644 --- a/power/skylake.c +++ b/power/skylake.c @@ -52,6 +52,7 @@ static int throttle_cpu; /* Throttle CPU? */ static int forcing_shutdown; /* Forced shutdown in progress? */ +static int power_s5_up; /* Chipset is sequencing up or down */ void chipset_force_shutdown(void) { @@ -209,7 +210,8 @@ static enum power_state _power_handle_state(enum power_state state) #ifdef CONFIG_BOARD_HAS_RTC_RESET /* Wait for S5 exit and attempt RTC reset it supported */ - return power_wait_s5_rtc_reset(); + if (power_s5_up) + return power_wait_s5_rtc_reset(); #else if (gpio_get_level(GPIO_PCH_SLP_S4_L) == 1) return POWER_S5S3; /* Power up to next state */ @@ -285,6 +287,7 @@ static enum power_state _power_handle_state(enum power_state state) return POWER_G3; } + power_s5_up = 1; return POWER_S5; case POWER_S5S3: @@ -381,6 +384,7 @@ static enum power_state _power_handle_state(enum power_state state) /* Always enter into S5 state. The S5 state is required to * correctly handle global resets which have a bit of delay * while the SLP_Sx_L signals are asserted then deasserted. */ + power_s5_up = 0; return POWER_S5; case POWER_S5G3: |