x86: generalize power state machine for all platforms (2/2)

Rename x86_* to power_signal_* and X86_* to POWER_*.

BUG=chrome-os-partner:24832
BRANCH=link,falco,samus,rambi,peppy,squawks,snow,spring,nyan
TEST=make -j buildall run_tests

Change-Id: Ifaa06391da5a483851ff56eca91fbf6d038dff0a
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/181719
Reviewed-by: Randall Spangler <rspangler@chromium.org>

6 files changed, 229 insertions, 229 deletions

diff --git a/power/baytrail.c b/power/baytrail.c
index b8144b717d..3cb6d5df7e 100644
--- a/power/baytrail.c
+++ b/power/baytrail.c
@@ -3,10 +3,9 @@
  * found in the LICENSE file.
  */
 
-/* X86 chipset power control module for Chrome EC */
+/* X86 baytrail chipset power control module for Chrome EC */
 
 #include "chipset.h"
-#include "power.h"
 #include "common.h"
 #include "console.h"
 #include "ec_commands.h"
@@ -14,6 +13,7 @@
 #include "hooks.h"
 #include "host_command.h"
 #include "lid_switch.h"
+#include "power.h"
 #include "system.h"
 #include "timer.h"
 #include "util.h"
@@ -24,12 +24,12 @@
 #define CPRINTF(format, args...) cprintf(CC_CHIPSET, format, ## args)
 
 /* Input state flags */
-#define IN_PGOOD_PP5000            X86_SIGNAL_MASK(X86_PGOOD_PP5000)
-#define IN_PGOOD_PP1050            X86_SIGNAL_MASK(X86_PGOOD_PP1050)
-#define IN_PGOOD_S5                X86_SIGNAL_MASK(X86_PGOOD_S5)
-#define IN_PGOOD_VCORE             X86_SIGNAL_MASK(X86_PGOOD_VCORE)
-#define IN_SLP_S3_DEASSERTED       X86_SIGNAL_MASK(X86_SLP_S3_DEASSERTED)
-#define IN_SLP_S4_DEASSERTED       X86_SIGNAL_MASK(X86_SLP_S4_DEASSERTED)
+#define IN_PGOOD_PP5000            POWER_SIGNAL_MASK(X86_PGOOD_PP5000)
+#define IN_PGOOD_PP1050            POWER_SIGNAL_MASK(X86_PGOOD_PP1050)
+#define IN_PGOOD_S5                POWER_SIGNAL_MASK(X86_PGOOD_S5)
+#define IN_PGOOD_VCORE             POWER_SIGNAL_MASK(X86_PGOOD_VCORE)
+#define IN_SLP_S3_DEASSERTED       POWER_SIGNAL_MASK(X86_SLP_S3_DEASSERTED)
+#define IN_SLP_S4_DEASSERTED       POWER_SIGNAL_MASK(X86_SLP_S4_DEASSERTED)
 
 /* All always-on supplies */
 #define IN_PGOOD_ALWAYS_ON   (IN_PGOOD_S5)
@@ -56,7 +56,7 @@ void chipset_force_shutdown(void)
 	CPRINTF("[%T %s()]\n", __func__);
 
 	/*
-	 * Force x86 off. This condition will reset once the state machine
+	 * Force power off. This condition will reset once the state machine
 	 * transitions to G3.
 	 */
 	gpio_set_level(GPIO_PCH_SYS_PWROK, 0);
@@ -103,7 +103,7 @@ void chipset_throttle_cpu(int throttle)
 		gpio_set_level(GPIO_CPU_PROCHOT, throttle);
 }
 
-enum x86_state x86_chipset_init(void)
+enum power_state power_chipset_init(void)
 {
 	/*
 	 * If we're switching between images without rebooting, see if the x86
@@ -111,15 +111,15 @@ enum x86_state x86_chipset_init(void)
 	 * through G3.
 	 */
 	if (system_jumped_to_this_image()) {
-		if ((x86_get_signals() & IN_ALL_S0) == IN_ALL_S0) {
+		if ((power_get_signals() & IN_ALL_S0) == IN_ALL_S0) {
 			/* Disable idle task deep sleep when in S0. */
 			disable_sleep(SLEEP_MASK_AP_RUN);
 
-			CPRINTF("[%T x86 already in S0]\n");
-			return X86_S0;
+			CPRINTF("[%T already in S0]\n");
+			return POWER_S0;
 		} else {
 			/* Force all signals to their G3 states */
-			CPRINTF("[%T x86 forcing G3]\n");
+			CPRINTF("[%T forcing G3]\n");
 			gpio_set_level(GPIO_PCH_CORE_PWROK, 0);
 			gpio_set_level(GPIO_VCORE_EN, 0);
 			gpio_set_level(GPIO_SUSP_VR_EN, 0);
@@ -132,21 +132,21 @@ enum x86_state x86_chipset_init(void)
 		}
 	}
 
-	return X86_G3;
+	return POWER_G3;
 }
 
-enum x86_state x86_handle_state(enum x86_state state)
+enum power_state power_handle_state(enum power_state state)
 {
 	switch (state) {
-	case X86_G3:
+	case POWER_G3:
 		break;
 
-	case X86_S5:
+	case POWER_S5:
 		if (gpio_get_level(GPIO_PCH_SLP_S4_L) == 1)
-			return X86_S5S3; /* Power up to next state */
+			return POWER_S5S3; /* Power up to next state */
 		break;
 
-	case X86_S3:
+	case POWER_S3:
 		/*
 		 * If lid is closed; hold touchscreen in reset to cut power
 		 * usage.  If lid is open, take touchscreen out of reset so it
@@ -156,31 +156,31 @@ enum x86_state x86_handle_state(enum x86_state state)
 		gpio_set_level(GPIO_TOUCHSCREEN_RESET_L, lid_is_open());
 
 		/* Check for state transitions */
-		if (!x86_has_signals(IN_PGOOD_S3)) {
+		if (!power_has_signals(IN_PGOOD_S3)) {
 			/* Required rail went away */
 			chipset_force_shutdown();
-			return X86_S3S5;
+			return POWER_S3S5;
 		} else if (gpio_get_level(GPIO_PCH_SLP_S3_L) == 1) {
 			/* Power up to next state */
-			return X86_S3S0;
+			return POWER_S3S0;
 		} else if (gpio_get_level(GPIO_PCH_SLP_S4_L) == 0) {
 			/* Power down to next state */
-			return X86_S3S5;
+			return POWER_S3S5;
 		}
 		break;
 
-	case X86_S0:
-		if (!x86_has_signals(IN_PGOOD_S0)) {
+	case POWER_S0:
+		if (!power_has_signals(IN_PGOOD_S0)) {
 			/* Required rail went away */
 			chipset_force_shutdown();
-			return X86_S0S3;
+			return POWER_S0S3;
 		} else if (gpio_get_level(GPIO_PCH_SLP_S3_L) == 0) {
 			/* Power down to next state */
-			return X86_S0S3;
+			return POWER_S0S3;
 		}
 		break;
 
-	case X86_G3S5:
+	case POWER_G3S5:
 		/*
 		 * Wait 10ms after +3VALW good, since that powers VccDSW and
 		 * VccSUS.
@@ -188,9 +188,9 @@ enum x86_state x86_handle_state(enum x86_state state)
 		msleep(10);
 
 		gpio_set_level(GPIO_SUSP_VR_EN, 1);
-		if (x86_wait_signals(IN_PGOOD_S5)) {
+		if (power_wait_signals(IN_PGOOD_S5)) {
 			chipset_force_shutdown();
-			return X86_G3;
+			return POWER_G3;
 		}
 
 		/* Deassert RSMRST# */
@@ -198,20 +198,20 @@ enum x86_state x86_handle_state(enum x86_state state)
 
 		/* Wait 10ms for SUSCLK to stabilize */
 		msleep(10);
-		return X86_S5;
+		return POWER_S5;
 
-	case X86_S5S3:
+	case POWER_S5S3:
 		/* Wait for the always-on rails to be good */
-		if (x86_wait_signals(IN_PGOOD_ALWAYS_ON)) {
+		if (power_wait_signals(IN_PGOOD_ALWAYS_ON)) {
 			chipset_force_shutdown();
-			return X86_S5G3;
+			return POWER_S5G3;
 		}
 
 		/* Turn on power to RAM */
 		gpio_set_level(GPIO_PP1350_EN, 1);
-		if (x86_wait_signals(IN_PGOOD_S3)) {
+		if (power_wait_signals(IN_PGOOD_S3)) {
 			chipset_force_shutdown();
-			return X86_S5G3;
+			return POWER_S5G3;
 		}
 
 		/*
@@ -222,9 +222,9 @@ enum x86_state x86_handle_state(enum x86_state state)
 
 		/* Call hooks now that rails are up */
 		hook_notify(HOOK_CHIPSET_STARTUP);
-		return X86_S3;
+		return POWER_S3;
 
-	case X86_S3S0:
+	case POWER_S3S0:
 		/* Turn on power rails */
 		gpio_set_level(GPIO_PP5000_EN, 1);
 		gpio_set_level(GPIO_PP3300_DX_EN, 1);
@@ -240,13 +240,13 @@ enum x86_state x86_handle_state(enum x86_state state)
 		gpio_set_level(GPIO_TOUCHSCREEN_RESET_L, 1);
 
 		/* Wait for non-core power rails good */
-		if (x86_wait_signals(IN_PGOOD_S0)) {
+		if (power_wait_signals(IN_PGOOD_S0)) {
 			chipset_force_shutdown();
 			wireless_enable(0);
 			gpio_set_level(GPIO_PP3300_DX_EN, 0);
 			gpio_set_level(GPIO_PP5000_EN, 0);
 			gpio_set_level(GPIO_TOUCHSCREEN_RESET_L, 0);
-			return X86_S3;
+			return POWER_S3;
 		}
 
 		/*
@@ -276,9 +276,9 @@ enum x86_state x86_handle_state(enum x86_state state)
 		/* Set SYS and CORE PWROK */
 		gpio_set_level(GPIO_PCH_SYS_PWROK, 1);
 		gpio_set_level(GPIO_PCH_CORE_PWROK, 1);
-		return X86_S0;
+		return POWER_S0;
 
-	case X86_S0S3:
+	case POWER_S0S3:
 		/* Call hooks before we remove power rails */
 		hook_notify(HOOK_CHIPSET_SUSPEND);
 
@@ -310,9 +310,9 @@ enum x86_state x86_handle_state(enum x86_state state)
 		/* Turn off power rails */
 		gpio_set_level(GPIO_PP3300_DX_EN, 0);
 		gpio_set_level(GPIO_PP5000_EN, 0);
-		return X86_S3;
+		return POWER_S3;
 
-	case X86_S3S5:
+	case POWER_S3S5:
 		/* Call hooks before we remove power rails */
 		hook_notify(HOOK_CHIPSET_SHUTDOWN);
 
@@ -323,14 +323,14 @@ enum x86_state x86_handle_state(enum x86_state state)
 		gpio_set_level(GPIO_PP1350_EN, 0);
 
 		/* Start shutting down */
-		return pause_in_s5 ? X86_S5 : X86_S5G3;
+		return pause_in_s5 ? POWER_S5 : POWER_S5G3;
 
-	case X86_S5G3:
+	case POWER_S5G3:
 		/* Assert RSMRST# */
 		gpio_set_level(GPIO_PCH_RSMRST_L, 0);
 		gpio_set_level(GPIO_SUSP_VR_EN, 0);
 
-		return X86_G3;
+		return POWER_G3;
 	}
 
 	return state;
diff --git a/power/common.c b/power/common.c
index 8ddabcf962..3a92780bf4 100644
--- a/power/common.c
+++ b/power/common.c
@@ -3,15 +3,15 @@
  * found in the LICENSE file.
  */
 
-/* Common functionality across x86 chipsets */
+/* Common functionality across all chipsets */
 
 #include "chipset.h"
-#include "power.h"
 #include "common.h"
 #include "console.h"
 #include "extpower.h"
 #include "gpio.h"
 #include "hooks.h"
+#include "power.h"
 #include "system.h"
 #include "task.h"
 #include "timer.h"
@@ -47,7 +47,7 @@ static uint32_t in_signals;   /* Current input signal states (IN_PGOOD_*) */
 static uint32_t in_want;      /* Input signal state we're waiting for */
 static uint32_t in_debug;     /* Signal values which print debug output */
 
-static enum x86_state state = X86_G3;  /* Current state */
+static enum power_state state = POWER_G3;  /* Current state */
 static int want_g3_exit;      /* Should we exit the G3 state? */
 static uint64_t last_shutdown_time; /* When did we enter G3? */
 
@@ -57,40 +57,40 @@ static uint32_t hibernate_delay = 3600;
 /**
  * Update input signals mask
  */
-static void x86_update_signals(void)
+static void power_update_signals(void)
 {
 	uint32_t inew = 0;
-	const struct x86_signal_info *s = x86_signal_list;
+	const struct power_signal_info *s = power_signal_list;
 	int i;
 
-	for (i = 0; i < X86_SIGNAL_COUNT; i++, s++) {
+	for (i = 0; i < POWER_SIGNAL_COUNT; i++, s++) {
 		if (gpio_get_level(s->gpio) == s->level)
 			inew |= 1 << i;
 	}
 
 	if ((in_signals & in_debug) != (inew & in_debug))
-		CPRINTF("[%T x86 in 0x%04x]\n", inew);
+		CPRINTF("[%T power in 0x%04x]\n", inew);
 
 	in_signals = inew;
 }
 
-uint32_t x86_get_signals(void)
+uint32_t power_get_signals(void)
 {
 	return in_signals;
 }
 
-int x86_has_signals(uint32_t want)
+int power_has_signals(uint32_t want)
 {
 	if ((in_signals & want) == want)
 		return 1;
 
-	CPRINTF("[%T x86 power lost input; wanted 0x%04x, got 0x%04x]\n",
+	CPRINTF("[%T power lost input; wanted 0x%04x, got 0x%04x]\n",
 		want, in_signals & want);
 
 	return 0;
 }
 
-int x86_wait_signals(uint32_t want)
+int power_wait_signals(uint32_t want)
 {
 	in_want = want;
 	if (!want)
@@ -98,8 +98,8 @@ int x86_wait_signals(uint32_t want)
 
 	while ((in_signals & in_want) != in_want) {
 		if (task_wait_event(DEFAULT_TIMEOUT) == TASK_EVENT_TIMER) {
-			x86_update_signals();
-			CPRINTF("[%T x86 power timeout on input; "
+			power_update_signals();
+			CPRINTF("[%T power timeout on input; "
 				"wanted 0x%04x, got 0x%04x]\n",
 				in_want, in_signals & in_want);
 			return EC_ERROR_TIMEOUT;
@@ -115,32 +115,32 @@ int x86_wait_signals(uint32_t want)
 }
 
 /**
- * Set the low-level x86 chipset state.
+ * Set the low-level power chipset state.
  *
  * @param new_state	New chipset state.
  */
-void x86_set_state(enum x86_state new_state)
+void power_set_state(enum power_state new_state)
 {
 	/* Record the time we go into G3 */
-	if (new_state == X86_G3)
+	if (new_state == POWER_G3)
 		last_shutdown_time = get_time().val;
 
 	state = new_state;
 }
 
 /**
- * Common handler for x86 steady states
+ * Common handler for steady states
  *
- * @param state		Current x86 state
- * @return Updated x86 state
+ * @param state		Current power state
+ * @return Updated power state
  */
-static enum x86_state x86_common_state(enum x86_state state)
+static enum power_state power_common_state(enum power_state state)
 {
 	switch (state) {
-	case X86_G3:
+	case POWER_G3:
 		if (want_g3_exit) {
 			want_g3_exit = 0;
-			return X86_G3S5;
+			return POWER_G3S5;
 		}
 
 		in_want = 0;
@@ -155,7 +155,7 @@ static enum x86_state x86_common_state(enum x86_state state)
 				 * Time's up.  Hibernate until wake pin
 				 * asserted.
 				 */
-				CPRINTF("[%T x86 hibernating]\n");
+				CPRINTF("[%T hibernating]\n");
 				system_hibernate(0, 0);
 			} else {
 				uint64_t wait = target_time - time_now;
@@ -168,26 +168,26 @@ static enum x86_state x86_common_state(enum x86_state state)
 		}
 		break;
 
-	case X86_S5:
+	case POWER_S5:
 		/* Wait for inactivity timeout */
-		x86_wait_signals(0);
+		power_wait_signals(0);
 		if (task_wait_event(S5_INACTIVITY_TIMEOUT) ==
 		    TASK_EVENT_TIMER) {
 			/* Drop to G3; wake not requested yet */
 			want_g3_exit = 0;
-			return X86_S5G3;
+			return POWER_S5G3;
 		}
 		break;
 
-	case X86_S3:
+	case POWER_S3:
 		/* Wait for a message */
-		x86_wait_signals(0);
+		power_wait_signals(0);
 		task_wait_event(-1);
 		break;
 
-	case X86_S0:
+	case POWER_S0:
 		/* Wait for a message */
-		x86_wait_signals(0);
+		power_wait_signals(0);
 		task_wait_event(-1);
 		break;
 
@@ -212,32 +212,32 @@ int chipset_in_state(int state_mask)
 	 * return non-zero.
 	 */
 	switch (state) {
-	case X86_G3:
+	case POWER_G3:
 		need_mask = CHIPSET_STATE_HARD_OFF;
 		break;
-	case X86_G3S5:
-	case X86_S5G3:
+	case POWER_G3S5:
+	case POWER_S5G3:
 		/*
 		 * In between hard and soft off states.  Match only if caller
 		 * will accept both.
 		 */
 		need_mask = CHIPSET_STATE_HARD_OFF | CHIPSET_STATE_SOFT_OFF;
 		break;
-	case X86_S5:
+	case POWER_S5:
 		need_mask = CHIPSET_STATE_SOFT_OFF;
 		break;
-	case X86_S5S3:
-	case X86_S3S5:
+	case POWER_S5S3:
+	case POWER_S3S5:
 		need_mask = CHIPSET_STATE_SOFT_OFF | CHIPSET_STATE_SUSPEND;
 		break;
-	case X86_S3:
+	case POWER_S3:
 		need_mask = CHIPSET_STATE_SUSPEND;
 		break;
-	case X86_S3S0:
-	case X86_S0S3:
+	case POWER_S3S0:
+	case POWER_S0S3:
 		need_mask = CHIPSET_STATE_SUSPEND | CHIPSET_STATE_ON;
 		break;
-	case X86_S0:
+	case POWER_S0:
 		need_mask = CHIPSET_STATE_ON;
 		break;
 	}
@@ -249,7 +249,7 @@ int chipset_in_state(int state_mask)
 void chipset_exit_hard_off(void)
 {
 	/* If not in the hard-off state nor headed there, nothing to do */
-	if (state != X86_G3 && state != X86_S5G3)
+	if (state != POWER_G3 && state != POWER_S5G3)
 		return;
 
 	/* Set a flag to leave G3, then wake the task */
@@ -264,77 +264,77 @@ void chipset_exit_hard_off(void)
 
 void chipset_task(void)
 {
-	enum x86_state new_state;
+	enum power_state new_state;
 
 	while (1) {
-		CPRINTF("[%T x86 power state %d = %s, in 0x%04x]\n",
+		CPRINTF("[%T power state %d = %s, in 0x%04x]\n",
 			state, state_names[state], in_signals);
 
 		/* Always let the specific chipset handle the state first */
-		new_state = x86_handle_state(state);
+		new_state = power_handle_state(state);
 
 		/*
 		 * If the state hasn't changed, run common steady-state
 		 * handler.
 		 */
 		if (new_state == state)
-			new_state = x86_common_state(state);
+			new_state = power_common_state(state);
 
 		/* Handle state changes */
 		if (new_state != state)
-			x86_set_state(new_state);
+			power_set_state(new_state);
 	}
 }
 
 /*****************************************************************************/
 /* Hooks */
 
-static void x86_common_init(void)
+static void power_common_init(void)
 {
-	const struct x86_signal_info *s = x86_signal_list;
+	const struct power_signal_info *s = power_signal_list;
 	int i;
 
 	/* Update input state */
-	x86_update_signals();
+	power_update_signals();
 
 	/* Call chipset-specific init to set initial state */
-	x86_set_state(x86_chipset_init());
+	power_set_state(power_chipset_init());
 
 	/* Enable interrupts for input signals */
-	for (i = 0; i < X86_SIGNAL_COUNT; i++, s++)
+	for (i = 0; i < POWER_SIGNAL_COUNT; i++, s++)
 		gpio_enable_interrupt(s->gpio);
 }
-DECLARE_HOOK(HOOK_INIT, x86_common_init, HOOK_PRIO_INIT_CHIPSET);
+DECLARE_HOOK(HOOK_INIT, power_common_init, HOOK_PRIO_INIT_CHIPSET);
 
-static void x86_lid_change(void)
+static void power_lid_change(void)
 {
 	/* Wake up the task to update power state */
 	task_wake(TASK_ID_CHIPSET);
 }
-DECLARE_HOOK(HOOK_LID_CHANGE, x86_lid_change, HOOK_PRIO_DEFAULT);
+DECLARE_HOOK(HOOK_LID_CHANGE, power_lid_change, HOOK_PRIO_DEFAULT);
 
-static void x86_ac_change(void)
+static void power_ac_change(void)
 {
 	if (extpower_is_present()) {
-		CPRINTF("[%T x86 AC on]\n");
+		CPRINTF("[%T AC on]\n");
 	} else {
-		CPRINTF("[%T x86 AC off]\n");
+		CPRINTF("[%T AC off]\n");
 
-		if (state == X86_G3) {
+		if (state == POWER_G3) {
 			last_shutdown_time = get_time().val;
 			task_wake(TASK_ID_CHIPSET);
 		}
 	}
 }
-DECLARE_HOOK(HOOK_AC_CHANGE, x86_ac_change, HOOK_PRIO_DEFAULT);
+DECLARE_HOOK(HOOK_AC_CHANGE, power_ac_change, HOOK_PRIO_DEFAULT);
 
 /*****************************************************************************/
 /* Interrupts */
 
-void x86_interrupt(enum gpio_signal signal)
+void power_signal_interrupt(enum gpio_signal signal)
 {
 	/* Shadow signals and compare with our desired signal state. */
-	x86_update_signals();
+	power_update_signals();
 
 	/* Wake up the task */
 	task_wake(TASK_ID_CHIPSET);
@@ -346,22 +346,22 @@ void x86_interrupt(enum gpio_signal signal)
 static int command_powerinfo(int argc, char **argv)
 {
 	/*
-	 * Print x86 power state in same format as state machine.  This is
+	 * Print power state in same format as state machine.  This is
 	 * used by FAFT tests, so must match exactly.
 	 */
-	ccprintf("[%T x86 power state %d = %s, in 0x%04x]\n",
+	ccprintf("[%T power state %d = %s, in 0x%04x]\n",
 		 state, state_names[state], in_signals);
 
 	return EC_SUCCESS;
 }
 DECLARE_CONSOLE_COMMAND(powerinfo, command_powerinfo,
 			NULL,
-			"Show current x86 power state",
+			"Show current power state",
 			NULL);
 
-static int command_x86indebug(int argc, char **argv)
+static int command_powerindebug(int argc, char **argv)
 {
-	const struct x86_signal_info *s = x86_signal_list;
+	const struct power_signal_info *s = power_signal_list;
 	int i;
 	char *e;
 
@@ -375,13 +375,13 @@ static int command_x86indebug(int argc, char **argv)
 	}
 
 	/* Print the mask */
-	ccprintf("x86 in:     0x%04x\n", in_signals);
+	ccprintf("power in:   0x%04x\n", in_signals);
 	ccprintf("debug mask: 0x%04x\n", in_debug);
 
 	/* Print the decode */
 
 	ccprintf("bit meanings:\n");
-	for (i = 0; i < X86_SIGNAL_COUNT; i++, s++) {
+	for (i = 0; i < POWER_SIGNAL_COUNT; i++, s++) {
 		int mask = 1 << i;
 		ccprintf("  0x%04x %d %s\n",
 			 mask, in_signals & mask ? 1 : 0, s->name);
@@ -389,9 +389,9 @@ static int command_x86indebug(int argc, char **argv)
 
 	return EC_SUCCESS;
 };
-DECLARE_CONSOLE_COMMAND(x86indebug, command_x86indebug,
+DECLARE_CONSOLE_COMMAND(powerindebug, command_powerindebug,
 			"[mask]",
-			"Get/set x86 input debug mask",
+			"Get/set power input debug mask",
 			NULL);
 
 static int command_hibernation_delay(int argc, char **argv)
@@ -410,7 +410,7 @@ static int command_hibernation_delay(int argc, char **argv)
 
 	/* Print the current setting */
 	ccprintf("Hibernation delay: %d s\n", hibernate_delay);
-	if (state == X86_G3 && !extpower_is_present()) {
+	if (state == POWER_G3 && !extpower_is_present()) {
 		ccprintf("Time G3: %d s\n", time_g3);
 		ccprintf("Time left: %d s\n", hibernate_delay - time_g3);
 	}
diff --git a/power/gaia.c b/power/gaia.c
index 0726198a2b..523c20ed70 100644
--- a/power/gaia.c
+++ b/power/gaia.c
@@ -283,7 +283,7 @@ static void gaia_suspend_deferred(void)
 }
 DECLARE_DEFERRED(gaia_suspend_deferred);
 
-void power_interrupt(enum gpio_signal signal)
+void power_signal_interrupt(enum gpio_signal signal)
 {
 	if (signal == GPIO_SUSPEND_L) {
 		/* Handle suspend events in the hook task */
diff --git a/power/haswell.c b/power/haswell.c
index f9ee85d0c9..df727d2983 100644
--- a/power/haswell.c
+++ b/power/haswell.c
@@ -3,10 +3,9 @@
  * found in the LICENSE file.
  */
 
-/* X86 chipset power control module for Chrome EC */
+/* X86 haswell chipset power control module for Chrome EC */
 
 #include "chipset.h"
-#include "power.h"
 #include "common.h"
 #include "console.h"
 #include "ec_commands.h"
@@ -14,6 +13,7 @@
 #include "hooks.h"
 #include "host_command.h"
 #include "lid_switch.h"
+#include "power.h"
 #include "system.h"
 #include "timer.h"
 #include "util.h"
@@ -24,14 +24,14 @@
 #define CPRINTF(format, args...) cprintf(CC_CHIPSET, format, ## args)
 
 /* Input state flags */
-#define IN_PGOOD_PP5000            X86_SIGNAL_MASK(X86_PGOOD_PP5000)
-#define IN_PGOOD_PP1350            X86_SIGNAL_MASK(X86_PGOOD_PP1350)
-#define IN_PGOOD_PP1050            X86_SIGNAL_MASK(X86_PGOOD_PP1050)
-#define IN_PGOOD_VCORE             X86_SIGNAL_MASK(X86_PGOOD_VCORE)
-#define IN_SLP_S0_DEASSERTED       X86_SIGNAL_MASK(X86_SLP_S0_DEASSERTED)
-#define IN_SLP_S3_DEASSERTED       X86_SIGNAL_MASK(X86_SLP_S3_DEASSERTED)
-#define IN_SLP_S5_DEASSERTED       X86_SIGNAL_MASK(X86_SLP_S5_DEASSERTED)
-#define IN_SLP_SUS_DEASSERTED      X86_SIGNAL_MASK(X86_SLP_SUS_DEASSERTED)
+#define IN_PGOOD_PP5000            POWER_SIGNAL_MASK(X86_PGOOD_PP5000)
+#define IN_PGOOD_PP1350            POWER_SIGNAL_MASK(X86_PGOOD_PP1350)
+#define IN_PGOOD_PP1050            POWER_SIGNAL_MASK(X86_PGOOD_PP1050)
+#define IN_PGOOD_VCORE             POWER_SIGNAL_MASK(X86_PGOOD_VCORE)
+#define IN_SLP_S0_DEASSERTED       POWER_SIGNAL_MASK(X86_SLP_S0_DEASSERTED)
+#define IN_SLP_S3_DEASSERTED       POWER_SIGNAL_MASK(X86_SLP_S3_DEASSERTED)
+#define IN_SLP_S5_DEASSERTED       POWER_SIGNAL_MASK(X86_SLP_S5_DEASSERTED)
+#define IN_SLP_SUS_DEASSERTED      POWER_SIGNAL_MASK(X86_SLP_SUS_DEASSERTED)
 
 /* All always-on supplies */
 #define IN_PGOOD_ALWAYS_ON   (IN_PGOOD_PP5000)
@@ -59,7 +59,7 @@ void chipset_force_shutdown(void)
 	CPRINTF("[%T %s()]\n", __func__);
 
 	/*
-	 * Force x86 off. This condition will reset once the state machine
+	 * Force power off. This condition will reset once the state machine
 	 * transitions to G3.
 	 */
 	gpio_set_level(GPIO_PCH_DPWROK, 0);
@@ -117,7 +117,7 @@ void chipset_throttle_cpu(int throttle)
 		gpio_set_level(GPIO_CPU_PROCHOT, throttle);
 }
 
-enum x86_state x86_chipset_init(void)
+enum power_state power_chipset_init(void)
 {
 	/* Enable interrupts for our GPIOs */
 	gpio_enable_interrupt(GPIO_PCH_EDP_VDD_EN);
@@ -128,14 +128,14 @@ enum x86_state x86_chipset_init(void)
 	 * through G3.
 	 */
 	if (system_jumped_to_this_image()) {
-		if ((x86_get_signals() & IN_ALL_S0) == IN_ALL_S0) {
+		if ((power_get_signals() & IN_ALL_S0) == IN_ALL_S0) {
 			/* Disable idle task deep sleep when in S0. */
 			disable_sleep(SLEEP_MASK_AP_RUN);
-			CPRINTF("[%T x86 already in S0]\n");
-			return X86_S0;
+			CPRINTF("[%T already in S0]\n");
+			return POWER_S0;
 		} else {
 			/* Force all signals to their G3 states */
-			CPRINTF("[%T x86 forcing G3]\n");
+			CPRINTF("[%T forcing G3]\n");
 			gpio_set_level(GPIO_PCH_PWROK, 0);
 			gpio_set_level(GPIO_VCORE_EN, 0);
 			gpio_set_level(GPIO_SUSP_VR_EN, 0);
@@ -149,21 +149,21 @@ enum x86_state x86_chipset_init(void)
 		}
 	}
 
-	return X86_G3;
+	return POWER_G3;
 }
 
-enum x86_state x86_handle_state(enum x86_state state)
+enum power_state power_handle_state(enum power_state state)
 {
 	switch (state) {
-	case X86_G3:
+	case POWER_G3:
 		break;
 
-	case X86_S5:
+	case POWER_S5:
 		if (gpio_get_level(GPIO_PCH_SLP_S5_L) == 1)
-			return X86_S5S3; /* Power up to next state */
+			return POWER_S5S3; /* Power up to next state */
 		break;
 
-	case X86_S3:
+	case POWER_S3:
 		/*
 		 * If lid is closed; hold touchscreen in reset to cut power
 		 * usage.  If lid is open, take touchscreen out of reset so it
@@ -173,31 +173,31 @@ enum x86_state x86_handle_state(enum x86_state state)
 		gpio_set_level(GPIO_TOUCHSCREEN_RESET_L, lid_is_open());
 
 		/* Check for state transitions */
-		if (!x86_has_signals(IN_PGOOD_S3)) {
+		if (!power_has_signals(IN_PGOOD_S3)) {
 			/* Required rail went away */
 			chipset_force_shutdown();
-			return X86_S3S5;
+			return POWER_S3S5;
 		} else if (gpio_get_level(GPIO_PCH_SLP_S3_L) == 1) {
 			/* Power up to next state */
-			return X86_S3S0;
+			return POWER_S3S0;
 		} else if (gpio_get_level(GPIO_PCH_SLP_S5_L) == 0) {
 			/* Power down to next state */
-			return X86_S3S5;
+			return POWER_S3S5;
 		}
 		break;
 
-	case X86_S0:
-		if (!x86_has_signals(IN_PGOOD_S0)) {
+	case POWER_S0:
+		if (!power_has_signals(IN_PGOOD_S0)) {
 			/* Required rail went away */
 			chipset_force_shutdown();
-			return X86_S0S3;
+			return POWER_S0S3;
 		} else if (gpio_get_level(GPIO_PCH_SLP_S3_L) == 0) {
 			/* Power down to next state */
-			return X86_S0S3;
+			return POWER_S0S3;
 		}
 		break;
 
-	case X86_G3S5:
+	case POWER_G3S5:
 		/*
 		 * Wait 10ms after +3VALW good, since that powers VccDSW and
 		 * VccSUS.
@@ -206,15 +206,15 @@ enum x86_state x86_handle_state(enum x86_state state)
 
 		/* Assert DPWROK */
 		gpio_set_level(GPIO_PCH_DPWROK, 1);
-		if (x86_wait_signals(IN_SLP_SUS_DEASSERTED)) {
+		if (power_wait_signals(IN_SLP_SUS_DEASSERTED)) {
 			chipset_force_shutdown();
-			return X86_G3;
+			return POWER_G3;
 		}
 
 		gpio_set_level(GPIO_SUSP_VR_EN, 1);
-		if (x86_wait_signals(IN_PGOOD_PP1050)) {
+		if (power_wait_signals(IN_PGOOD_PP1050)) {
 			chipset_force_shutdown();
-			return X86_G3;
+			return POWER_G3;
 		}
 
 		/* Deassert RSMRST# */
@@ -222,27 +222,27 @@ enum x86_state x86_handle_state(enum x86_state state)
 
 		/* Wait 5ms for SUSCLK to stabilize */
 		msleep(5);
-		return X86_S5;
+		return POWER_S5;
 
-	case X86_S5S3:
+	case POWER_S5S3:
 		/* Enable PP5000 (5V) rail. */
 		gpio_set_level(GPIO_PP5000_EN, 1);
-		if (x86_wait_signals(IN_PGOOD_PP5000)) {
+		if (power_wait_signals(IN_PGOOD_PP5000)) {
 			chipset_force_shutdown();
-			return X86_G3;
+			return POWER_G3;
 		}
 
 		/* Wait for the always-on rails to be good */
-		if (x86_wait_signals(IN_PGOOD_ALWAYS_ON)) {
+		if (power_wait_signals(IN_PGOOD_ALWAYS_ON)) {
 			chipset_force_shutdown();
-			return X86_S5G3;
+			return POWER_S5G3;
 		}
 
 		/* Turn on power to RAM */
 		gpio_set_level(GPIO_PP1350_EN, 1);
-		if (x86_wait_signals(IN_PGOOD_S3)) {
+		if (power_wait_signals(IN_PGOOD_S3)) {
 			chipset_force_shutdown();
-			return X86_S5G3;
+			return POWER_S5G3;
 		}
 
 		/*
@@ -253,9 +253,9 @@ enum x86_state x86_handle_state(enum x86_state state)
 
 		/* Call hooks now that rails are up */
 		hook_notify(HOOK_CHIPSET_STARTUP);
-		return X86_S3;
+		return POWER_S3;
 
-	case X86_S3S0:
+	case POWER_S3S0:
 		/* Turn on power rails */
 		gpio_set_level(GPIO_PP3300_DX_EN, 1);
 
@@ -270,13 +270,13 @@ enum x86_state x86_handle_state(enum x86_state state)
 		gpio_set_level(GPIO_TOUCHSCREEN_RESET_L, 1);
 
 		/* Wait for non-core power rails good */
-		if (x86_wait_signals(IN_PGOOD_S0)) {
+		if (power_wait_signals(IN_PGOOD_S0)) {
 			chipset_force_shutdown();
 			wireless_enable(0);
 			gpio_set_level(GPIO_EC_EDP_VDD_EN, 0);
 			gpio_set_level(GPIO_PP3300_DX_EN, 0);
 			gpio_set_level(GPIO_TOUCHSCREEN_RESET_L, 0);
-			return X86_S3;
+			return POWER_S3;
 		}
 
 		/*
@@ -306,9 +306,9 @@ enum x86_state x86_handle_state(enum x86_state state)
 		/* Set PCH_PWROK */
 		gpio_set_level(GPIO_PCH_PWROK, 1);
 		gpio_set_level(GPIO_SYS_PWROK, 1);
-		return X86_S0;
+		return POWER_S0;
 
-	case X86_S0S3:
+	case POWER_S0S3:
 		/* Call hooks before we remove power rails */
 		hook_notify(HOOK_CHIPSET_SUSPEND);
 
@@ -340,9 +340,9 @@ enum x86_state x86_handle_state(enum x86_state state)
 		/* Turn off power rails */
 		gpio_set_level(GPIO_EC_EDP_VDD_EN, 0);
 		gpio_set_level(GPIO_PP3300_DX_EN, 0);
-		return X86_S3;
+		return POWER_S3;
 
-	case X86_S3S5:
+	case POWER_S3S5:
 		/* Call hooks before we remove power rails */
 		hook_notify(HOOK_CHIPSET_SHUTDOWN);
 
@@ -356,14 +356,14 @@ enum x86_state x86_handle_state(enum x86_state state)
 		gpio_set_level(GPIO_PP5000_EN, 0);
 
 		/* Start shutting down */
-		return pause_in_s5 ? X86_S5 : X86_S5G3;
+		return pause_in_s5 ? POWER_S5 : POWER_S5G3;
 
-	case X86_S5G3:
+	case POWER_S5G3:
 		/* Deassert DPWROK, assert RSMRST# */
 		gpio_set_level(GPIO_PCH_DPWROK, 0);
 		gpio_set_level(GPIO_PCH_RSMRST_L, 0);
 		gpio_set_level(GPIO_SUSP_VR_EN, 0);
-		return X86_G3;
+		return POWER_G3;
 	}
 
 	return state;
diff --git a/power/ivybridge.c b/power/ivybridge.c
index 5b61c04eef..587960bea8 100644
--- a/power/ivybridge.c
+++ b/power/ivybridge.c
@@ -3,15 +3,15 @@
  * found in the LICENSE file.
  */
 
-/* X86 chipset power control module for Chrome EC */
+/* X86 ivybridge chipset power control module for Chrome EC */
 
 #include "chipset.h"
-#include "power.h"
 #include "common.h"
 #include "console.h"
 #include "gpio.h"
 #include "hooks.h"
 #include "lid_switch.h"
+#include "power.h"
 #include "system.h"
 #include "timer.h"
 #include "util.h"
@@ -22,20 +22,20 @@
 #define CPRINTF(format, args...) cprintf(CC_CHIPSET, format, ## args)
 
 /* Input state flags */
-#define IN_PGOOD_5VALW             X86_SIGNAL_MASK(X86_PGOOD_5VALW)
-#define IN_PGOOD_1_5V_DDR          X86_SIGNAL_MASK(X86_PGOOD_1_5V_DDR)
-#define IN_PGOOD_1_5V_PCH          X86_SIGNAL_MASK(X86_PGOOD_1_5V_PCH)
-#define IN_PGOOD_1_8VS             X86_SIGNAL_MASK(X86_PGOOD_1_8VS)
-#define IN_PGOOD_VCCP              X86_SIGNAL_MASK(X86_PGOOD_VCCP)
-#define IN_PGOOD_VCCSA             X86_SIGNAL_MASK(X86_PGOOD_VCCSA)
-#define IN_PGOOD_CPU_CORE          X86_SIGNAL_MASK(X86_PGOOD_CPU_CORE)
-#define IN_PGOOD_VGFX_CORE         X86_SIGNAL_MASK(X86_PGOOD_VGFX_CORE)
-#define IN_SLP_S3_DEASSERTED       X86_SIGNAL_MASK(X86_SLP_S3_DEASSERTED)
-#define IN_SLP_S4_DEASSERTED       X86_SIGNAL_MASK(X86_SLP_S4_DEASSERTED)
-#define IN_SLP_S5_DEASSERTED       X86_SIGNAL_MASK(X86_SLP_S5_DEASSERTED)
-#define IN_SLP_A_DEASSERTED        X86_SIGNAL_MASK(X86_SLP_A_DEASSERTED)
-#define IN_SLP_SUS_DEASSERTED      X86_SIGNAL_MASK(X86_SLP_SUS_DEASSERTED)
-#define IN_SLP_ME_DEASSERTED       X86_SIGNAL_MASK(X86_SLP_ME_DEASSERTED)
+#define IN_PGOOD_5VALW             POWER_SIGNAL_MASK(X86_PGOOD_5VALW)
+#define IN_PGOOD_1_5V_DDR          POWER_SIGNAL_MASK(X86_PGOOD_1_5V_DDR)
+#define IN_PGOOD_1_5V_PCH          POWER_SIGNAL_MASK(X86_PGOOD_1_5V_PCH)
+#define IN_PGOOD_1_8VS             POWER_SIGNAL_MASK(X86_PGOOD_1_8VS)
+#define IN_PGOOD_VCCP              POWER_SIGNAL_MASK(X86_PGOOD_VCCP)
+#define IN_PGOOD_VCCSA             POWER_SIGNAL_MASK(X86_PGOOD_VCCSA)
+#define IN_PGOOD_CPU_CORE          POWER_SIGNAL_MASK(X86_PGOOD_CPU_CORE)
+#define IN_PGOOD_VGFX_CORE         POWER_SIGNAL_MASK(X86_PGOOD_VGFX_CORE)
+#define IN_SLP_S3_DEASSERTED       POWER_SIGNAL_MASK(X86_SLP_S3_DEASSERTED)
+#define IN_SLP_S4_DEASSERTED       POWER_SIGNAL_MASK(X86_SLP_S4_DEASSERTED)
+#define IN_SLP_S5_DEASSERTED       POWER_SIGNAL_MASK(X86_SLP_S5_DEASSERTED)
+#define IN_SLP_A_DEASSERTED        POWER_SIGNAL_MASK(X86_SLP_A_DEASSERTED)
+#define IN_SLP_SUS_DEASSERTED      POWER_SIGNAL_MASK(X86_SLP_SUS_DEASSERTED)
+#define IN_SLP_ME_DEASSERTED       POWER_SIGNAL_MASK(X86_SLP_ME_DEASSERTED)
 
 /* All always-on supplies */
 #define IN_PGOOD_ALWAYS_ON   (IN_PGOOD_5VALW)
@@ -65,7 +65,7 @@ void chipset_force_shutdown(void)
 	CPRINTF("[%T chipset force shutdown]\n");
 
 	/*
-	 * Force x86 off. This condition will reset once the state machine
+	 * Force power off. This condition will reset once the state machine
 	 * transitions to G3.
 	 */
 	gpio_set_level(GPIO_PCH_DPWROK, 0);
@@ -115,7 +115,7 @@ void chipset_throttle_cpu(int throttle)
 		gpio_set_level(GPIO_CPU_PROCHOT, throttle);
 }
 
-enum x86_state x86_chipset_init(void)
+enum power_state power_chipset_init(void)
 {
 	/*
 	 * If we're switching between images without rebooting, see if the x86
@@ -123,12 +123,12 @@ enum x86_state x86_chipset_init(void)
 	 * through G3.
 	 */
 	if (system_jumped_to_this_image()) {
-		if ((x86_get_signals() & IN_ALL_S0) == IN_ALL_S0) {
-			CPRINTF("[%T x86 already in S0]\n");
-			return X86_S0;
+		if ((power_get_signals() & IN_ALL_S0) == IN_ALL_S0) {
+			CPRINTF("[%T already in S0]\n");
+			return POWER_S0;
 		} else {
 			/* Force all signals to their G3 states */
-			CPRINTF("[%T x86 forcing G3]\n");
+			CPRINTF("[%T forcing G3]\n");
 			gpio_set_level(GPIO_PCH_PWROK, 0);
 			gpio_set_level(GPIO_ENABLE_VCORE, 0);
 			gpio_set_level(GPIO_ENABLE_VS, 0);
@@ -140,23 +140,23 @@ enum x86_state x86_chipset_init(void)
 		}
 	}
 
-	return X86_G3;
+	return POWER_G3;
 }
 
-enum x86_state x86_handle_state(enum x86_state state)
+enum power_state power_handle_state(enum power_state state)
 {
 	switch (state) {
-	case X86_G3:
+	case POWER_G3:
 		break;
 
-	case X86_S5:
+	case POWER_S5:
 		if (gpio_get_level(GPIO_PCH_SLP_S5_L) == 1) {
 			/* Power up to next state */
-			return X86_S5S3;
+			return POWER_S5S3;
 		}
 		break;
 
-	case X86_S3:
+	case POWER_S3:
 		/*
 		 * If lid is closed; hold touchscreen in reset to cut power
 		 * usage.  If lid is open, take touchscreen out of reset so it
@@ -165,31 +165,31 @@ enum x86_state x86_handle_state(enum x86_state state)
 		gpio_set_level(GPIO_TOUCHSCREEN_RESET_L, lid_is_open());
 
 		/* Check for state transitions */
-		if (!x86_has_signals(IN_PGOOD_S3)) {
+		if (!power_has_signals(IN_PGOOD_S3)) {
 			/* Required rail went away */
 			chipset_force_shutdown();
-			return X86_S3S5;
+			return POWER_S3S5;
 		} else if (gpio_get_level(GPIO_PCH_SLP_S3_L) == 1) {
 			/* Power up to next state */
-			return X86_S3S0;
+			return POWER_S3S0;
 		} else if (gpio_get_level(GPIO_PCH_SLP_S5_L) == 0) {
 			/* Power down to next state */
-			return X86_S3S5;
+			return POWER_S3S5;
 		}
 		break;
 
-	case X86_S0:
-		if (!x86_has_signals(IN_PGOOD_S0)) {
+	case POWER_S0:
+		if (!power_has_signals(IN_PGOOD_S0)) {
 			/* Required rail went away */
 			chipset_force_shutdown();
-			return X86_S0S3;
+			return POWER_S0S3;
 		} else if (gpio_get_level(GPIO_PCH_SLP_S3_L) == 0) {
 			/* Power down to next state */
-			return X86_S0S3;
+			return POWER_S0S3;
 		}
 		break;
 
-	case X86_G3S5:
+	case POWER_G3S5:
 		/*
 		 * Wait 10ms after +3VALW good, since that powers VccDSW and
 		 * VccSUS.
@@ -202,13 +202,13 @@ enum x86_state x86_handle_state(enum x86_state state)
 
 		/* Wait 5ms for SUSCLK to stabilize */
 		msleep(5);
-		return X86_S5;
+		return POWER_S5;
 
-	case X86_S5S3:
+	case POWER_S5S3:
 		/* Wait for the always-on rails to be good */
-		if (x86_wait_signals(IN_PGOOD_ALWAYS_ON)) {
+		if (power_wait_signals(IN_PGOOD_ALWAYS_ON)) {
 			chipset_force_shutdown();
-			return X86_S5;
+			return POWER_S5;
 		}
 
 		/*
@@ -219,9 +219,9 @@ enum x86_state x86_handle_state(enum x86_state state)
 
 		/* Turn on power to RAM */
 		gpio_set_level(GPIO_ENABLE_1_5V_DDR, 1);
-		if (x86_wait_signals(IN_PGOOD_S3)) {
+		if (power_wait_signals(IN_PGOOD_S3)) {
 			chipset_force_shutdown();
-			return X86_S5;
+			return POWER_S5;
 		}
 
 		/*
@@ -232,9 +232,9 @@ enum x86_state x86_handle_state(enum x86_state state)
 
 		/* Call hooks now that rails are up */
 		hook_notify(HOOK_CHIPSET_STARTUP);
-		return X86_S3;
+		return POWER_S3;
 
-	case X86_S3S0:
+	case POWER_S3S0:
 		/* Turn on power rails */
 		gpio_set_level(GPIO_ENABLE_VS, 1);
 
@@ -249,12 +249,12 @@ enum x86_state x86_handle_state(enum x86_state state)
 		gpio_set_level(GPIO_TOUCHSCREEN_RESET_L, 1);
 
 		/* Wait for non-core power rails good */
-		if (x86_wait_signals(IN_PGOOD_S0)) {
+		if (power_wait_signals(IN_PGOOD_S0)) {
 			chipset_force_shutdown();
 			gpio_set_level(GPIO_TOUCHSCREEN_RESET_L, 0);
 			wireless_enable(0);
 			gpio_set_level(GPIO_ENABLE_VS, 0);
-			return X86_S3;
+			return POWER_S3;
 		}
 
 		/*
@@ -277,9 +277,9 @@ enum x86_state x86_handle_state(enum x86_state state)
 
 		/* Set PCH_PWROK */
 		gpio_set_level(GPIO_PCH_PWROK, 1);
-		return X86_S0;
+		return POWER_S0;
 
-	case X86_S0S3:
+	case POWER_S0S3:
 		/* Call hooks before we remove power rails */
 		hook_notify(HOOK_CHIPSET_SUSPEND);
 
@@ -303,9 +303,9 @@ enum x86_state x86_handle_state(enum x86_state state)
 
 		/* Turn off power rails */
 		gpio_set_level(GPIO_ENABLE_VS, 0);
-		return X86_S3;
+		return POWER_S3;
 
-	case X86_S3S5:
+	case POWER_S3S5:
 		/* Call hooks before we remove power rails */
 		hook_notify(HOOK_CHIPSET_SHUTDOWN);
 
@@ -325,13 +325,13 @@ enum x86_state x86_handle_state(enum x86_state state)
 		 */
 		gpio_set_level(GPIO_TOUCHSCREEN_RESET_L, 0);
 		gpio_set_level(GPIO_LIGHTBAR_RESET_L, 0);
-		return X86_S5;
+		return POWER_S5;
 
-	case X86_S5G3:
+	case POWER_S5G3:
 		/* Deassert DPWROK, assert RSMRST# */
 		gpio_set_level(GPIO_PCH_DPWROK, 0);
 		gpio_set_level(GPIO_PCH_RSMRST_L, 0);
-		return X86_G3;
+		return POWER_G3;
 	}
 
 	return state;
diff --git a/power/tegra.c b/power/tegra.c
index c2a096db6c..42f57b5023 100644
--- a/power/tegra.c
+++ b/power/tegra.c
@@ -292,7 +292,7 @@ static void tegra_suspend_deferred(void)
 }
 DECLARE_DEFERRED(tegra_suspend_deferred);
 
-void power_interrupt(enum gpio_signal signal)
+void power_signal_interrupt(enum gpio_signal signal)
 {
 	if (signal == GPIO_SUSPEND_L) {
 		/* Handle suspend events in the hook task */