zephyr: kconfig: move flash configs to separate file

Clean up the root Kconfig for Zephyr by moving sub configs to separate
file (Kconfig.flash).

BRANCH=none
BUG=none
TEST=zmake testall

Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: I7ac8ec87bdca8ab799bc1faf47804e34c7a6beda
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2808147
Reviewed-by: Simon Glass <sjg@chromium.org>

1 files changed, 113 insertions, 0 deletions

diff --git a/zephyr/Kconfig.flash b/zephyr/Kconfig.flash
new file mode 100644
index 0000000000..74ec9521ed
--- /dev/null
+++ b/zephyr/Kconfig.flash
@@ -0,0 +1,113 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+if PLATFORM_EC_FLASH
+
+config PLATFORM_EC_SPI_FLASH_REGS
+	bool "Enable SPI flash registers"
+	default y
+	help
+	  Enables flash registers for SPI flash (both internal and external).
+	  When enabled, two new functions will become available: (1) a function
+	  to compute the block write protection range from a set of status
+	  registers, and (2) the inverse function to set the status registers
+	  based on the desired protection offset/length.
+
+config PLATFORM_EC_PROTECTED_STORAGE_OFF
+	hex "Position of the RO image in Flash memory"
+	default 0x0
+	help
+	  Sets the position in flash memory where the RO image begins. This is
+	  the address that will be used to start copying the image into RAM.
+
+config PLATFORM_EC_PROTECTED_STORAGE_SIZE
+	hex "Size of the RO image in Flash memory"
+	default 0x40000
+	help
+	  The total size of the RO image in flash memory. This will dictate the
+	  ending position of the RO image being copied into RAM when combined
+	  with PLATFORM_EC_PROTECTED_STORAGE_OFF.
+
+config PLATFORM_EC_WRITABLE_STORAGE_OFF
+	hex "Position of the RW image in Flash memory"
+	default 0x40000
+	help
+	  Sets the position in flash memory where the RW image begins. This is
+	  the address that will be used to start copying the image into RAM.
+
+config PLATFORM_EC_WRITABLE_STORAGE_SIZE
+	hex "Size of the RW image in Flash memory"
+	default 0x40000
+	help
+	  The total size of the RW image in flash memory. This will dictate the
+	  ending position of the RW image being copied into RAM when combined
+	  with PLATFORM_EC_WRITABLE_STORAGE_OFF.
+
+config PLATFORM_EC_CONSOLE_CMD_CHARGEN
+	bool "Console command: chargen"
+	depends on UART_INTERRUPT_DRIVEN
+	help
+	  Enables the "chargen" console command, which sends a continuous
+	  stream of characters to the EC console.
+
+	  This allows to create tests which validate console output by
+	  verifying that no characters in the received sequence were lost.
+
+config PLATFORM_EC_CONSOLE_CMD_FLASH
+	bool "Console commands: flasherase, flashread, flashwrite"
+	default y
+	help
+	  Enables various console commands:
+
+	     flasherase - erase flash region
+	     flashread - read from flash to memory
+	     flashwrite - write memory to flash
+
+config PLATFORM_EC_CONSOLE_CMD_FLASHINFO
+	bool "Console commands: flashinfo"
+	default y
+	help
+	  Enables various console commands:
+
+	     flashinfo - displays information about the flash storage
+
+config PLATFORM_EC_CONSOLE_CMD_FLASH_WP
+	bool "Console commands: flashwp"
+	default y
+	help
+	  Enables various console commands:
+
+	     flashwp - change write-protection settings
+
+config PLATFORM_EC_CONSOLE_CMD_SYSJUMP
+	bool "Console command: sysjump"
+	default y
+	help
+	  Enables the sysjump console command used for testing and verifying
+	  that we're able to jump between images. Normally, in an EC build,
+	  there will exist 2 images (sometimes more): read-only (RO) and
+	  read-write (RW). This console command allows us to manually jump
+	  between the various images (or even to a random starting address) by
+	  copying the image data from flash to ram, then jumping to the image's
+	  entry point.
+
+config PLATFORM_EC_EXTERNAL_STORAGE
+	bool "Flash is stored external to the EC"
+	default y if SOC_FAMILY_NPCX
+	help
+	  This indicates that the EC's flash is stored separately and is it
+	  not possible execute directly from it. Code must be loaded from
+	  the flash into internal SRAM before it can be executed. It is still
+	  possible to read and write the flash.
+
+config PLATFORM_EC_MAPPED_STORAGE
+	bool "Flash is mapped into the EC's address space"
+	default y if SOC_FAMILY_NPCX
+	help
+	  This indicates that the EC's flash is directly mapped into
+	  its address space. This makes it easier to read and write the flash.
+	  If this is not defined, the flash driver must implement
+	  flash_physical_read().
+
+endif # PLATFORM_EC_FLASH