diff options
| author | Yuval Peress <peress@chromium.org> | 2021-02-05 12:42:31 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-02-08 18:54:01 +0000 |
| commit | 1dc96b45760ea258d613b9ba1d1250251face022 (patch) | |
| tree | cda045f6a37670b2d61129f4e12fd69e861eb65b /zephyr/Kconfig.header | |
| parent | 2939dd85315f329f85792f6a8a6ef7db8f5546ba (diff) | |
| download | chrome-ec-1dc96b45760ea258d613b9ba1d1250251face022.tar.gz | |
zephyr: flash: Add header config options
Shim over the header configuration options for offset/size. Also, this
change sets the flash config option PLATFORM_EC_FLASH to depend on the
PLATFORM_EC_RO_HEADER and removes the hard-coded CONFIG_RO_HDR_SIZE
previously used.
BRANCH=none
BUG=b:174873770
TEST=zmake testall
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: Ia1e56b60770fc85eb2874434e37369a7f369fefd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2678928
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'zephyr/Kconfig.header')
| -rw-r--r-- | zephyr/Kconfig.header | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/zephyr/Kconfig.header b/zephyr/Kconfig.header new file mode 100644 index 0000000000..16a03dfab0 --- /dev/null +++ b/zephyr/Kconfig.header @@ -0,0 +1,31 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +config PLATFORM_EC_RO_HEADER + bool "RO section includes a header" + default y + help + The RO image residing on flash memory has a header section. The header + is used on some chips (such as the npcx) to load the image correctly + from flash. The values for offset and size are used by the linker + scripts to generate the header. See core/cortex-m/ec.lds.S for + reference. + +if PLATFORM_EC_RO_HEADER + +config PLATFORM_EC_RO_HEADER_OFFSET + hex "Offset in memory for the location of the header" + default 0x0 + help + The offset (in bytes) of the header relative to the start address of + the RO image. + +config PLATFORM_EC_RO_HEADER_SIZE + hex "Size of the RO header" + default 0x40 + help + The size of the RO header in bytes. This values should come from the + datasheet of the chip being used. + +endif # PLATFORM_EC_RO_HEADER
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