diff options
| author | Wealian Liao <whliao@nuvoton.corp-partner.google.com> | 2021-03-10 10:05:48 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-03-15 19:40:54 +0000 |
| commit | 5edeeaafc0fb1ac282301ce9eed56ee9949de101 (patch) | |
| tree | cba17d44d006516c2a66034f9ea52c88b74159c5 /zephyr/Kconfig.header | |
| parent | c474e0775a25f98cdbaf46ab1291a86562bbf355 (diff) | |
| download | chrome-ec-5edeeaafc0fb1ac282301ce9eed56ee9949de101.tar.gz | |
zephyr: complete the NPCX FW header setting
This CL includes the following:
1. Add core clock to spi clock ratio header option.
2. CMakeLists uses the wrong config name. Fix it.
BUG=None.
BRANCH=None.
TEST=Check the firmware header can set by kconfig.
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: I106c0b6b5987444a77cf07878736374378bc25f2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2747554
Reviewed-by: Yuval Peress <peress@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
Diffstat (limited to 'zephyr/Kconfig.header')
| -rw-r--r-- | zephyr/Kconfig.header | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/zephyr/Kconfig.header b/zephyr/Kconfig.header index da57ad24b7..db5bd6ba76 100644 --- a/zephyr/Kconfig.header +++ b/zephyr/Kconfig.header @@ -40,6 +40,24 @@ config PLATFORM_EC_RO_HEADER_ENABLE_FIRMWARE_CRC When enabled, the firmware image will be verified at boot using a crc checksum. +choice "core clock to SPI flash clock ratio" + prompt "The clock ratio between the core clock and the SPI clock" + default PLATFORM_EC_RO_HEADER_CORE_CLOCK_SPI_CLOCK_RATIO_1 + help + This sets the clock ratio (core clock / SPI clock) + +config PLATFORM_EC_RO_HEADER_CORE_CLOCK_SPI_CLOCK_RATIO_1 + bool "SPI flash will operate with normal reading mode" + help + The SPI flash clock has the same frequency as the core clock. + +config PLATFORM_EC_RO_HEADER_CORE_CLOCK_SPI_CLOCK_RATIO_2 + bool "SPI flash will operate with fast reading mode" + help + The core clock frequency is twice the flash clock frequency. + +endchoice # core clock to SPI flash clock ratio + choice "SPI flash max clock rate" prompt "Clock rate to use for SPI flash" help |