ish: Trim down the release branchstabilize-wristpin-14469.59.B-ishstabilize-voshyr-14637.B-ishstabilize-quickfix-14695.187.B-ishstabilize-quickfix-14695.124.B-ishstabilize-quickfix-14526.91.B-ishstabilize-14695.85.B-ishstabilize-14695.107.B-ishstabilize-14682.B-ishstabilize-14633.B-ishstabilize-14616.B-ishstabilize-14589.B-ishstabilize-14588.98.B-ishstabilize-14588.14.B-ishstabilize-14588.123.B-ishstabilize-14536.B-ishstabilize-14532.B-ishstabilize-14528.B-ishstabilize-14526.89.B-ishstabilize-14526.84.B-ishstabilize-14526.73.B-ishstabilize-14526.67.B-ishstabilize-14526.57.B-ishstabilize-14498.B-ishstabilize-14496.B-ishstabilize-14477.B-ishstabilize-14469.9.B-ishstabilize-14469.8.B-ishstabilize-14469.58.B-ishstabilize-14469.41.B-ishstabilize-14442.B-ishstabilize-14438.B-ishstabilize-14411.B-ishstabilize-14396.B-ishstabilize-14395.B-ishstabilize-14388.62.B-ishstabilize-14388.61.B-ishstabilize-14388.52.B-ishstabilize-14385.B-ishstabilize-14345.B-ishstabilize-14336.B-ishstabilize-14333.B-ishrelease-R99-14469.B-ishrelease-R98-14388.B-ishrelease-R102-14695.B-ishrelease-R101-14588.B-ishrelease-R100-14526.B-ishfirmware-cherry-14454.B-ishfirmware-brya-14505.B-ishfirmware-brya-14505.71.B-ishfactory-kukui-14374.B-ishfactory-guybrush-14600.B-ishfactory-cherry-14455.B-ishfactory-brya-14517.B-ish

In the interest of making long-term branch maintenance incur as little
technical debt on us as possible, we should not maintain any files on
the branch we are not actually using.

This has the added effect of making it extremely clear when merging CLs
from the main branch when changes have the possibility to affect us.

The follow-on CL adds a convenience script to actually pull updates from
the main branch and generate a CL for the update.

BUG=b:204206272
BRANCH=ish
TEST=make BOARD=arcada_ish && make BOARD=drallion_ish

Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>

4 files changed, 0 insertions, 349 deletions

diff --git a/zephyr/boards/riscv/it8xxx2_evb/Kconfig.board b/zephyr/boards/riscv/it8xxx2_evb/Kconfig.board
deleted file mode 100644
index f0691edb39..0000000000
--- a/zephyr/boards/riscv/it8xxx2_evb/Kconfig.board
+++ /dev/null
@@ -1,9 +0,0 @@
-# Copyright 2021 The Chromium OS Authors. All rights reserved.
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-
-config BOARD_IT8XXX2_EVB
-	bool "IT8XXX2 EV-board"
-	depends on SOC_IT8XXX2
-	# Allow generating initial 0 line coverage.
-	select HAS_COVERAGE_SUPPORT
diff --git a/zephyr/boards/riscv/it8xxx2_evb/Kconfig.defconfig b/zephyr/boards/riscv/it8xxx2_evb/Kconfig.defconfig
deleted file mode 100644
index de08d278de..0000000000
--- a/zephyr/boards/riscv/it8xxx2_evb/Kconfig.defconfig
+++ /dev/null
@@ -1,10 +0,0 @@
-# Copyright 2021 The Chromium OS Authors. All rights reserved.
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-
-if BOARD_IT8XXX2_EVB
-
-config BOARD
-	default "it8xxx2_evb"
-
-endif # BOARD_IT8XXX2_EVB
diff --git a/zephyr/boards/riscv/it8xxx2_evb/it8xxx2_evb.dts b/zephyr/boards/riscv/it8xxx2_evb/it8xxx2_evb.dts
deleted file mode 100644
index a1b61d02ec..0000000000
--- a/zephyr/boards/riscv/it8xxx2_evb/it8xxx2_evb.dts
+++ /dev/null
@@ -1,255 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/dts-v1/;
-
-#include <cros/ite/it8xxx2.dtsi>
-#include <dt-bindings/gpio_defines.h>
-#include <it8xxx2.dtsi>
-
-/ {
-	model = "IT8XXX2 EV-Board";
-
-	chosen {
-		zephyr,sram = &sram0;
-		zephyr,console = &uart1;
-		zephyr,shell-uart = &uart1;
-		zephyr,flash = &flash0;
-		zephyr,flash-controller = &flashctrl;
-	};
-
-	named-gpios {
-		compatible = "named-gpios";
-
-		power_button_l: power_button_l {
-			gpios = <&gpioe 4 GPIO_INPUT_PULL_UP>;
-			enum-name = "GPIO_POWER_BUTTON_L";
-			label = "POWER_BUTTON_L";
-		};
-		lid_open: lid_open {
-			gpios = <&gpioe 2 GPIO_INPUT_PULL_UP>;
-			enum-name = "GPIO_LID_OPEN";
-			label = "LID_OPEN";
-		};
-		wp_l {
-			gpios = <&gpioi 4 GPIO_INPUT_PULL_UP>;
-			enum-name = "GPIO_WP_L";
-			label = "WP_L";
-		};
-		pch_pltrst_l {
-			gpios = <&gpioe 3 GPIO_INPUT_PULL_UP>;
-			enum-name = "GPIO_PCH_RSMRST_L";
-			label = "PCH_PLTRST_L";
-		};
-		uart1_rx {
-			gpios = <&gpiob 0 GPIO_INPUT_PULL_UP>;
-			#enum-name = "GPIO_UART1_RX";
-			label = "UART1_RX";
-		};
-		pch_smi_l {
-			gpios = <&gpiod 3 GPIO_OUT_HIGH>;
-			#enum-name = "GPIO_PCH_SMI_L";
-			label = "PCH_SMI_L";
-		};
-		pch_sci_l {
-			gpios = <&gpiod 4 GPIO_OUT_HIGH>;
-			#enum-name = "GPIO_PCH_SCI_L";
-			label = "PCH_SCI_L";
-		};
-		gate_a20_h {
-			gpios = <&gpiob 5 GPIO_OUT_HIGH>;
-			#enum-name = "GPIO_GATE_A20_H";
-			label = "GATE_A20_H";
-		};
-		sys_reset_l {
-			gpios = <&gpiob 6 GPIO_OUT_HIGH>;
-			enum-name = "GPIO_SYS_RESET_L";
-			label = "SYS_RESET_L";
-		};
-		lpc_clkrun_l {
-			gpios = <&gpioh 0 GPIO_OUT_LOW>;
-			#enum-name = "GPIO_LPC_CLKRUN_L";
-			label = "LPC_CLKRUN_L";
-		};
-		pch_wake_l {
-			gpios = <&gpiob 7 GPIO_OUT_HIGH>;
-			enum-name = "GPIO_EC_PCH_WAKE_ODL";
-			label = "PCH_WAKE_L";
-		};
-		i2c_a_scl {
-			gpios = <&gpiob 3 GPIO_INPUT>;
-			enum-name = "GPIO_EC_I2C0_SENSOR_SCL";
-			label = "I2C_A_SCL";
-		};
-		i2c_a_sda {
-			gpios = <&gpiob 4 GPIO_INPUT>;
-			enum-name = "GPIO_EC_I2C0_SENSOR_SDA";
-			label = "I2C_A_SDA";
-		};
-		i2c_b_scl {
-			gpios = <&gpioc 1 GPIO_INPUT>;
-			enum-name = "GPIO_EC_I2C1_USB_C0_SCL";
-			label = "I2C_B_SCL";
-		};
-		i2c_b_sda {
-			gpios = <&gpioc 2 GPIO_INPUT>;
-			enum-name = "GPIO_EC_I2C1_USB_C0_SDA";
-			label = "I2C_B_SDA";
-		};
-		i2c_c_scl {
-			gpios = <&gpiof 6 GPIO_INPUT>;
-			enum-name = "GPIO_EC_I2C2_USB_C1_SCL";
-			label = "I2C_C_SCL";
-		};
-		i2c_c_sda {
-			gpios = <&gpiof 7 GPIO_INPUT>;
-			enum-name = "GPIO_EC_I2C2_USB_C1_SDA";
-			label = "I2C_C_SDA";
-		};
-		i2c_e_scl {
-			gpios = <&gpioe 0 GPIO_INPUT>;
-			enum-name = "GPIO_EC_I2C5_BATTERY_SCL";
-			label = "I2C_E_SCL";
-		};
-		i2c_e_sda {
-			gpios = <&gpioe 7 GPIO_INPUT>;
-			enum-name = "GPIO_EC_I2C5_BATTERY_SDA";
-			label = "I2C_E_SDA";
-		};
-
-		spi0_cs {
-			gpios = <&gpiom 5 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>;
-			enum-name = "GPIO_SPI0_CS";
-			label = "SPI0_CS";
-		};
-	};
-
-	hibernate-wake-pins {
-		compatible = "cros-ec,hibernate-wake-pins";
-		wakeup-pins = <&power_button_l
-			       &lid_open>;
-	};
-
-	named-adc-channels {
-		compatible = "named-adc-channels";
-
-		adc_vbussa: vbussa {
-			label = "ADC_VBUSSA";
-			enum-name = "ADC_VBUS";
-			channel = <0>;
-		};
-		adc_vbussb: vbussb {
-			label = "ADC_VBUSSB";
-			enum-name = "ADC_PSYS";
-			channel = <1>;
-		};
-		adc_evb_ch_13: evb_ch_13 {
-			label = "ADC_EVB_CH_13";
-			enum-name = "ADC_AMON_BMON";
-			channel = <2>;
-		};
-		adc_evb_ch_14: evb_ch_14 {
-			label = "ADC_EVB_CH_14";
-			enum-name = "ADC_TEMP_SENSOR_FAN";
-			channel = <3>;
-		};
-		adc_evb_ch_15: evb_ch_15 {
-			label = "ADC_EVB_CH_15";
-			enum-name = "ADC_TEMP_SENSOR_DDR_SOC";
-			channel = <4>;
-		};
-		adc_evb_ch_16: evb_ch_16 {
-			label = "ADC_EVB_CH_16";
-			enum-name = "ADC_TEMP_SENSOR_CHARGER";
-			channel = <5>;
-		};
-	};
-
-	named-i2c-ports {
-		compatible = "named-i2c-ports";
-
-		battery {
-			i2c-port = <&i2c2>;
-			enum-name = "I2C_PORT_BATTERY";
-			label = "BATTERY";
-		};
-		evb-1 {
-			i2c-port = <&i2c0>;
-			enum-name = "I2C_PORT_EVB_1";
-			label = "EVB_1";
-		};
-		evb-2 {
-			i2c-port = <&i2c1>;
-			enum-name = "I2C_PORT_EVB_2";
-			label = "EVB_2";
-		};
-		opt-4 {
-			i2c-port = <&i2c4>;
-			enum-name = "I2C_PORT_OPT_4";
-			label = "OPT_4";
-		};
-	};
-
-	named-pwms {
-		compatible = "named-pwms";
-		/* NOTE: &pwm number needs same with channel number */
-		test0 {
-			pwms = <&pwm7 PWM_CHANNEL_7 PWM_POLARITY_INVERTED>;
-			label = "TEST0";
-			/*
-			 * If we need pwm output in ITE chip power saving
-			 * mode, then we should set frequency <=324Hz.
-			 */
-			frequency = <324>;
-		};
-		test1 {
-			pwms = <&pwm0 PWM_CHANNEL_0 PWM_POLARITY_NORMAL>;
-			label = "TEST1";
-			frequency = <30000>;
-		};
-	};
-};
-
-&adc0 {
-	status = "okay";
-};
-
-&i2c0 {
-	status = "okay";
-	clock-frequency = <I2C_BITRATE_STANDARD>;
-};
-
-&i2c1 {
-	status = "okay";
-	clock-frequency = <I2C_BITRATE_STANDARD>;
-};
-
-&i2c2 {
-	status = "okay";
-	clock-frequency = <I2C_BITRATE_STANDARD>;
-};
-
-&i2c4 {
-	status = "okay";
-	clock-frequency = <I2C_BITRATE_STANDARD>;
-};
-
-&uart1 {
-	status = "okay";
-	current-speed = <115200>;
-	clock-frequency = <1804800>;
-};
-
-/* TEST1 */
-&pwm0 {
-	status = "okay";
-	prescaler-cx = <PWM_PRESCALER_C6>;
-};
-
-/* TEST0 */
-&pwm7 {
-	status = "okay";
-	prescaler-cx = <PWM_PRESCALER_C4>;
-};
diff --git a/zephyr/boards/riscv/it8xxx2_evb/it8xxx2_evb_defconfig b/zephyr/boards/riscv/it8xxx2_evb/it8xxx2_evb_defconfig
deleted file mode 100644
index d667fac5a1..0000000000
--- a/zephyr/boards/riscv/it8xxx2_evb/it8xxx2_evb_defconfig
+++ /dev/null
@@ -1,75 +0,0 @@
-# Copyright 2021 The Chromium OS Authors. All rights reserved.
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-
-# Zephyr Kernel Configuration
-CONFIG_SOC_SERIES_RISCV32_IT8XXX2=y
-
-# Platform Configuration
-CONFIG_SOC_IT8XXX2=y
-CONFIG_BOARD_IT8XXX2_EVB=y
-
-# Serial Drivers
-CONFIG_SERIAL=y
-CONFIG_UART_INTERRUPT_DRIVEN=y
-
-# Enable console
-CONFIG_CONSOLE=y
-CONFIG_UART_CONSOLE=y
-CONFIG_UART_NS16550=y
-CONFIG_SHELL_TAB=y
-CONFIG_SHELL_TAB_AUTOCOMPLETION=y
-CONFIG_SHELL_HISTORY=y
-
-# Pinmux Driver
-CONFIG_PINMUX=y
-CONFIG_PINMUX_ITE_IT8XXX2=y
-
-# PWM
-CONFIG_PWM=y
-CONFIG_PWM_SHELL=n
-CONFIG_PLATFORM_EC_PWM=y
-CONFIG_PWM_ITE_IT8XXX2=y
-
-# GPIO Controller
-CONFIG_GPIO=y
-CONFIG_GPIO_ITE_IT8XXX2=y
-
-# Clock configuration
-CONFIG_CLOCK_CONTROL=y
-
-# WATCHDOG configuration
-CONFIG_WATCHDOG=y
-CONFIG_WDT_ITE_WARNING_LEADING_TIME_MS=500
-
-# I2C Controller
-CONFIG_I2C_ITE_IT8XXX2=y
-
-CONFIG_ITE_IT8XXX2_TIMER=y
-
-# ADC
-CONFIG_ADC=y
-CONFIG_ADC_ITE_IT8XXX2=y
-CONFIG_PLATFORM_EC_ADC_RESOLUTION=10
-
-CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32768
-CONFIG_SYS_CLOCK_TICKS_PER_SEC=32768
-
-# Flash
-CONFIG_SOC_FLASH_ITE_IT8XXX2=y
-
-# Code RAM base for IT8XXX2
-CONFIG_CROS_EC_PROGRAM_MEMORY_BASE=0x80000000
-CONFIG_CROS_EC_RAM_BASE=0x80100000
-CONFIG_CROS_EC_DATA_RAM_SIZE=0x00100000
-CONFIG_CROS_EC_RAM_SIZE=0x0000f000
-
-
-CONFIG_CROS_EC_RO_MEM_OFF=0x0
-CONFIG_CROS_EC_RO_SIZE=0x80000
-CONFIG_CROS_EC_RW_MEM_OFF=0x0
-CONFIG_CROS_EC_RW_SIZE=0x80000
-
-# BBRAM
-CONFIG_BBRAM=y
-CONFIG_BBRAM_IT8XXX2=y