ish: Trim down the release branchstabilize-wristpin-14469.59.B-ishstabilize-voshyr-14637.B-ishstabilize-quickfix-14695.187.B-ishstabilize-quickfix-14695.124.B-ishstabilize-quickfix-14526.91.B-ishstabilize-14695.85.B-ishstabilize-14695.107.B-ishstabilize-14682.B-ishstabilize-14633.B-ishstabilize-14616.B-ishstabilize-14589.B-ishstabilize-14588.98.B-ishstabilize-14588.14.B-ishstabilize-14588.123.B-ishstabilize-14536.B-ishstabilize-14532.B-ishstabilize-14528.B-ishstabilize-14526.89.B-ishstabilize-14526.84.B-ishstabilize-14526.73.B-ishstabilize-14526.67.B-ishstabilize-14526.57.B-ishstabilize-14498.B-ishstabilize-14496.B-ishstabilize-14477.B-ishstabilize-14469.9.B-ishstabilize-14469.8.B-ishstabilize-14469.58.B-ishstabilize-14469.41.B-ishstabilize-14442.B-ishstabilize-14438.B-ishstabilize-14411.B-ishstabilize-14396.B-ishstabilize-14395.B-ishstabilize-14388.62.B-ishstabilize-14388.61.B-ishstabilize-14388.52.B-ishstabilize-14385.B-ishstabilize-14345.B-ishstabilize-14336.B-ishstabilize-14333.B-ishrelease-R99-14469.B-ishrelease-R98-14388.B-ishrelease-R102-14695.B-ishrelease-R101-14588.B-ishrelease-R100-14526.B-ishfirmware-cherry-14454.B-ishfirmware-brya-14505.B-ishfirmware-brya-14505.71.B-ishfactory-kukui-14374.B-ishfactory-guybrush-14600.B-ishfactory-cherry-14455.B-ishfactory-brya-14517.B-ish

In the interest of making long-term branch maintenance incur as little
technical debt on us as possible, we should not maintain any files on
the branch we are not actually using.

This has the added effect of making it extremely clear when merging CLs
from the main branch when changes have the possibility to affect us.

The follow-on CL adds a convenience script to actually pull updates from
the main branch and generate a CL for the update.

BUG=b:204206272
BRANCH=ish
TEST=make BOARD=arcada_ish && make BOARD=drallion_ish

Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>

1 files changed, 0 insertions, 97 deletions

diff --git a/zephyr/include/soc/ite_it8xxx2/reg_def_cros.h b/zephyr/include/soc/ite_it8xxx2/reg_def_cros.h
deleted file mode 100644
index 8d3b56878e..0000000000
--- a/zephyr/include/soc/ite_it8xxx2/reg_def_cros.h
+++ /dev/null
@@ -1,97 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/*
- * @file
- * @brief ITE it8xxx2 register structure definitions used by the Chrome OS EC.
- */
-
-#ifndef _ITE_IT8XXX2_REG_DEF_CROS_H
-#define _ITE_IT8XXX2_REG_DEF_CROS_H
-
-/*
- * KBS (Keyboard Scan) device registers
- */
-struct kbs_reg {
-	/* 0x000: Keyboard Scan Out */
-	volatile uint8_t KBS_KSOL;
-	/* 0x001: Keyboard Scan Out */
-	volatile uint8_t KBS_KSOH1;
-	/* 0x002: Keyboard Scan Out Control */
-	volatile uint8_t KBS_KSOCTRL;
-	/* 0x003: Keyboard Scan Out */
-	volatile uint8_t KBS_KSOH2;
-	/* 0x004: Keyboard Scan In */
-	volatile uint8_t KBS_KSI;
-	/* 0x005: Keyboard Scan In Control */
-	volatile uint8_t KBS_KSICTRL;
-	/* 0x006: Keyboard Scan In [7:0] GPIO Control */
-	volatile uint8_t KBS_KSIGCTRL;
-	/* 0x007: Keyboard Scan In [7:0] GPIO Output Enable */
-	volatile uint8_t KBS_KSIGOEN;
-	/* 0x008: Keyboard Scan In [7:0] GPIO Data */
-	volatile uint8_t KBS_KSIGDAT;
-	/* 0x009: Keyboard Scan In [7:0] GPIO Data Mirror */
-	volatile uint8_t KBS_KSIGDMRR;
-	/* 0x00A: Keyboard Scan Out [15:8] GPIO Control */
-	volatile uint8_t KBS_KSOHGCTRL;
-	/* 0x00B: Keyboard Scan Out [15:8] GPIO Output Enable */
-	volatile uint8_t KBS_KSOHGOEN;
-	/* 0x00C: Keyboard Scan Out [15:8] GPIO Data Mirror */
-	volatile uint8_t KBS_KSOHGDMRR;
-	/* 0x00D: Keyboard Scan Out [7:0] GPIO Control */
-	volatile uint8_t KBS_KSOLGCTRL;
-	/* 0x00E: Keyboard Scan Out [7:0] GPIO Output Enable */
-	volatile uint8_t KBS_KSOLGOEN;
-};
-
-/* KBS register fields */
-#define IT8XXX2_KBS_KSOPU	BIT(2)
-#define IT8XXX2_KBS_KSOOD	BIT(0)
-#define IT8XXX2_KBS_KSIPU	BIT(2)
-#define IT8XXX2_KBS_KSO2GCTRL	BIT(2)
-#define IT8XXX2_KBS_KSO2GOEN	BIT(2)
-
-/*
- * ECPM (EC Clock and Power Management) device registers
- */
-struct ecpm_reg {
-	/* 0x000: Reserved1 */
-	volatile uint8_t reserved1;
-	/* 0x001: Clock Gating Control 1 */
-	volatile uint8_t ECPM_CGCTRL1;
-	/* 0x002: Clock Gating Control 2 */
-	volatile uint8_t ECPM_CGCTRL2;
-	/* 0x003: PLL Control */
-	volatile uint8_t ECPM_PLLCTRL;
-	/* 0x004: Auto Clock Gating */
-	volatile uint8_t ECPM_AUTOCG;
-	/* 0x005: Clock Gating Control 3 */
-	volatile uint8_t ECPM_CGCTRL3;
-	/* 0x006: PLL Frequency */
-	volatile uint8_t ECPM_PLLFREQ;
-	/* 0x007: Reserved2 */
-	volatile uint8_t reserved2;
-	/* 0x008: PLL Clock Source Status */
-	volatile uint8_t ECPM_PLLCSS;
-	/* 0x009: Clock Gating Control 4 */
-	volatile uint8_t ECPM_CGCTRL4;
-	/* 0x00A: Reserved3 */
-	volatile uint8_t reserved3;
-	/* 0x00B: Reserved4 */
-	volatile uint8_t reserved4;
-	/* 0x00C: System Clock Divide Control 0 */
-	volatile uint8_t ECPM_SCDCR0;
-	/* 0x00D: System Clock Divide Control 1 */
-	volatile uint8_t ECPM_SCDCR1;
-	/* 0x00E: System Clock Divide Control 2 */
-	volatile uint8_t ECPM_SCDCR2;
-	/* 0x00F: System Clock Divide Control 3 */
-	volatile uint8_t ECPM_SCDCR3;
-	/* 0x010: System Clock Divide Control 4 */
-	volatile uint8_t ECPM_SCDCR4;
-};
-
-#endif /* _ITE_IT8XXX2_REG_DEF_CROS_H */