diff options
| author | Jack Rosenthal <jrosenth@chromium.org> | 2021-11-04 12:11:58 -0600 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-11-05 04:22:34 +0000 |
| commit | 252457d4b21f46889eebad61d4c0a65331919cec (patch) | |
| tree | 01856c4d31d710b20e85a74c8d7b5836e35c3b98 /zephyr/shim | |
| parent | 08f5a1e6fc2c9467230444ac9b582dcf4d9f0068 (diff) | |
| download | chrome-ec-stabilize-14336.B-ish.tar.gz | |
ish: Trim down the release branchstabilize-wristpin-14469.59.B-ishstabilize-voshyr-14637.B-ishstabilize-quickfix-14695.187.B-ishstabilize-quickfix-14695.124.B-ishstabilize-quickfix-14526.91.B-ishstabilize-14695.85.B-ishstabilize-14695.107.B-ishstabilize-14682.B-ishstabilize-14633.B-ishstabilize-14616.B-ishstabilize-14589.B-ishstabilize-14588.98.B-ishstabilize-14588.14.B-ishstabilize-14588.123.B-ishstabilize-14536.B-ishstabilize-14532.B-ishstabilize-14528.B-ishstabilize-14526.89.B-ishstabilize-14526.84.B-ishstabilize-14526.73.B-ishstabilize-14526.67.B-ishstabilize-14526.57.B-ishstabilize-14498.B-ishstabilize-14496.B-ishstabilize-14477.B-ishstabilize-14469.9.B-ishstabilize-14469.8.B-ishstabilize-14469.58.B-ishstabilize-14469.41.B-ishstabilize-14442.B-ishstabilize-14438.B-ishstabilize-14411.B-ishstabilize-14396.B-ishstabilize-14395.B-ishstabilize-14388.62.B-ishstabilize-14388.61.B-ishstabilize-14388.52.B-ishstabilize-14385.B-ishstabilize-14345.B-ishstabilize-14336.B-ishstabilize-14333.B-ishrelease-R99-14469.B-ishrelease-R98-14388.B-ishrelease-R102-14695.B-ishrelease-R101-14588.B-ishrelease-R100-14526.B-ishfirmware-cherry-14454.B-ishfirmware-brya-14505.B-ishfirmware-brya-14505.71.B-ishfactory-kukui-14374.B-ishfactory-guybrush-14600.B-ishfactory-cherry-14455.B-ishfactory-brya-14517.B-ish
In the interest of making long-term branch maintenance incur as little
technical debt on us as possible, we should not maintain any files on
the branch we are not actually using.
This has the added effect of making it extremely clear when merging CLs
from the main branch when changes have the possibility to affect us.
The follow-on CL adds a convenience script to actually pull updates from
the main branch and generate a CL for the update.
BUG=b:204206272
BRANCH=ish
TEST=make BOARD=arcada_ish && make BOARD=drallion_ish
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Diffstat (limited to 'zephyr/shim')
102 files changed, 0 insertions, 10558 deletions
diff --git a/zephyr/shim/CMakeLists.txt b/zephyr/shim/CMakeLists.txt deleted file mode 100644 index e36101756a..0000000000 --- a/zephyr/shim/CMakeLists.txt +++ /dev/null @@ -1,7 +0,0 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -add_subdirectory("chip") -add_subdirectory("core") -add_subdirectory("src") diff --git a/zephyr/shim/chip/CMakeLists.txt b/zephyr/shim/chip/CMakeLists.txt deleted file mode 100644 index 5c76a4163a..0000000000 --- a/zephyr/shim/chip/CMakeLists.txt +++ /dev/null @@ -1,12 +0,0 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -if (DEFINED CONFIG_SOC_FAMILY_NPCX) - add_subdirectory(npcx) -elseif (DEFINED CONFIG_SOC_FAMILY_RISCV_ITE) - add_subdirectory(it8xxx2) -elseif (DEFINED CONFIG_SOC_POSIX) - add_subdirectory(posix) -endif() - diff --git a/zephyr/shim/chip/it8xxx2/CMakeLists.txt b/zephyr/shim/chip/it8xxx2/CMakeLists.txt deleted file mode 100644 index 7a92a3cfb6..0000000000 --- a/zephyr/shim/chip/it8xxx2/CMakeLists.txt +++ /dev/null @@ -1,10 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -zephyr_library_include_directories(include) - -zephyr_library_sources(clock.c) -zephyr_library_sources_ifdef(CONFIG_CROS_EC system.c) -zephyr_library_sources_ifdef(CONFIG_CROS_EC pinmux.c) -zephyr_library_sources_ifdef(CONFIG_CROS_KB_RAW_ITE keyboard_raw.c) diff --git a/zephyr/shim/chip/it8xxx2/clock.c b/zephyr/shim/chip/it8xxx2/clock.c deleted file mode 100644 index 2bcf9e2899..0000000000 --- a/zephyr/shim/chip/it8xxx2/clock.c +++ /dev/null @@ -1,41 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <device.h> -#include <drivers/clock_control.h> -#include <kernel.h> -#include <logging/log.h> -#include <soc.h> -#include <zephyr.h> -#include <soc/ite_it8xxx2/reg_def_cros.h> -#include <sys/util.h> - -#include "module_id.h" - -LOG_MODULE_REGISTER(shim_clock, LOG_LEVEL_ERR); - -#define ECPM_NODE DT_INST(0, ite_it8xxx2_ecpm) -#define HAL_ECPM_REG_BASE_ADDR \ - ((struct ecpm_reg *)DT_REG_ADDR_BY_IDX(ECPM_NODE, 0)) -#define PLLFREQ_MASK 0xf - -static const int pll_reg_to_freq[8] = { - MHZ(8), - MHZ(16), - MHZ(24), - MHZ(32), - MHZ(48), - MHZ(64), - MHZ(72), - MHZ(96) -}; - -int clock_get_freq(void) -{ - struct ecpm_reg *const ecpm_base = HAL_ECPM_REG_BASE_ADDR; - int reg_val = ecpm_base->ECPM_PLLFREQ & PLLFREQ_MASK; - - return pll_reg_to_freq[reg_val]; -} diff --git a/zephyr/shim/chip/it8xxx2/include/flash_chip.h b/zephyr/shim/chip/it8xxx2/include/flash_chip.h deleted file mode 100644 index e45a08296f..0000000000 --- a/zephyr/shim/chip/it8xxx2/include/flash_chip.h +++ /dev/null @@ -1,41 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_FLASH_CHIP_H -#define __CROS_EC_FLASH_CHIP_H - -/* - * Flash size of IT81202 is 1MB. - * We use only half space of flash to save time of erasing RW image from flash. - */ -#define CONFIG_FLASH_SIZE_BYTES (DT_REG_SIZE(DT_NODELABEL(flash0)) / 2) -/* Program is run directly from storage */ -#define CONFIG_MAPPED_STORAGE_BASE DT_REG_ADDR(DT_NODELABEL(flash0)) -/* - * One page program instruction allows maximum 256 bytes (a page) of data - * to be programmed. - */ -#define CONFIG_FLASH_WRITE_IDEAL_SIZE 256 -/* Minimum write size */ -#define CONFIG_FLASH_WRITE_SIZE DT_PROP(DT_INST(0, soc_nv_flash), \ - write_block_size) -/* Erase bank size */ -#define CONFIG_FLASH_ERASE_SIZE DT_PROP(DT_INST(0, soc_nv_flash), \ - erase_block_size) -/* Protect bank size */ -#define CONFIG_FLASH_BANK_SIZE CONFIG_FLASH_ERASE_SIZE - -#define CONFIG_RO_STORAGE_OFF 0x0 -#define CONFIG_RW_STORAGE_OFF 0x0 - -/* - * The EC uses the one bank of flash to emulate a SPI-like write protect - * register with persistent state. - */ -#define CONFIG_FW_PSTATE_SIZE CONFIG_FLASH_BANK_SIZE -#define CONFIG_FW_PSTATE_OFF (CONFIG_FLASH_SIZE_BYTES / 2 - \ - CONFIG_FW_PSTATE_SIZE) - -#endif /* __CROS_EC_FLASH_CHIP_H */ diff --git a/zephyr/shim/chip/it8xxx2/keyboard_raw.c b/zephyr/shim/chip/it8xxx2/keyboard_raw.c deleted file mode 100644 index 0096798915..0000000000 --- a/zephyr/shim/chip/it8xxx2/keyboard_raw.c +++ /dev/null @@ -1,26 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Functions needed by keyboard scanner module for Chrome EC */ - -#include <device.h> -#include <logging/log.h> -#include <soc.h> -#include <zephyr.h> - -#include "drivers/cros_kb_raw.h" -#include "keyboard_raw.h" - -/** - * Return true if the current value of the given input GPIO port is zero - */ -int keyboard_raw_is_input_low(int port, int id) -{ - /* - * TODO: implement for factory testing KSI and KSO pin as GPIO - * function. - */ - return 0; -} diff --git a/zephyr/shim/chip/it8xxx2/pinmux.c b/zephyr/shim/chip/it8xxx2/pinmux.c deleted file mode 100644 index fd8dc7fc8e..0000000000 --- a/zephyr/shim/chip/it8xxx2/pinmux.c +++ /dev/null @@ -1,112 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <init.h> -#include <drivers/pinmux.h> -#include <dt-bindings/pinctrl/it8xxx2-pinctrl.h> -#include <soc.h> - -static int it8xxx2_pinmux_init(const struct device *dev) -{ - ARG_UNUSED(dev); - -#if DT_NODE_HAS_STATUS(DT_NODELABEL(pinmuxb), okay) && \ - DT_NODE_HAS_STATUS(DT_NODELABEL(uart1), okay) - const struct device *portb = DEVICE_DT_GET(DT_NODELABEL(pinmuxb)); - - /* SIN0 */ - pinmux_pin_set(portb, 0, IT8XXX2_PINMUX_FUNC_3); - /* SOUT0 */ - pinmux_pin_set(portb, 1, IT8XXX2_PINMUX_FUNC_3); -#endif - - return 0; -} -SYS_INIT(it8xxx2_pinmux_init, PRE_KERNEL_1, CONFIG_PINMUX_INIT_PRIORITY); - -/* - * Init priority is behind CONFIG_PLATFORM_EC_GPIO_INIT_PRIORITY to overwrite - * GPIO_INPUT setting of i2c ports. - */ -static int it8xxx2_pinmux_init_latr(const struct device *dev) -{ - ARG_UNUSED(dev); - -#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c0), okay) && \ - DT_NODE_HAS_STATUS(DT_NODELABEL(pinmuxb), okay) - { - const struct device *portb = - DEVICE_DT_GET(DT_NODELABEL(pinmuxb)); - - /* I2C0 CLK */ - pinmux_pin_set(portb, 3, IT8XXX2_PINMUX_FUNC_1); - /* I2C0 DAT */ - pinmux_pin_set(portb, 4, IT8XXX2_PINMUX_FUNC_1); - } -#endif -#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c1), okay) && \ - DT_NODE_HAS_STATUS(DT_NODELABEL(pinmuxc), okay) - { - const struct device *portc = - DEVICE_DT_GET(DT_NODELABEL(pinmuxc)); - - /* I2C1 CLK */ - pinmux_pin_set(portc, 1, IT8XXX2_PINMUX_FUNC_1); - /* I2C1 DAT */ - pinmux_pin_set(portc, 2, IT8XXX2_PINMUX_FUNC_1); - } -#endif -#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c2), okay) && \ - DT_NODE_HAS_STATUS(DT_NODELABEL(pinmuxf), okay) - { - const struct device *portf = - DEVICE_DT_GET(DT_NODELABEL(pinmuxf)); - - /* I2C2 CLK */ - pinmux_pin_set(portf, 6, IT8XXX2_PINMUX_FUNC_1); - /* I2C2 DAT */ - pinmux_pin_set(portf, 7, IT8XXX2_PINMUX_FUNC_1); - } -#endif -#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c3), okay) && \ - DT_NODE_HAS_STATUS(DT_NODELABEL(pinmuxh), okay) - { - const struct device *porth = - DEVICE_DT_GET(DT_NODELABEL(pinmuxh)); - - /* I2C3 CLK */ - pinmux_pin_set(porth, 1, IT8XXX2_PINMUX_FUNC_3); - /* I2C3 DAT */ - pinmux_pin_set(porth, 2, IT8XXX2_PINMUX_FUNC_3); - } -#endif -#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c4), okay) && \ - DT_NODE_HAS_STATUS(DT_NODELABEL(pinmuxe), okay) - { - const struct device *porte = - DEVICE_DT_GET(DT_NODELABEL(pinmuxe)); - - /* I2C4 CLK */ - pinmux_pin_set(porte, 0, IT8XXX2_PINMUX_FUNC_3); - /* I2C4 DAT */ - pinmux_pin_set(porte, 7, IT8XXX2_PINMUX_FUNC_3); - } -#endif -#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c5), okay) && \ - DT_NODE_HAS_STATUS(DT_NODELABEL(pinmuxa), okay) - { - const struct device *porta = - DEVICE_DT_GET(DT_NODELABEL(pinmuxa)); - - /* I2C5 CLK */ - pinmux_pin_set(porta, 4, IT8XXX2_PINMUX_FUNC_3); - /* I2C5 DAT */ - pinmux_pin_set(porta, 5, IT8XXX2_PINMUX_FUNC_3); - } -#endif - - return 0; -} -SYS_INIT(it8xxx2_pinmux_init_latr, POST_KERNEL, 52); diff --git a/zephyr/shim/chip/it8xxx2/system.c b/zephyr/shim/chip/it8xxx2/system.c deleted file mode 100644 index d9dcd7ccfb..0000000000 --- a/zephyr/shim/chip/it8xxx2/system.c +++ /dev/null @@ -1,16 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "system.h" - -uintptr_t system_get_fw_reset_vector(uintptr_t base) -{ - /* - * Because our reset vector is at the beginning of image copy - * (see init.S). So I just need to return 'base' here and EC will jump - * to the reset vector. - */ - return base; -} diff --git a/zephyr/shim/chip/npcx/CMakeLists.txt b/zephyr/shim/chip/npcx/CMakeLists.txt deleted file mode 100644 index d3cd4b48fd..0000000000 --- a/zephyr/shim/chip/npcx/CMakeLists.txt +++ /dev/null @@ -1,25 +0,0 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -# When building code coverage, the final Zephyr image isn't actually linked -# and there's no valid image to program. Skip compiling and linking the NPCX -# monitor when coverage is enabled. -if (NOT DEFINED CONFIG_COVERAGE) - add_subdirectory(npcx_monitor) -endif() - -zephyr_library_include_directories(include) - -zephyr_library_sources(clock.c) -zephyr_library_sources(gpio.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_ESPI espi.c) -zephyr_library_sources_ifdef(CONFIG_CROS_KB_RAW_NPCX keyboard_raw.c) -zephyr_library_sources_ifdef(CONFIG_CROS_SHI_NPCX shi.c) -zephyr_library_sources_ifdef(CONFIG_CROS_EC system.c) - -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_EXTERNAL_STORAGE - system_external_storage.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_WORKAROUND_FLASH_DOWNLOAD_API - system_download_from_flash.c) -zephyr_library_sources_ifdef(CONFIG_PM_POLICY_APP power_policy.c) diff --git a/zephyr/shim/chip/npcx/Kconfig.npcx b/zephyr/shim/chip/npcx/Kconfig.npcx deleted file mode 100644 index b044912ae1..0000000000 --- a/zephyr/shim/chip/npcx/Kconfig.npcx +++ /dev/null @@ -1,18 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -if PLATFORM_EC - -config CROS_SYSTEM_NPCX_PRE_INIT_PRIORITY - int "System pre-initialization priority" - default 15 - range 10 19 - depends on SOC_FAMILY_NPCX - help - This sets the priority of the NPCX chip system initialization. The - chip system initialization verifies the integrity of the BBRAM and - must be a lower priority than CONFIG_BBRAM_INIT_PRIORITY and - must be a higher priority than PLATFORM_EC_SYSTEM_PRE_INIT. - -endif # PLATFORM_EC diff --git a/zephyr/shim/chip/npcx/clock.c b/zephyr/shim/chip/npcx/clock.c deleted file mode 100644 index 8c8bad5596..0000000000 --- a/zephyr/shim/chip/npcx/clock.c +++ /dev/null @@ -1,69 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <device.h> -#include <drivers/clock_control.h> -#include <dt-bindings/clock/npcx_clock.h> -#include <kernel.h> -#include <logging/log.h> -#include <soc.h> -#include <zephyr.h> - -#include "clock_chip.h" -#include "module_id.h" - -LOG_MODULE_REGISTER(shim_clock, LOG_LEVEL_ERR); - -#define CDCG_NODE DT_INST(0, nuvoton_npcx_pcc) -#define HAL_CDCG_REG_BASE_ADDR \ - ((struct cdcg_reg *)DT_REG_ADDR_BY_IDX(CDCG_NODE, 1)) - -int clock_get_freq(void) -{ - const struct device *clk_dev = DEVICE_DT_GET(NPCX_CLK_CTRL_NODE); - const struct npcx_clk_cfg clk_cfg = { - .bus = NPCX_CLOCK_BUS_CORE, - }; - uint32_t rate; - - if (clock_control_get_rate(clk_dev, (clock_control_subsys_t *)&clk_cfg, - &rate) != 0) { - LOG_ERR("Get %s clock rate error", clk_dev->name); - return -EIO; - } - - return rate; -} - -void clock_turbo(void) -{ - struct cdcg_reg *const cdcg_base = HAL_CDCG_REG_BASE_ADDR; - - /* For NPCX7: - * Increase CORE_CLK (CPU) as the same as OSC_CLK. Since - * CORE_CLK > 66MHz, we also need to set AHB6DIV and FIUDIV as 1. - */ - cdcg_base->HFCGP = 0x01; - cdcg_base->HFCBCD = BIT(4); -} - -void clock_normal(void) -{ - struct cdcg_reg *const cdcg_base = HAL_CDCG_REG_BASE_ADDR; - - cdcg_base->HFCGP = ((FPRED_VAL << 4) | AHB6DIV_VAL); - cdcg_base->HFCBCD = (FIUDIV_VAL << 4); -} - -void clock_enable_module(enum module_id module, int enable) -{ - /* Assume we have a single task using MODULE_FAST_CPU */ - if (module == MODULE_FAST_CPU) { - if (enable) - clock_turbo(); - else - clock_normal(); - } -} diff --git a/zephyr/shim/chip/npcx/espi.c b/zephyr/shim/chip/npcx/espi.c deleted file mode 100644 index 2115f388d6..0000000000 --- a/zephyr/shim/chip/npcx/espi.c +++ /dev/null @@ -1,53 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <device.h> -#include <sys/util.h> - -#include "drivers/espi.h" -#include "soc_espi.h" -#include "zephyr_espi_shim.h" - -bool is_acpi_command(uint32_t data) -{ - struct espi_evt_data_acpi *acpi = (struct espi_evt_data_acpi *)&data; - - return acpi->type; -} - -uint32_t get_acpi_value(uint32_t data) -{ - struct espi_evt_data_acpi *acpi = (struct espi_evt_data_acpi *)&data; - - return acpi->data; -} - -bool is_8042_ibf(uint32_t data) -{ - struct espi_evt_data_kbc *kbc = (struct espi_evt_data_kbc *)&data; - - return kbc->evt & HOST_KBC_EVT_IBF; -} - -bool is_8042_obe(uint32_t data) -{ - struct espi_evt_data_kbc *kbc = (struct espi_evt_data_kbc *)&data; - - return kbc->evt & HOST_KBC_EVT_OBE; -} - -uint32_t get_8042_type(uint32_t data) -{ - struct espi_evt_data_kbc *kbc = (struct espi_evt_data_kbc *)&data; - - return kbc->type; -} - -uint32_t get_8042_data(uint32_t data) -{ - struct espi_evt_data_kbc *kbc = (struct espi_evt_data_kbc *)&data; - - return kbc->data; -} diff --git a/zephyr/shim/chip/npcx/gpio.c b/zephyr/shim/chip/npcx/gpio.c deleted file mode 100644 index 148e1a97c9..0000000000 --- a/zephyr/shim/chip/npcx/gpio.c +++ /dev/null @@ -1,55 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <device.h> -#include <kernel.h> - -#include <logging/log.h> - -#include "gpio.h" -#include "gpio/gpio.h" - -LOG_MODULE_REGISTER(shim_cros_gpio, LOG_LEVEL_ERR); - -static const struct unused_pin_config unused_pin_configs[] = { - UNUSED_GPIO_CONFIG_LIST -}; - -int gpio_config_unused_pins(void) -{ - for (size_t i = 0; i < ARRAY_SIZE(unused_pin_configs); ++i) { - int rv; - int flags; - const struct device *dev = - device_get_binding(unused_pin_configs[i].dev_name); - - if (dev == NULL) { - LOG_ERR("Not found (%s)", - unused_pin_configs[i].dev_name); - return -ENOTSUP; - } - - /* - * Set the default setting for the floating IOs. The floating - * IOs cause the leakage current. Set unused pins as input with - * internal PU to prevent extra power consumption. - */ - if (unused_pin_configs[i].flags == 0) - flags = GPIO_INPUT | GPIO_PULL_UP; - else - flags = unused_pin_configs[i].flags; - - rv = gpio_pin_configure(dev, unused_pin_configs[i].pin, flags); - - if (rv < 0) { - LOG_ERR("Config failed %s-%d (%d)", - unused_pin_configs[i].dev_name, - unused_pin_configs[i].pin, rv); - return rv; - } - } - - return 0; -} diff --git a/zephyr/shim/chip/npcx/include/clock_chip.h b/zephyr/shim/chip/npcx/include/clock_chip.h deleted file mode 100644 index 0c39ed8174..0000000000 --- a/zephyr/shim/chip/npcx/include/clock_chip.h +++ /dev/null @@ -1,14 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_CLOCK_CHIP_H -#define __CROS_EC_CLOCK_CHIP_H - -/** - * TODO(b:180112248) implement in zephyr's clock_control.h - */ -void clock_turbo(void); - -#endif /* __CROS_EC_CLOCK_CHIP_H */ diff --git a/zephyr/shim/chip/npcx/include/flash_chip.h b/zephyr/shim/chip/npcx/include/flash_chip.h deleted file mode 100644 index 622633c570..0000000000 --- a/zephyr/shim/chip/npcx/include/flash_chip.h +++ /dev/null @@ -1,31 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_FLASH_CHIP_H -#define __CROS_EC_FLASH_CHIP_H - -#define CONFIG_SPI_FLASH_W25Q80 /* Internal SPI flash type. */ -#ifdef CONFIG_FLASH_SIZE -#define CONFIG_FLASH_SIZE_BYTES (CONFIG_FLASH_SIZE * 1024) -#else -#define CONFIG_FLASH_SIZE_BYTES 0x0 -#endif - -/* TODO(b:176490413): use DT_PROP(DT_INST(inst, DT_DRV_COMPAT), size) ? */ -#define CONFIG_MAPPED_STORAGE_BASE 0x64000000 -#define CONFIG_FLASH_WRITE_SIZE 0x1 /* minimum write size */ -#define CONFIG_FLASH_WRITE_IDEAL_SIZE 256 /* one page size for write */ -#define CONFIG_FLASH_ERASE_SIZE 0x10000 -#define CONFIG_FLASH_BANK_SIZE CONFIG_FLASH_ERASE_SIZE - -/* RO image resides at start of protected region, right after header */ -#define CONFIG_RO_STORAGE_OFF CONFIG_RO_HDR_SIZE - -#define CONFIG_RW_STORAGE_OFF 0 - -/* Use 4k sector erase for NPCX monitor flash erase operations. */ -#define NPCX_MONITOR_FLASH_ERASE_SIZE 0x1000 - -#endif /* __CROS_EC_FLASH_CHIP_H */ diff --git a/zephyr/shim/chip/npcx/include/rom_chip.h b/zephyr/shim/chip/npcx/include/rom_chip.h deleted file mode 100644 index aab166e6f1..0000000000 --- a/zephyr/shim/chip/npcx/include/rom_chip.h +++ /dev/null @@ -1,57 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_ROM_CHIP_H -#define __CROS_EC_ROM_CHIP_H - -#include "common.h" - -/* Enumerations of ROM api functions */ -enum API_SIGN_OPTIONS_T { - SIGN_NO_CHECK = 0, - SIGN_CRC_CHECK = 1, -}; - -enum API_RETURN_STATUS_T { - /* Successful download */ - API_RET_STATUS_OK = 0, - /* Address is outside of flash or not 4 bytes aligned. */ - API_RET_STATUS_INVALID_SRC_ADDR = 1, - /* Address is outside of RAM or not 4 bytes aligned. */ - API_RET_STATUS_INVALID_DST_ADDR = 2, - /* Size is 0 or not 4 bytes aligned. */ - API_RET_STATUS_INVALID_SIZE = 3, - /* Flash Address + Size is out of flash. */ - API_RET_STATUS_INVALID_SIZE_OUT_OF_FLASH = 4, - /* RAM Address + Size is out of RAM. */ - API_RET_STATUS_INVALID_SIZE_OUT_OF_RAM = 5, - /* Wrong sign option. */ - API_RET_STATUS_INVALID_SIGN = 6, - /* Error during Code copy. */ - API_RET_STATUS_COPY_FAILED = 7, - /* Execution Address is outside of RAM */ - API_RET_STATUS_INVALID_EXE_ADDR = 8, - /* Bad CRC value */ - API_RET_STATUS_INVALID_SIGNATURE = 9, -}; - -/* Macro functions of ROM api functions */ -#define ADDR_DOWNLOAD_FROM_FLASH (*(volatile uint32_t *) 0x40) -#define download_from_flash(src_offset, dest_addr, size, sign, exe_addr, \ - status) \ - (((download_from_flash_ptr) ADDR_DOWNLOAD_FROM_FLASH) \ - (src_offset, dest_addr, size, sign, exe_addr, status)) - -/* Declarations of ROM api functions */ -typedef void (*download_from_flash_ptr) ( - uint32_t src_offset, /* The offset of the data to be downloaded */ - uint32_t dest_addr, /* The address of the downloaded data in the RAM*/ - uint32_t size, /* Number of bytes to download */ - enum API_SIGN_OPTIONS_T sign, /* Need CRC check or not */ - uint32_t exe_addr, /* jump to this address after download if not zero */ - enum API_RETURN_STATUS_T *status /* Status fo download */ -); - -#endif /* __CROS_EC_ROM_CHIP_H */ diff --git a/zephyr/shim/chip/npcx/include/system_chip.h b/zephyr/shim/chip/npcx/include/system_chip.h deleted file mode 100644 index c77c2a8338..0000000000 --- a/zephyr/shim/chip/npcx/include/system_chip.h +++ /dev/null @@ -1,80 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_SYSTEM_CHIP_H_ -#define __CROS_EC_SYSTEM_CHIP_H_ - -#define SET_BIT(reg, bit) ((reg) |= (0x1 << (bit))) -#define CLEAR_BIT(reg, bit) ((reg) &= (~(0x1 << (bit)))) - -/* TODO(b:179900857) Clean this up too */ -#undef IS_BIT_SET -#define IS_BIT_SET(reg, bit) (((reg) >> (bit)) & (0x1)) - -/*****************************************************************************/ -/* Memory mapping */ -#define CONFIG_LPRAM_BASE 0x40001400 /* memory address of lpwr ram */ -#define CONFIG_LPRAM_SIZE 0x00000620 /* 1568B low power ram */ - -/******************************************************************************/ -/* Optional M4 Registers */ -#define CPU_MPU_CTRL REG32(0xE000ED94) -#define CPU_MPU_RNR REG32(0xE000ED98) -#define CPU_MPU_RBAR REG32(0xE000ED9C) -#define CPU_MPU_RASR REG32(0xE000EDA0) - -/* - * Region assignment. 7 as the highest, a higher index has a higher priority. - * For example, using 7 for .iram.text allows us to mark entire RAM XN except - * .iram.text, which is used for hibernation. - * Region assignment is currently wasteful and can be changed if more - * regions are needed in the future. For example, a second region may not - * be necessary for all types, and REGION_CODE_RAM / REGION_STORAGE can be - * made mutually exclusive. - */ -enum mpu_region { - REGION_DATA_RAM = 0, /* For internal data RAM */ - REGION_DATA_RAM2 = 1, /* Second region for unaligned size */ - REGION_CODE_RAM = 2, /* For internal code RAM */ - REGION_CODE_RAM2 = 3, /* Second region for unaligned size */ - REGION_STORAGE = 4, /* For mapped internal storage */ - REGION_STORAGE2 = 5, /* Second region for unaligned size */ - REGION_DATA_RAM_TEXT = 6, /* Exempt region of data RAM */ - REGION_CHIP_RESERVED = 7, /* Reserved for use in chip/ */ - /* only for chips with MPU supporting 16 regions */ - REGION_UNCACHED_RAM = 8, /* For uncached data RAM */ - REGION_UNCACHED_RAM2 = 9, /* Second region for unaligned size */ - REGION_ROLLBACK = 10, /* For rollback */ -}; - -/* - * Configure the specific memory addresses in the the MPU - * (Memory Protection Unit) for Nuvoton different chip series. - */ -void system_mpu_config(void); - -/* The utilities and variables depend on npcx chip family */ -#if defined(CONFIG_SOC_SERIES_NPCX5) || \ - defined(CONFIG_PLATFORM_EC_WORKAROUND_FLASH_DOWNLOAD_API) -/* Bypass for GMDA issue of ROM api utilities only on npcx5 series or if - * CONFIG_PLATFORM_EC_WORKAROUND_FLASH_DOWNLOAD_API is defined. - */ -void system_download_from_flash(uint32_t srcAddr, uint32_t dstAddr, - uint32_t size, uint32_t exeAddr); - -/* Begin address for hibernate utility; defined in linker script */ -extern unsigned int __flash_lpfw_start; - -/* End address for hibernate utility; defined in linker script */ -extern unsigned int __flash_lpfw_end; - -/* Begin address for little FW; defined in linker script */ -extern unsigned int __flash_lplfw_start; - -/* End address for little FW; defined in linker script */ -extern unsigned int __flash_lplfw_end; -#endif - -#endif // __CROS_EC_SYSTEM_CHIP_H_ diff --git a/zephyr/shim/chip/npcx/keyboard_raw.c b/zephyr/shim/chip/npcx/keyboard_raw.c deleted file mode 100644 index aa075d2d56..0000000000 --- a/zephyr/shim/chip/npcx/keyboard_raw.c +++ /dev/null @@ -1,25 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Functions needed by keyboard scanner module for Chrome EC */ - -#include <device.h> -#include <logging/log.h> -#include <soc.h> -#include <soc_gpio.h> -#include <zephyr.h> - -#include "drivers/cros_kb_raw.h" -#include "keyboard_raw.h" - -/** - * Return true if the current value of the given input GPIO port is zero - */ -int keyboard_raw_is_input_low(int port, int id) -{ - const struct device *io_dev = npcx_get_gpio_dev(port); - - return gpio_pin_get_raw(io_dev, id) == 0; -} diff --git a/zephyr/shim/chip/npcx/npcx_monitor/CMakeLists.txt b/zephyr/shim/chip/npcx/npcx_monitor/CMakeLists.txt deleted file mode 100644 index 661eb86e91..0000000000 --- a/zephyr/shim/chip/npcx/npcx_monitor/CMakeLists.txt +++ /dev/null @@ -1,47 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -# The NPCX monitor source needs the chip type and flash layout information -# provided by the board configuration. This is provided by -# zephyr/shim/include/config_chip.h, so we need all the include directories -# of the Zephyr application. -zephyr_get_include_directories_for_lang(C zephyr_includes STRIP_PREFIX) - -# Something in the zephyr_get_compile_options_for_lang() output causes the -# "-imacros" option to get dropped during expansion when passed to -# target_compile_options(). Fetch the compile options directly from -# zephyr_interface which works as expected. -get_property( - zephyr_compile_options - TARGET zephyr_interface - PROPERTY INTERFACE_COMPILE_OPTIONS - ) - -add_executable(npcx_monitor npcx_monitor.c) -target_include_directories(npcx_monitor PRIVATE - "${PLATFORM_EC}/zephyr/shim/include" - "${PLATFORM_EC}/zephyr/shim/chip/npcx/include" - ) -target_include_directories(npcx_monitor PRIVATE "${zephyr_includes}") -target_compile_options(npcx_monitor PRIVATE "${zephyr_compile_options}") - -target_link_options(npcx_monitor BEFORE PRIVATE - -nostdlib - -g - -mthumb - -Wl,-T,${CMAKE_CURRENT_SOURCE_DIR}/npcx_monitor.ld - ) - -# Create the NPCX monitor binary, locate it the root of the build -# directory as it needs to be found by the flash_util script -set(npcx_monitor_elf ${CMAKE_CURRENT_BINARY_DIR}/npcx_monitor.elf) -set(npcx_monitor_bin ${CMAKE_BINARY_DIR}/npcx_monitor.bin) - -add_custom_target(generate_npcx_monitor - COMMAND ${CMAKE_OBJCOPY} -O binary ${npcx_monitor_elf} ${npcx_monitor_bin} - BYPRODUCTS ${npcx_monitor_bin} - DEPENDS npcx_monitor - ) - -add_dependencies(zephyr generate_npcx_monitor) diff --git a/zephyr/shim/chip/npcx/npcx_monitor/npcx_monitor.c b/zephyr/shim/chip/npcx/npcx_monitor/npcx_monitor.c deleted file mode 100644 index 2bd9455a91..0000000000 --- a/zephyr/shim/chip/npcx/npcx_monitor/npcx_monitor.c +++ /dev/null @@ -1,343 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * NPCX SoC spi flash update tool - monitor firmware - */ - -#include <stdint.h> -#include <sys/util.h> -#include "config_chip.h" -#include "npcx_monitor.h" -#include "registers.h" - -/* - * TODO(b/197162681): This was copied from chip/npcx/spiflashfw but this - * needs to be moved to Zephyr upstream - */ - -/*****************************************************************************/ -/* spi flash internal functions */ -void sspi_flash_pinmux(int enable) -{ - if (enable) - CLEAR_BIT(NPCX_DEVALT(0), NPCX_DEVALT0_NO_F_SPI); - else - SET_BIT(NPCX_DEVALT(0), NPCX_DEVALT0_NO_F_SPI); - - /* CS0/1 pinmux */ - if (enable) { -#if (FIU_CHIP_SELECT == 1) - SET_BIT(NPCX_DEVALT(0), NPCX_DEVALT0_F_SPI_CS1_1); -#elif (FIU_CHIP_SELECT == 2) - SET_BIT(NPCX_DEVALT(0), NPCX_DEVALT0_F_SPI_CS1_2); -#endif - } else { - CLEAR_BIT(NPCX_DEVALT(0), NPCX_DEVALT0_F_SPI_CS1_1); - CLEAR_BIT(NPCX_DEVALT(0), NPCX_DEVALT0_F_SPI_CS1_2); - } -} - -void sspi_flash_tristate(int enable) -{ - if (enable) { - /* Enable FIU pins to tri-state */ - SET_BIT(NPCX_DEVCNT, NPCX_DEVCNT_F_SPI_TRIS); - } else { - /* Disable FIU pins to tri-state */ - CLEAR_BIT(NPCX_DEVCNT, NPCX_DEVCNT_F_SPI_TRIS); - } -} - -void sspi_flash_execute_cmd(uint8_t code, uint8_t cts) -{ - /* set UMA_CODE */ - NPCX_UMA_CODE = code; - /* execute UMA flash transaction */ - NPCX_UMA_CTS = cts; - while (IS_BIT_SET(NPCX_UMA_CTS, NPCX_UMA_CTS_EXEC_DONE)) - ; -} - -void sspi_flash_cs_level(int level) -{ - /* level is high */ - if (level) { - /* Set chip select to high */ - SET_BIT(NPCX_UMA_ECTS, NPCX_UMA_ECTS_SW_CS1); - } else { /* level is low */ - /* Set chip select to low */ - CLEAR_BIT(NPCX_UMA_ECTS, NPCX_UMA_ECTS_SW_CS1); - } -} - -void sspi_flash_wait_ready(void) -{ - uint8_t mask = SPI_FLASH_SR1_BUSY; - - /* Chip Select down. */ - sspi_flash_cs_level(0); - /* Command for Read status register */ - sspi_flash_execute_cmd(CMD_READ_STATUS_REG, MASK_CMD_ONLY); - do { - /* Read status register */ - NPCX_UMA_CTS = MASK_RD_1BYTE; - while (IS_BIT_SET(NPCX_UMA_CTS, NPCX_UMA_CTS_EXEC_DONE)) - ; - } while (NPCX_UMA_DB0 & mask); /* Wait for Busy clear */ - /* Chip Select high. */ - sspi_flash_cs_level(1); -} - -int sspi_flash_write_enable(void) -{ - uint8_t mask = SPI_FLASH_SR1_WEL; - /* Write enable command */ - sspi_flash_execute_cmd(CMD_WRITE_EN, MASK_CMD_ONLY); - /* Wait for flash is not busy */ - sspi_flash_wait_ready(); - - if (NPCX_UMA_DB0 & mask) - return 1; - else - return 0; -} - -void sspi_flash_set_address(uint32_t dest_addr) -{ - uint8_t *addr = (uint8_t *)&dest_addr; - /* Write address */ - NPCX_UMA_AB2 = addr[2]; - NPCX_UMA_AB1 = addr[1]; - NPCX_UMA_AB0 = addr[0]; -} - -void sspi_flash_burst_write(unsigned int dest_addr, unsigned int bytes, - const char *data) -{ - unsigned int i; - /* Chip Select down. */ - sspi_flash_cs_level(0); - /* Set erase address */ - sspi_flash_set_address(dest_addr); - /* Start write */ - sspi_flash_execute_cmd(CMD_FLASH_PROGRAM, MASK_CMD_WR_ADR); - for (i = 0; i < bytes; i++) { - sspi_flash_execute_cmd(*data, MASK_CMD_WR_ONLY); - data++; - } - /* Chip Select up */ - sspi_flash_cs_level(1); -} - -int sspi_flash_physical_clear_stsreg(void) -{ - /* Disable tri-state */ - sspi_flash_tristate(0); - /* Enable write */ - sspi_flash_write_enable(); - - NPCX_UMA_DB0 = 0x0; - NPCX_UMA_DB1 = 0x0; - - /* Write status register 1/2 */ - sspi_flash_execute_cmd(CMD_WRITE_STATUS_REG, MASK_CMD_WR_2BYTE); - - /* Wait writing completed */ - sspi_flash_wait_ready(); - - /* Read status register 1/2 for checking */ - sspi_flash_execute_cmd(CMD_READ_STATUS_REG, MASK_CMD_RD_1BYTE); - if (NPCX_UMA_DB0 != 0x00) - return 0; - sspi_flash_execute_cmd(CMD_READ_STATUS_REG2, MASK_CMD_RD_1BYTE); - if (NPCX_UMA_DB0 != 0x00) - return 0; - /* Enable tri-state */ - sspi_flash_tristate(1); - - return 1; -} - -void sspi_flash_physical_write(int offset, int size, const char *data) -{ - int dest_addr = offset; - const int sz_page = CONFIG_FLASH_WRITE_IDEAL_SIZE; - - /* Disable tri-state */ - sspi_flash_tristate(0); - - /* Write the data per CONFIG_FLASH_WRITE_IDEAL_SIZE bytes */ - for (; size >= sz_page; size -= sz_page) { - /* Enable write */ - sspi_flash_write_enable(); - /* Burst UMA transaction */ - sspi_flash_burst_write(dest_addr, sz_page, data); - /* Wait write completed */ - sspi_flash_wait_ready(); - - data += sz_page; - dest_addr += sz_page; - } - - /* Handle final partial page, if any */ - if (size != 0) { - /* Enable write */ - sspi_flash_write_enable(); - /* Burst UMA transaction */ - sspi_flash_burst_write(dest_addr, size, data); - - /* Wait write completed */ - sspi_flash_wait_ready(); - } - - /* Enable tri-state */ - sspi_flash_tristate(1); -} - -void sspi_flash_physical_erase(int offset, int size) -{ - /* Disable tri-state */ - sspi_flash_tristate(0); - - /* Alignment has been checked in upper layer */ - for (; size > 0; size -= NPCX_MONITOR_FLASH_ERASE_SIZE, - offset += NPCX_MONITOR_FLASH_ERASE_SIZE) { - /* Enable write */ - sspi_flash_write_enable(); - /* Set erase address */ - sspi_flash_set_address(offset); - /* Start erase */ - sspi_flash_execute_cmd(CMD_SECTOR_ERASE, MASK_CMD_ADR); - - /* Wait erase completed */ - sspi_flash_wait_ready(); - } - - /* Enable tri-state */ - sspi_flash_tristate(1); -} - -int sspi_flash_verify(int offset, int size, const char *data) -{ - int i, result; - uint8_t *ptr_flash; - uint8_t *ptr_mram; - uint8_t cmp_data; - - ptr_flash = (uint8_t *)(CONFIG_MAPPED_STORAGE_BASE + offset); - ptr_mram = (uint8_t *)data; - result = 1; - - /* Disable tri-state */ - sspi_flash_tristate(0); - - /* Start to verify */ - for (i = 0; i < size; i++) { - cmp_data = ptr_mram ? ptr_mram[i] : 0xFF; - if (ptr_flash[i] != cmp_data) { - result = 0; - break; - } - } - - /* Enable tri-state */ - sspi_flash_tristate(1); - return result; -} - -int sspi_flash_get_image_used(const char *fw_base) -{ - const uint8_t *image; - int size = MAX(CONFIG_RO_SIZE, CONFIG_RW_SIZE); /* max size is 128KB */ - - image = (const uint8_t *)fw_base; - /* - * Scan backwards looking for 0xea byte, which is by definition the - * last byte of the image. See ec.lds.S for how this is inserted at - * the end of the image. - */ - for (size--; size > 0 && image[size] != 0xea; size--) - ; - - return size ? size + 1 : 0; /* 0xea byte IS part of the image */ - -} - -/* Entry function of spi upload function */ -uint32_t __attribute__ ((section(".startup_text"))) -sspi_flash_upload(int spi_offset, int spi_size) -{ - /* - * Flash image has been uploaded to Code RAM - */ - uint32_t sz_image; - uint32_t uut_tag; - const char *image_base; - uint32_t *flag_upload = (uint32_t *)SPI_PROGRAMMING_FLAG; - struct monitor_header_tag *monitor_header = - (struct monitor_header_tag *)NPCX_MONITOR_HEADER_ADDR; - - *flag_upload = 0; - - uut_tag = monitor_header->tag; - /* If it is UUT tag, read required parameters from header */ - if (uut_tag == NPCX_MONITOR_UUT_TAG) { - sz_image = monitor_header->size; - spi_offset = monitor_header->dest_addr; - image_base = (const char *)(monitor_header->src_addr); - } else { - sz_image = spi_size; - image_base = (const char *)CONFIG_PROGRAM_MEMORY_BASE; - } - - /* Unlock & stop watchdog */ - NPCX_WDSDM = 0x87; - NPCX_WDSDM = 0x61; - NPCX_WDSDM = 0x63; - - /* UMA Unlock */ - CLEAR_BIT(NPCX_UMA_ECTS, NPCX_UMA_ECTS_UMA_LOCK); - - /* - * If UUT is used, assuming the target is the internal flash. - * Don't switch the pinmux and make sure bit 7 of DEVALT0 is set. - */ - if (uut_tag == NPCX_MONITOR_UUT_TAG) - SET_BIT(NPCX_DEVALT(0), NPCX_DEVALT0_NO_F_SPI); - else - /* Set pinmux first */ - sspi_flash_pinmux(1); - - /* Get size of image automatically */ - if (sz_image == 0) - sz_image = sspi_flash_get_image_used(image_base); - - /* Clear status reg of spi flash for protection */ - if (sspi_flash_physical_clear_stsreg()) { - /* Start to erase */ - sspi_flash_physical_erase(spi_offset, sz_image); - /* Start to write */ - if (image_base != NULL) - sspi_flash_physical_write(spi_offset, sz_image, - image_base); - /* Verify data */ - if (sspi_flash_verify(spi_offset, sz_image, image_base)) - *flag_upload |= 0x02; - } - if (uut_tag != NPCX_MONITOR_UUT_TAG) - /* Disable pinmux */ - sspi_flash_pinmux(0); - - /* Mark we have finished upload work */ - *flag_upload |= 0x01; - - /* Return the status back to ROM code is required for UUT */ - if (uut_tag == NPCX_MONITOR_UUT_TAG) - return *flag_upload; - - /* Infinite loop */ - for (;;) - ; -} - diff --git a/zephyr/shim/chip/npcx/npcx_monitor/npcx_monitor.h b/zephyr/shim/chip/npcx/npcx_monitor/npcx_monitor.h deleted file mode 100644 index c5415d94db..0000000000 --- a/zephyr/shim/chip/npcx/npcx_monitor/npcx_monitor.h +++ /dev/null @@ -1,33 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -#ifndef __CROS_EC_NPCX_MONITOR_H -#define __CROS_EC_NPCX_MONITOR_H - -#include <stdint.h> - -#define NPCX_MONITOR_UUT_TAG 0xA5075001 -#define NPCX_MONITOR_HEADER_ADDR 0x200C3000 - -/* Flag to record the progress of programming SPI flash */ -#define SPI_PROGRAMMING_FLAG 0x200C4000 - -struct monitor_header_tag { - /* offset 0x00: TAG NPCX_MONITOR_TAG */ - uint32_t tag; - /* offset 0x04: Size of the binary being programmed (in bytes) */ - uint32_t size; - /* offset 0x08: The RAM address of the binary to program into the SPI */ - uint32_t src_addr; - /* offset 0x0C: The Flash address to be programmed (Absolute address) */ - uint32_t dest_addr; - /* offset 0x10: Maximum allowable flash clock frequency */ - uint8_t max_clock; - /* offset 0x11: SPI Flash read mode */ - uint8_t read_mode; - /* offset 0x12: Reserved */ - uint16_t reserved; -} __packed; - -#endif /* __CROS_EC_NPCX_MONITOR_H */ diff --git a/zephyr/shim/chip/npcx/npcx_monitor/npcx_monitor.ld b/zephyr/shim/chip/npcx/npcx_monitor/npcx_monitor.ld deleted file mode 100644 index 03e38b0609..0000000000 --- a/zephyr/shim/chip/npcx/npcx_monitor/npcx_monitor.ld +++ /dev/null @@ -1,52 +0,0 @@ -/* Copyright 2017 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * NPCX SoC spi flash update tool - */ - -/* Memory Spaces Definitions */ -MEMORY -{ - CODERAM (rx) : ORIGIN = 0x200C3020, LENGTH = 0xFE0 -} - -/* - * The entry point is informative, for debuggers and simulators, - * since the Cortex-M vector points to it anyway. - */ -ENTRY(sspi_flash_upload) - - -/* Sections Definitions */ - -SECTIONS -{ - .startup_text : - { - . = ALIGN(4); - *(.startup_text ) /* Startup code */ - . = ALIGN(4); - } >CODERAM - - /* - * The program code is stored in the .text section, - * which goes to CODERAM. - */ - .text : - { - . = ALIGN(4); - *(.text .text.*) /* all remaining code */ - *(.rodata .rodata.*) /* read-only data (constants) */ - } >CODERAM - - . = ALIGN(4); - _etext = .; - - /* - * This address is used by the startup code to - * initialise the .data section. - */ - _sidata = _etext; - -} diff --git a/zephyr/shim/chip/npcx/npcx_monitor/registers.h b/zephyr/shim/chip/npcx/npcx_monitor/registers.h deleted file mode 100644 index cc0a6b96fe..0000000000 --- a/zephyr/shim/chip/npcx/npcx_monitor/registers.h +++ /dev/null @@ -1,360 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Register map for NPCX processor - * - * This is meant to be temporary until the NPCX monitor support is moved - * to Zephyr upstream - */ - -#ifndef __CROS_EC_REGISTERS_H -#define __CROS_EC_REGISTERS_H - -/* - * The monitor code doesn't build cleanly under the Zephyr environment if - * include/common.h is included. Replicate the register access macros until - * this code is moved upstream. - */ - -/* Macros to access registers */ -#define REG64_ADDR(addr) ((volatile uint64_t *)(addr)) -#define REG32_ADDR(addr) ((volatile uint32_t *)(addr)) -#define REG16_ADDR(addr) ((volatile uint16_t *)(addr)) -#define REG8_ADDR(addr) ((volatile uint8_t *)(addr)) - -#define REG64(addr) (*REG64_ADDR(addr)) -#define REG32(addr) (*REG32_ADDR(addr)) -#define REG16(addr) (*REG16_ADDR(addr)) -#define REG8(addr) (*REG8_ADDR(addr)) - -/* Standard macros / definitions */ -#define GENERIC_MAX(x, y) ((x) > (y) ? (x) : (y)) -#define GENERIC_MIN(x, y) ((x) < (y) ? (x) : (y)) -#ifndef MAX -#define MAX(a, b) \ - ({ \ - __typeof__(a) temp_a = (a); \ - __typeof__(b) temp_b = (b); \ - \ - GENERIC_MAX(temp_a, temp_b); \ - }) -#endif -#ifndef MIN -#define MIN(a, b) \ - ({ \ - __typeof__(a) temp_a = (a); \ - __typeof__(b) temp_b = (b); \ - \ - GENERIC_MIN(temp_a, temp_b); \ - }) -#endif -#ifndef NULL -#define NULL ((void *)0) -#endif - -/******************************************************************************/ -/* - * Macro Functions - */ -/* Bit functions */ -#define SET_BIT(reg, bit) ((reg) |= (0x1 << (bit))) -#define CLEAR_BIT(reg, bit) ((reg) &= (~(0x1 << (bit)))) -#define IS_BIT_SET(reg, bit) (((reg) >> (bit)) & (0x1)) -#define UPDATE_BIT(reg, bit, cond) { if (cond) \ - SET_BIT(reg, bit); \ - else \ - CLEAR_BIT(reg, bit); } -/* Field functions */ -#define GET_POS_FIELD(pos, size) pos -#define GET_SIZE_FIELD(pos, size) size -#define FIELD_POS(field) GET_POS_##field -#define FIELD_SIZE(field) GET_SIZE_##field -/* Read field functions */ -#define GET_FIELD(reg, field) \ - _GET_FIELD_(reg, FIELD_POS(field), FIELD_SIZE(field)) -#define _GET_FIELD_(reg, f_pos, f_size) (((reg)>>(f_pos)) & ((1<<(f_size))-1)) -/* Write field functions */ -#define SET_FIELD(reg, field, value) \ - _SET_FIELD_(reg, FIELD_POS(field), FIELD_SIZE(field), value) -#define _SET_FIELD_(reg, f_pos, f_size, value) \ - ((reg) = ((reg) & (~(((1 << (f_size))-1) << (f_pos)))) \ - | ((value) << (f_pos))) - - -/* NPCX7 & NPCX9 */ -#define NPCX_DEVALT(n) REG8(NPCX_SCFG_BASE_ADDR + 0x010 + (n)) - -/******************************************************************************/ -/* - * NPCX (Nuvoton M4 EC) Register Definitions - */ - -/* Modules Map */ -#define NPCX_ESPI_BASE_ADDR 0x4000A000 -#define NPCX_MDC_BASE_ADDR 0x4000C000 -#define NPCX_PMC_BASE_ADDR 0x4000D000 -#define NPCX_SIB_BASE_ADDR 0x4000E000 -#define NPCX_SHI_BASE_ADDR 0x4000F000 -#define NPCX_SHM_BASE_ADDR 0x40010000 -#define NPCX_GDMA_BASE_ADDR 0x40011000 -#define NPCX_FIU_BASE_ADDR 0x40020000 -#define NPCX_KBSCAN_REGS_BASE 0x400A3000 -#define NPCX_WOV_BASE_ADDR 0x400A4000 -#define NPCX_APM_BASE_ADDR 0x400A4800 -#define NPCX_GLUE_REGS_BASE 0x400A5000 -#define NPCX_BBRAM_BASE_ADDR 0x400AF000 -#define NPCX_PS2_BASE_ADDR 0x400B1000 -#define NPCX_HFCG_BASE_ADDR 0x400B5000 -#define NPCX_LFCG_BASE_ADDR 0x400B5100 -#define NPCX_FMUL2_BASE_ADDR 0x400B5200 -#define NPCX_MTC_BASE_ADDR 0x400B7000 -#define NPCX_MSWC_BASE_ADDR 0x400C1000 -#define NPCX_SCFG_BASE_ADDR 0x400C3000 -#define NPCX_KBC_BASE_ADDR 0x400C7000 -#define NPCX_ADC_BASE_ADDR 0x400D1000 -#define NPCX_SPI_BASE_ADDR 0x400D2000 -#define NPCX_PECI_BASE_ADDR 0x400D4000 -#define NPCX_TWD_BASE_ADDR 0x400D8000 - -/* Multi-Modules Map */ -#define NPCX_PWM_BASE_ADDR(mdl) (0x40080000 + ((mdl) * 0x2000L)) -#define NPCX_GPIO_BASE_ADDR(mdl) (0x40081000 + ((mdl) * 0x2000L)) -#define NPCX_ITIM_BASE_ADDR(mdl) (0x400B0000 + ((mdl) * 0x2000L)) -#define NPCX_MIWU_BASE_ADDR(mdl) (0x400BB000 + ((mdl) * 0x2000L)) -#define NPCX_MFT_BASE_ADDR(mdl) (0x400E1000 + ((mdl) * 0x2000L)) -#define NPCX_PM_CH_BASE_ADDR(mdl) (0x400C9000 + ((mdl) * 0x2000L)) - - -/******************************************************************************/ -/* System Configuration (SCFG) Registers */ -#define NPCX_DEVCNT REG8(NPCX_SCFG_BASE_ADDR + 0x000) -#define NPCX_STRPST REG8(NPCX_SCFG_BASE_ADDR + 0x001) -#define NPCX_RSTCTL REG8(NPCX_SCFG_BASE_ADDR + 0x002) -#define NPCX_DEV_CTL4 REG8(NPCX_SCFG_BASE_ADDR + 0x006) -#define NPCX_LFCGCALCNT REG8(NPCX_SCFG_BASE_ADDR + 0x021) -#define NPCX_PUPD_EN0 REG8(NPCX_SCFG_BASE_ADDR + 0x028) -#define NPCX_PUPD_EN1 REG8(NPCX_SCFG_BASE_ADDR + 0x029) -#define NPCX_SCFG_VER REG8(NPCX_SCFG_BASE_ADDR + 0x02F) - -#define TEST_BKSL REG8(NPCX_SCFG_BASE_ADDR + 0x037) -#define TEST0 REG8(NPCX_SCFG_BASE_ADDR + 0x038) -#define BLKSEL 0 - -/* SCFG register fields */ -#define NPCX_DEVCNT_F_SPI_TRIS 6 -#define NPCX_DEVCNT_HIF_TYP_SEL_FIELD FIELD(2, 2) -#define NPCX_DEVCNT_JEN1_HEN 5 -#define NPCX_DEVCNT_JEN0_HEN 4 -#define NPCX_STRPST_TRIST 1 -#define NPCX_STRPST_TEST 2 -#define NPCX_STRPST_JEN1 4 -#define NPCX_STRPST_JEN0 5 -#define NPCX_STRPST_SPI_COMP 7 -#define NPCX_RSTCTL_VCC1_RST_STS 0 -#define NPCX_RSTCTL_DBGRST_STS 1 -#define NPCX_RSTCTL_VCC1_RST_SCRATCH 3 -#define NPCX_RSTCTL_LRESET_PLTRST_MODE 5 -#define NPCX_RSTCTL_HIPRST_MODE 6 -#define NPCX_DEV_CTL4_F_SPI_SLLK 2 -#define NPCX_DEV_CTL4_SPI_SP_SEL 4 -#define NPCX_DEV_CTL4_WP_IF 5 -#define NPCX_DEV_CTL4_VCC1_RST_LK 6 -#define NPCX_DEVPU0_I2C0_0_PUE 0 -#define NPCX_DEVPU0_I2C0_1_PUE 1 -#define NPCX_DEVPU0_I2C1_0_PUE 2 -#define NPCX_DEVPU0_I2C2_0_PUE 4 -#define NPCX_DEVPU0_I2C3_0_PUE 6 -#define NPCX_DEVPU1_F_SPI_PUD_EN 7 - -/* DEVALT */ -/* pin-mux for SPI/FIU */ -#define NPCX_DEVALT0_SPIP_SL 0 -#define NPCX_DEVALT0_GPIO_NO_SPIP 3 -#define NPCX_DEVALT0_F_SPI_CS1_2 4 -#define NPCX_DEVALT0_F_SPI_CS1_1 5 -#define NPCX_DEVALT0_F_SPI_QUAD 6 -#define NPCX_DEVALT0_NO_F_SPI 7 - -/******************************************************************************/ -/* Flash Interface Unit (FIU) Registers */ -#define NPCX_FIU_CFG REG8(NPCX_FIU_BASE_ADDR + 0x000) -#define NPCX_BURST_CFG REG8(NPCX_FIU_BASE_ADDR + 0x001) -#define NPCX_RESP_CFG REG8(NPCX_FIU_BASE_ADDR + 0x002) -#define NPCX_SPI_FL_CFG REG8(NPCX_FIU_BASE_ADDR + 0x014) -#define NPCX_UMA_CODE REG8(NPCX_FIU_BASE_ADDR + 0x016) -#define NPCX_UMA_AB0 REG8(NPCX_FIU_BASE_ADDR + 0x017) -#define NPCX_UMA_AB1 REG8(NPCX_FIU_BASE_ADDR + 0x018) -#define NPCX_UMA_AB2 REG8(NPCX_FIU_BASE_ADDR + 0x019) -#define NPCX_UMA_DB0 REG8(NPCX_FIU_BASE_ADDR + 0x01A) -#define NPCX_UMA_DB1 REG8(NPCX_FIU_BASE_ADDR + 0x01B) -#define NPCX_UMA_DB2 REG8(NPCX_FIU_BASE_ADDR + 0x01C) -#define NPCX_UMA_DB3 REG8(NPCX_FIU_BASE_ADDR + 0x01D) -#define NPCX_UMA_CTS REG8(NPCX_FIU_BASE_ADDR + 0x01E) -#define NPCX_UMA_ECTS REG8(NPCX_FIU_BASE_ADDR + 0x01F) -#define NPCX_UMA_DB0_3 REG32(NPCX_FIU_BASE_ADDR + 0x020) -#define NPCX_FIU_RD_CMD REG8(NPCX_FIU_BASE_ADDR + 0x030) -#define NPCX_FIU_DMM_CYC REG8(NPCX_FIU_BASE_ADDR + 0x032) -#define NPCX_FIU_EXT_CFG REG8(NPCX_FIU_BASE_ADDR + 0x033) -#define NPCX_FIU_UMA_AB0_3 REG32(NPCX_FIU_BASE_ADDR + 0x034) - -/* FIU register fields */ -#define NPCX_RESP_CFG_IAD_EN 0 -#define NPCX_RESP_CFG_DEV_SIZE_EX 2 -#define NPCX_UMA_CTS_A_SIZE 3 -#define NPCX_UMA_CTS_C_SIZE 4 -#define NPCX_UMA_CTS_RD_WR 5 -#define NPCX_UMA_CTS_DEV_NUM 6 -#define NPCX_UMA_CTS_EXEC_DONE 7 -#define NPCX_UMA_ECTS_SW_CS0 0 -#define NPCX_UMA_ECTS_SW_CS1 1 -#define NPCX_UMA_ECTS_SEC_CS 2 -#define NPCX_UMA_ECTS_UMA_LOCK 3 - -/******************************************************************************/ -/* KBC Registers */ -#define NPCX_HICTRL REG8(NPCX_KBC_BASE_ADDR + 0x000) -#define NPCX_HIIRQC REG8(NPCX_KBC_BASE_ADDR + 0x002) -#define NPCX_HIKMST REG8(NPCX_KBC_BASE_ADDR + 0x004) -#define NPCX_HIKDO REG8(NPCX_KBC_BASE_ADDR + 0x006) -#define NPCX_HIMDO REG8(NPCX_KBC_BASE_ADDR + 0x008) -#define NPCX_KBCVER REG8(NPCX_KBC_BASE_ADDR + 0x009) -#define NPCX_HIKMDI REG8(NPCX_KBC_BASE_ADDR + 0x00A) -#define NPCX_SHIKMDI REG8(NPCX_KBC_BASE_ADDR + 0x00B) - -/* KBC register field */ -#define NPCX_HICTRL_OBFKIE 0 /* Automatic Serial IRQ1 for KBC */ -#define NPCX_HICTRL_OBFMIE 1 /* Automatic Serial IRQ12 for Mouse*/ -#define NPCX_HICTRL_OBECIE 2 /* KBC OBE interrupt enable */ -#define NPCX_HICTRL_IBFCIE 3 /* KBC IBF interrupt enable */ -#define NPCX_HICTRL_PMIHIE 4 /* Automatic Serial IRQ11 for PMC1 */ -#define NPCX_HICTRL_PMIOCIE 5 /* PMC1 OBE interrupt enable */ -#define NPCX_HICTRL_PMICIE 6 /* PMC1 IBF interrupt enable */ -#define NPCX_HICTRL_FW_OBF 7 /* Firmware control over OBF */ - -#define NPCX_HIKMST_OBF 0 /* KB output buffer is full */ - -/******************************************************************************/ -/* Timer Watch Dog (TWD) Registers */ -#define NPCX_TWCFG REG8(NPCX_TWD_BASE_ADDR + 0x000) -#define NPCX_TWCP REG8(NPCX_TWD_BASE_ADDR + 0x002) -#define NPCX_TWDT0 REG16(NPCX_TWD_BASE_ADDR + 0x004) -#define NPCX_T0CSR REG8(NPCX_TWD_BASE_ADDR + 0x006) -#define NPCX_WDCNT REG8(NPCX_TWD_BASE_ADDR + 0x008) -#define NPCX_WDSDM REG8(NPCX_TWD_BASE_ADDR + 0x00A) -#define NPCX_TWMT0 REG16(NPCX_TWD_BASE_ADDR + 0x00C) -#define NPCX_TWMWD REG8(NPCX_TWD_BASE_ADDR + 0x00E) -#define NPCX_WDCP REG8(NPCX_TWD_BASE_ADDR + 0x010) - -/* TWD register fields */ -#define NPCX_TWCFG_LTWCFG 0 -#define NPCX_TWCFG_LTWCP 1 -#define NPCX_TWCFG_LTWDT0 2 -#define NPCX_TWCFG_LWDCNT 3 -#define NPCX_TWCFG_WDCT0I 4 -#define NPCX_TWCFG_WDSDME 5 -#define NPCX_TWCFG_WDRST_MODE 6 -#define NPCX_TWCFG_WDC2POR 7 -#define NPCX_T0CSR_RST 0 -#define NPCX_T0CSR_TC 1 -#define NPCX_T0CSR_WDLTD 3 -#define NPCX_T0CSR_WDRST_STS 4 -#define NPCX_T0CSR_WD_RUN 5 -#define NPCX_T0CSR_TESDIS 7 - -/******************************************************************************/ -/* SPI Register */ -#define NPCX_SPI_DATA REG16(NPCX_SPI_BASE_ADDR + 0x00) -#define NPCX_SPI_CTL1 REG16(NPCX_SPI_BASE_ADDR + 0x02) -#define NPCX_SPI_STAT REG8(NPCX_SPI_BASE_ADDR + 0x04) - -/* SPI register fields */ -#define NPCX_SPI_CTL1_SPIEN 0 -#define NPCX_SPI_CTL1_SNM 1 -#define NPCX_SPI_CTL1_MOD 2 -#define NPCX_SPI_CTL1_EIR 5 -#define NPCX_SPI_CTL1_EIW 6 -#define NPCX_SPI_CTL1_SCM 7 -#define NPCX_SPI_CTL1_SCIDL 8 -#define NPCX_SPI_CTL1_SCDV 9 -#define NPCX_SPI_STAT_BSY 0 -#define NPCX_SPI_STAT_RBF 1 - -/******************************************************************************/ -/* Flash Utiltiy definition */ -/* - * Flash commands for the W25Q16CV SPI flash - */ -#define CMD_READ_ID 0x9F -#define CMD_READ_MAN_DEV_ID 0x90 -#define CMD_WRITE_EN 0x06 -#define CMD_WRITE_STATUS 0x50 -#define CMD_READ_STATUS_REG 0x05 -#define CMD_READ_STATUS_REG2 0x35 -#define CMD_WRITE_STATUS_REG 0x01 -#define CMD_FLASH_PROGRAM 0x02 -#define CMD_SECTOR_ERASE 0x20 -#define CMD_BLOCK_32K_ERASE 0x52 -#define CMD_BLOCK_64K_ERASE 0xd8 -#define CMD_PROGRAM_UINT_SIZE 0x08 -#define CMD_PAGE_SIZE 0x00 -#define CMD_READ_ID_TYPE 0x47 -#define CMD_FAST_READ 0x0B - -/* - * Status registers for the W25Q16CV SPI flash - */ -#define SPI_FLASH_SR2_SUS BIT(7) -#define SPI_FLASH_SR2_CMP BIT(6) -#define SPI_FLASH_SR2_LB3 BIT(5) -#define SPI_FLASH_SR2_LB2 BIT(4) -#define SPI_FLASH_SR2_LB1 BIT(3) -#define SPI_FLASH_SR2_QE BIT(1) -#define SPI_FLASH_SR2_SRP1 BIT(0) -#define SPI_FLASH_SR1_SRP0 BIT(7) -#define SPI_FLASH_SR1_SEC BIT(6) -#define SPI_FLASH_SR1_TB BIT(5) -#define SPI_FLASH_SR1_BP2 BIT(4) -#define SPI_FLASH_SR1_BP1 BIT(3) -#define SPI_FLASH_SR1_BP0 BIT(2) -#define SPI_FLASH_SR1_WEL BIT(1) -#define SPI_FLASH_SR1_BUSY BIT(0) - - -/* 0: F_CS0 1: F_CS1_1(GPIO86) 2:F_CS1_2(GPIOA6) */ -#define FIU_CHIP_SELECT 0 -/* Create UMA control mask */ -#define MASK(bit) (0x1 << (bit)) -#define A_SIZE 0x03 /* 0: No ADR field 1: 3-bytes ADR field */ -#define C_SIZE 0x04 /* 0: 1-Byte CMD field 1:No CMD field */ -#define RD_WR 0x05 /* 0: Read 1: Write */ -#define DEV_NUM 0x06 /* 0: PVT is used 1: SHD is used */ -#define EXEC_DONE 0x07 -#define D_SIZE_1 0x01 -#define D_SIZE_2 0x02 -#define D_SIZE_3 0x03 -#define D_SIZE_4 0x04 -#define FLASH_SEL MASK(DEV_NUM) - -#define MASK_CMD_ONLY (MASK(EXEC_DONE) | FLASH_SEL) -#define MASK_CMD_ADR (MASK(EXEC_DONE) | FLASH_SEL | MASK(A_SIZE)) -#define MASK_CMD_ADR_WR (MASK(EXEC_DONE) | FLASH_SEL | MASK(RD_WR) \ - |MASK(A_SIZE) | D_SIZE_1) -#define MASK_RD_1BYTE (MASK(EXEC_DONE) | FLASH_SEL | MASK(C_SIZE) | D_SIZE_1) -#define MASK_RD_2BYTE (MASK(EXEC_DONE) | FLASH_SEL | MASK(C_SIZE) | D_SIZE_2) -#define MASK_RD_3BYTE (MASK(EXEC_DONE) | FLASH_SEL | MASK(C_SIZE) | D_SIZE_3) -#define MASK_RD_4BYTE (MASK(EXEC_DONE) | FLASH_SEL | MASK(C_SIZE) | D_SIZE_4) -#define MASK_CMD_RD_1BYTE (MASK(EXEC_DONE) | FLASH_SEL | D_SIZE_1) -#define MASK_CMD_RD_2BYTE (MASK(EXEC_DONE) | FLASH_SEL | D_SIZE_2) -#define MASK_CMD_RD_3BYTE (MASK(EXEC_DONE) | FLASH_SEL | D_SIZE_3) -#define MASK_CMD_RD_4BYTE (MASK(EXEC_DONE) | FLASH_SEL | D_SIZE_4) -#define MASK_CMD_WR_ONLY (MASK(EXEC_DONE) | FLASH_SEL | MASK(RD_WR)) -#define MASK_CMD_WR_1BYTE (MASK(EXEC_DONE) | FLASH_SEL | MASK(RD_WR) \ - | MASK(C_SIZE) | D_SIZE_1) -#define MASK_CMD_WR_2BYTE (MASK(EXEC_DONE) | FLASH_SEL | MASK(RD_WR) \ - | MASK(C_SIZE) | D_SIZE_2) -#define MASK_CMD_WR_ADR (MASK(EXEC_DONE) | FLASH_SEL | MASK(RD_WR) \ - | MASK(A_SIZE)) - - -#endif /* __CROS_EC_REGISTERS_H */ diff --git a/zephyr/shim/chip/npcx/power_policy.c b/zephyr/shim/chip/npcx/power_policy.c deleted file mode 100644 index 803ac51e9b..0000000000 --- a/zephyr/shim/chip/npcx/power_policy.c +++ /dev/null @@ -1,34 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <zephyr.h> -#include <pm/pm.h> -#include <soc.h> - -#include "console.h" -#include "cros_version.h" -#include "system.h" - -static const struct pm_state_info pm_min_residency[] = - PM_STATE_INFO_DT_ITEMS_LIST(DT_NODELABEL(cpu0)); - -/* CROS PM policy handler */ -struct pm_state_info pm_policy_next_state(int32_t ticks) -{ - /* Deep sleep is allowed and console is not in use. */ - if (DEEP_SLEEP_ALLOWED != 0 && !npcx_power_console_is_in_use()) { - for (int i = ARRAY_SIZE(pm_min_residency) - 1; i >= 0; i--) { - /* Find suitable power state by residency time */ - if (ticks == K_TICKS_FOREVER || - ticks >= k_us_to_ticks_ceil32( - pm_min_residency[i] - .min_residency_us)) { - return pm_min_residency[i]; - } - } - } - - return (struct pm_state_info){ PM_STATE_ACTIVE, 0, 0 }; -} diff --git a/zephyr/shim/chip/npcx/shi.c b/zephyr/shim/chip/npcx/shi.c deleted file mode 100644 index 22b153a806..0000000000 --- a/zephyr/shim/chip/npcx/shi.c +++ /dev/null @@ -1,87 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Functions needed by Serial Host Interface module for Chrome EC */ - -#include <device.h> -#include <dt-bindings/clock/npcx_clock.h> -#include <logging/log.h> -#include <soc.h> -#include <zephyr.h> - -#include "chipset.h" -#include "drivers/cros_shi.h" -#include "hooks.h" -#include "host_command.h" -#include "system.h" - -LOG_MODULE_REGISTER(shim_cros_shi, LOG_LEVEL_DBG); - -#define SHI_NODE DT_NODELABEL(shi) - -static void shi_enable(void) -{ - const struct device *cros_shi_dev = DEVICE_DT_GET(SHI_NODE); - - if (!device_is_ready(cros_shi_dev)) { - LOG_ERR("Error: device %s is not ready", cros_shi_dev->name); - return; - } - - LOG_INF("%s", __func__); - cros_shi_enable(cros_shi_dev); -} -#ifdef CONFIG_CHIPSET_RESUME_INIT_HOOK -DECLARE_HOOK(HOOK_CHIPSET_RESUME_INIT, shi_enable, HOOK_PRIO_DEFAULT); -#else -DECLARE_HOOK(HOOK_CHIPSET_RESUME, shi_enable, HOOK_PRIO_DEFAULT); -#endif - -static void shi_reenable_on_sysjump(void) -{ - if (IS_ENABLED(CONFIG_CROS_SHI_NPCX_DEBUG) || - (system_jumped_late() && chipset_in_state(CHIPSET_STATE_ON))) { - shi_enable(); - } -} -/* Call hook after chipset sets initial power state */ -DECLARE_HOOK(HOOK_INIT, shi_reenable_on_sysjump, HOOK_PRIO_INIT_CHIPSET + 1); - -static void shi_disable(void) -{ - const struct device *cros_shi_dev = DEVICE_DT_GET(SHI_NODE); - - if (!device_is_ready(cros_shi_dev)) { - LOG_ERR("Error: device %s is not ready", cros_shi_dev->name); - return; - } - - LOG_INF("%s", __func__); - cros_shi_disable(cros_shi_dev); -} -#ifdef CONFIG_CHIPSET_RESUME_INIT_HOOK -DECLARE_HOOK(HOOK_CHIPSET_SUSPEND_COMPLETE, shi_disable, HOOK_PRIO_DEFAULT); -#else -DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, shi_disable, HOOK_PRIO_DEFAULT); -#endif -DECLARE_HOOK(HOOK_SYSJUMP, shi_disable, HOOK_PRIO_DEFAULT); - -/* Get protocol information */ -static enum ec_status shi_get_protocol_info(struct host_cmd_handler_args *args) -{ - struct ec_response_get_protocol_info *r = args->response; - - memset(r, '\0', sizeof(*r)); - r->protocol_versions = BIT(3); - r->max_request_packet_size = CONFIG_CROS_SHI_MAX_REQUEST; - r->max_response_packet_size = CONFIG_CROS_SHI_MAX_RESPONSE; - r->flags = EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED; - - args->response_size = sizeof(*r); - - return EC_SUCCESS; -} -DECLARE_HOST_COMMAND(EC_CMD_GET_PROTOCOL_INFO, shi_get_protocol_info, - EC_VER_MASK(0)); diff --git a/zephyr/shim/chip/npcx/system.c b/zephyr/shim/chip/npcx/system.c deleted file mode 100644 index 9809e138d5..0000000000 --- a/zephyr/shim/chip/npcx/system.c +++ /dev/null @@ -1,97 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <drivers/bbram.h> -#include <logging/log.h> - -#include "system.h" -#include "system_chip.h" - -LOG_MODULE_REGISTER(shim_npcx_system, LOG_LEVEL_ERR); - -static void chip_bbram_status_check(void) -{ - const struct device *bbram_dev; - int res; - - bbram_dev = DEVICE_DT_GET(DT_NODELABEL(bbram)); - if (!device_is_ready(bbram_dev)) { - LOG_ERR("Error: device %s is not ready", bbram_dev->name); - return; - } - - res = bbram_check_invalid(bbram_dev); - if (res != 0 && res != -ENOTSUP) - LOG_INF("VBAT power drop!"); - - res = bbram_check_standby_power(bbram_dev); - if (res != 0 && res != -ENOTSUP) - LOG_INF("VSBY power drop!"); - - res = bbram_check_power(bbram_dev); - if (res != 0 && res != -ENOTSUP) - LOG_INF("VCC1 power drop!"); -} - -/* - * Configure address 0x40001600 (Low Power RAM) in the the MPU - * (Memory Protection Unit) as a "regular" memory - */ -void system_mpu_config(void) -{ - if (!IS_ENABLED(CONFIG_PLATFORM_EC_WORKAROUND_FLASH_DOWNLOAD_API)) - return; - - /* - * npcx9 Rev.1 has the problem for download_from_flash API. - * Workaround it by implementing the system_download_from_flash function - * in the suspend RAM. The functions will do the same, but will provide - * a software solution similar to what's done in the npcx5. - */ - /* Enable MPU */ - CPU_MPU_CTRL = 0x7; - - /* Create a new MPU Region to allow execution from low-power ram */ - CPU_MPU_RNR = REGION_CHIP_RESERVED; - CPU_MPU_RASR = CPU_MPU_RASR & 0xFFFFFFFE; /* Disable region */ - CPU_MPU_RBAR = CONFIG_LPRAM_BASE; /* Set region base address */ - /* - * Set region size & attribute and enable region - * [31:29] - Reserved. - * [28] - XN (Execute Never) = 0 - * [27] - Reserved. - * [26:24] - AP = 011 (Full access) - * [23:22] - Reserved. - * [21:19,18,17,16] - TEX,S,C,B = 001000 (Normal memory) - * [15:8] - SRD = 0 (Subregions enabled) - * [7:6] - Reserved. - * [5:1] - SIZE = 01001 (1K) - * [0] - ENABLE = 1 (enabled) - */ - CPU_MPU_RASR = 0x03080013; -} - -static int chip_system_init(const struct device *unused) -{ - ARG_UNUSED(unused); - - /* - * Check BBRAM power status. - */ - chip_bbram_status_check(); - - system_mpu_config(); - - return 0; -} -/* - * The priority should be lower than CROS_BBRAM_NPCX_INIT_PRIORITY. - */ -#if (CONFIG_CROS_SYSTEM_NPCX_PRE_INIT_PRIORITY <= CONFIG_BBRAM_INIT_PRIORITY) -#error CONFIG_CROS_SYSTEM_NPCX_PRE_INIT_PRIORITY must greater than \ - CONFIG_BBRAM_INIT_PRIORITY -#endif -SYS_INIT(chip_system_init, PRE_KERNEL_1, - CONFIG_CROS_SYSTEM_NPCX_PRE_INIT_PRIORITY); diff --git a/zephyr/shim/chip/npcx/system_download_from_flash.c b/zephyr/shim/chip/npcx/system_download_from_flash.c deleted file mode 100644 index 28ec22962c..0000000000 --- a/zephyr/shim/chip/npcx/system_download_from_flash.c +++ /dev/null @@ -1,159 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -#include <dt-bindings/clock/npcx_clock.h> -#include <stdnoreturn.h> -#include <sys/__assert.h> - -#include "common.h" -#include "soc.h" -#include "system_chip.h" - -/* Modules Map */ -#define NPCX_PMC_BASE_ADDR 0x4000D000 -#define NPCX_GDMA_BASE_ADDR 0x40011000 - -/******************************************************************************/ -/* GDMA (General DMA) Registers */ -#define NPCX_GDMA_CTL REG32(NPCX_GDMA_BASE_ADDR + 0x000) -#define NPCX_GDMA_SRCB REG32(NPCX_GDMA_BASE_ADDR + 0x004) -#define NPCX_GDMA_DSTB REG32(NPCX_GDMA_BASE_ADDR + 0x008) -#define NPCX_GDMA_TCNT REG32(NPCX_GDMA_BASE_ADDR + 0x00C) - -/******************************************************************************/ -/* GDMA register fields */ -#define NPCX_GDMA_CTL_GDMAEN 0 -#define NPCX_GDMA_CTL_GDMAMS FIELD(2, 2) -#define NPCX_GDMA_CTL_DADIR 4 -#define NPCX_GDMA_CTL_SADIR 5 -#define NPCX_GDMA_CTL_SAFIX 7 -#define NPCX_GDMA_CTL_SIEN 8 -#define NPCX_GDMA_CTL_BME 9 -#define NPCX_GDMA_CTL_SBMS 11 -#define NPCX_GDMA_CTL_TWS FIELD(12, 2) -#define NPCX_GDMA_CTL_DM 15 -#define NPCX_GDMA_CTL_SOFTREQ 16 -#define NPCX_GDMA_CTL_TC 18 -#define NPCX_GDMA_CTL_GDMAERR 20 -#define NPCX_GDMA_CTL_BLOCK_BUG_CORRECTION_DISABLE 26 - -/******************************************************************************/ -/* Low Power RAM definitions */ -#define NPCX_LPRAM_CTRL REG32(0x40001044) - -/******************************************************************************/ -/* Sysjump utilities in low power ram for npcx series. */ -noreturn void __keep __attribute__ ((section(".lowpower_ram2"))) -__start_gdma(uint32_t exeAddr) -{ - /* Enable GDMA now */ - SET_BIT(NPCX_GDMA_CTL, NPCX_GDMA_CTL_GDMAEN); - - /* Start GDMA */ - SET_BIT(NPCX_GDMA_CTL, NPCX_GDMA_CTL_SOFTREQ); - - /* Wait for transfer to complete/fail */ - while (!IS_BIT_SET(NPCX_GDMA_CTL, NPCX_GDMA_CTL_TC) && - !IS_BIT_SET(NPCX_GDMA_CTL, NPCX_GDMA_CTL_GDMAERR)) - ; - - /* Disable GDMA now */ - CLEAR_BIT(NPCX_GDMA_CTL, NPCX_GDMA_CTL_GDMAEN); - - /* - * Failure occurs during GMDA transaction. Let watchdog issue and - * boot from RO region again. - */ - if (IS_BIT_SET(NPCX_GDMA_CTL, NPCX_GDMA_CTL_GDMAERR)) - while (1) - ; - - /* - * Jump to the exeAddr address if needed. Setting bit 0 of address to - * indicate it's a thumb branch for cortex-m series CPU. - */ - ((void (*)(void))(exeAddr | 0x01))(); - - /* Should never get here */ - while (1) - ; -} - -/* Begin address of Suspend RAM for little FW (GDMA utilities). */ -#define LFW_OFFSET 0x160 -uintptr_t __lpram_lfw_start = CONFIG_LPRAM_BASE + LFW_OFFSET; - -void system_download_from_flash(uint32_t srcAddr, uint32_t dstAddr, - uint32_t size, uint32_t exeAddr) -{ - int i; - uint8_t chunkSize = 16; /* 4 data burst mode. ie.16 bytes */ - /* - * GDMA utility in Suspend RAM. Setting bit 0 of address to indicate - * it's a thumb branch for cortex-m series CPU. - */ - void (*__start_gdma_in_lpram)(uint32_t) = - (void(*)(uint32_t))(__lpram_lfw_start | 0x01); - - /* - * Before enabling burst mode for better performance of GDMA, it's - * important to make sure srcAddr, dstAddr and size of transactions - * are 16 bytes aligned in case failure occurs. - */ - __ASSERT_NO_MSG((size % chunkSize) == 0 && (srcAddr % chunkSize) == 0 && - (dstAddr % chunkSize) == 0); - - /* Check valid address for jumpiing */ - __ASSERT_NO_MSG(exeAddr != 0x0); - - /* Enable power for the Low Power RAM */ - CLEAR_BIT(NPCX_PWDWN_CTL(NPCX_PMC_BASE_ADDR, NPCX_PWDWN_CTL6), 6); - - /* Enable Low Power RAM */ - NPCX_LPRAM_CTRL = 1; - - /* - * Initialize GDMA for flash reading. - * [31:21] - Reserved. - * [20] - GDMAERR = 0 (Indicate GMDA transfer error) - * [19] - Reserved. - * [18] - TC = 0 (Terminal Count. Indicate operation is end.) - * [17] - Reserved. - * [16] - SOFTREQ = 0 (Don't trigger here) - * [15] - DM = 0 (Set normal demand mode) - * [14] - Reserved. - * [13:12] - TWS. = 10 (One double-word for every GDMA transaction) - * [11:10] - Reserved. - * [9] - BME = 1 (4-data ie.16 bytes - Burst mode enable) - * [8] - SIEN = 0 (Stop interrupt disable) - * [7] - SAFIX = 0 (Fixed source address) - * [6] - Reserved. - * [5] - SADIR = 0 (Source address incremented) - * [4] - DADIR = 0 (Destination address incremented) - * [3:2] - GDMAMS = 00 (Software mode) - * [1] - Reserved. - * [0] - ENABLE = 0 (Don't enable yet) - */ - NPCX_GDMA_CTL = 0x00002200; - - /* Set source base address */ - NPCX_GDMA_SRCB = CONFIG_MAPPED_STORAGE_BASE + srcAddr; - - /* Set destination base address */ - NPCX_GDMA_DSTB = dstAddr; - - /* Set number of transfers */ - NPCX_GDMA_TCNT = (size / chunkSize); - - /* Clear Transfer Complete event */ - SET_BIT(NPCX_GDMA_CTL, NPCX_GDMA_CTL_TC); - - /* Copy the __start_gdma_in_lpram instructions to LPRAM */ - for (i = 0; i < &__flash_lplfw_end - &__flash_lplfw_start; i++) - *((uint32_t *)__lpram_lfw_start + i) = - *(&__flash_lplfw_start + i); - - /* Start GDMA in Suspend RAM */ - __start_gdma_in_lpram(exeAddr); -} diff --git a/zephyr/shim/chip/npcx/system_external_storage.c b/zephyr/shim/chip/npcx/system_external_storage.c deleted file mode 100644 index 373a4a48f7..0000000000 --- a/zephyr/shim/chip/npcx/system_external_storage.c +++ /dev/null @@ -1,157 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <devicetree.h> -#include <drivers/syscon.h> - -#include "clock_chip.h" -#include "common.h" -#include "rom_chip.h" -#include "system.h" -#include "system_chip.h" - -/* TODO (b:179900857) Make this implementation not npcx specific. */ - -static const struct device *mdc_dev = DEVICE_DT_GET(DT_NODELABEL(mdc)); - -#ifdef CONFIG_SOC_SERIES_NPCX7 -#define NPCX_FWCTRL 0x007 -#define NPCX_FWCTRL_RO_REGION 0 -#define NPCX_FWCTRL_FW_SLOT 1 -#elif defined(CONFIG_SOC_SERIES_NPCX9) -#define NPCX_FWCTRL 0x009 -#define NPCX_FWCTRL_RO_REGION 6 -#define NPCX_FWCTRL_FW_SLOT 7 -#else -#error "Unsupported NPCX SoC series." -#endif - -void system_jump_to_booter(void) -{ - enum API_RETURN_STATUS_T status __attribute__((unused)); - static uint32_t flash_offset; - static uint32_t flash_used; - static uint32_t addr_entry; - - /* - * Get memory offset and size for RO/RW regions. - * Both of them need 16-bytes alignment since GDMA burst mode. - */ - switch (system_get_shrspi_image_copy()) { - case EC_IMAGE_RW: - flash_offset = CONFIG_EC_WRITABLE_STORAGE_OFF + - CONFIG_RW_STORAGE_OFF; - flash_used = CONFIG_RW_SIZE; - break; -#ifdef CONFIG_RW_B - case EC_IMAGE_RW_B: - flash_offset = CONFIG_EC_WRITABLE_STORAGE_OFF + - CONFIG_RW_B_STORAGE_OFF; - flash_used = CONFIG_RW_SIZE; - break; -#endif - case EC_IMAGE_RO: - default: /* Jump to RO by default */ - flash_offset = CONFIG_EC_PROTECTED_STORAGE_OFF + - CONFIG_RO_STORAGE_OFF; - flash_used = CONFIG_RO_SIZE; - break; - } - - /* Make sure the reset vector is inside the destination image */ - addr_entry = *(uintptr_t *)(flash_offset + - CONFIG_MAPPED_STORAGE_BASE + 4); - - /* - * Speed up FW download time by increasing clock freq of EC. It will - * restore to default in clock_init() later. - */ - clock_turbo(); - -/* - * npcx9 Rev.1 has the problem for download_from_flash API. - * Workwaroud it by executing the system_download_from_flash function - * in the suspend RAM like npcx5. - * TODO: Removing npcx9 when Rev.2 is available. - */ - /* Bypass for GMDA issue of ROM api utilities */ -#if defined(CONFIG_SOC_SERIES_NPCX5) || \ - defined(CONFIG_PLATFORM_EC_WORKAROUND_FLASH_DOWNLOAD_API) - system_download_from_flash( - flash_offset, /* The offset of the data in spi flash */ - CONFIG_PROGRAM_MEMORY_BASE, /* RAM Addr of downloaded data */ - flash_used, /* Number of bytes to download */ - addr_entry /* jump to this address after download */ - ); -#else - download_from_flash( - flash_offset, /* The offset of the data in spi flash */ - CONFIG_PROGRAM_MEMORY_BASE, /* RAM Addr of downloaded data */ - flash_used, /* Number of bytes to download */ - SIGN_NO_CHECK, /* Need CRC check or not */ - addr_entry, /* jump to this address after download */ - &status /* Status fo download */ - ); -#endif -} - -uint32_t system_get_lfw_address() -{ - /* - * In A3 version, we don't use little FW anymore - * We provide the alternative function in ROM - */ - uint32_t jump_addr = (uint32_t)system_jump_to_booter; - return jump_addr; -} - -enum ec_image system_get_shrspi_image_copy(void) -{ - uint32_t fwctrl = 0; - - syscon_read_reg(mdc_dev, NPCX_FWCTRL, &fwctrl); - if (IS_BIT_SET(fwctrl, NPCX_FWCTRL_RO_REGION)) { - /* RO image */ -#ifdef CHIP_HAS_RO_B - if (!IS_BIT_SET(fwctrl, NPCX_FWCTRL_FW_SLOT)) - return EC_IMAGE_RO_B; -#endif - return EC_IMAGE_RO; - } else { -#ifdef CONFIG_RW_B - /* RW image */ - if (!IS_BIT_SET(fwctrl, NPCX_FWCTRL_FW_SLOT)) - /* Slot A */ - return EC_IMAGE_RW_B; -#endif - return EC_IMAGE_RW; - } -} - -void system_set_image_copy(enum ec_image copy) -{ - uint32_t fwctrl = 0; - - syscon_read_reg(mdc_dev, NPCX_FWCTRL, &fwctrl); - switch (copy) { - case EC_IMAGE_RW: - CLEAR_BIT(fwctrl, NPCX_FWCTRL_RO_REGION); - SET_BIT(fwctrl, NPCX_FWCTRL_FW_SLOT); - break; -#ifdef CONFIG_RW_B - case EC_IMAGE_RW_B: - CLEAR_BIT(fwctrl, NPCX_FWCTRL_RO_REGION); - CLEAR_BIT(fwctrl, NPCX_FWCTRL_FW_SLOT); - break; -#endif - default: - /* Fall through to EC_IMAGE_RO */ - case EC_IMAGE_RO: - SET_BIT(fwctrl, NPCX_FWCTRL_RO_REGION); - SET_BIT(fwctrl, NPCX_FWCTRL_FW_SLOT); - break; - } - syscon_write_reg(mdc_dev, NPCX_FWCTRL, fwctrl); -} diff --git a/zephyr/shim/chip/posix/CMakeLists.txt b/zephyr/shim/chip/posix/CMakeLists.txt deleted file mode 100644 index 70e8b6269a..0000000000 --- a/zephyr/shim/chip/posix/CMakeLists.txt +++ /dev/null @@ -1,5 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_ESPI espi.c)
\ No newline at end of file diff --git a/zephyr/shim/chip/posix/espi.c b/zephyr/shim/chip/posix/espi.c deleted file mode 100644 index cf348744d7..0000000000 --- a/zephyr/shim/chip/posix/espi.c +++ /dev/null @@ -1,49 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <sys/util.h> -#include "zephyr_espi_shim.h" - -#define ACPI_TYPE_POS 0U -#define ACPI_DATA_POS 8U - -/* 8042 event data format */ -#define POSIX_8042_EVT_POS 16U -#define POSIX_8042_DATA_POS 8U -#define POSIX_8042_TYPE_POS 0U - -/* 8042 event type format */ -#define POSIX_8042_EVT_IBF BIT(0) -#define POSIX_8042_EVT_OBE BIT(1) - -bool is_acpi_command(uint32_t data) -{ - return (data >> ACPI_TYPE_POS) & 0x01; -} - -uint32_t get_acpi_value(uint32_t data) -{ - return (data >> ACPI_TYPE_POS) & 0xff; -} - -bool is_POSIX_8042_ibf(uint32_t data) -{ - return (data >> POSIX_8042_EVT_POS) & POSIX_8042_EVT_IBF; -} - -bool is_POSIX_8042_obe(uint32_t data) -{ - return (data >> POSIX_8042_EVT_POS) & POSIX_8042_EVT_OBE; -} - -uint32_t get_POSIX_8042_type(uint32_t data) -{ - return (data >> POSIX_8042_TYPE_POS) & 0xFF; -} - -uint32_t get_POSIX_8042_data(uint32_t data) -{ - return (data >> POSIX_8042_DATA_POS) & 0xFF; -} diff --git a/zephyr/shim/core/CMakeLists.txt b/zephyr/shim/core/CMakeLists.txt deleted file mode 100644 index e1b13f21f4..0000000000 --- a/zephyr/shim/core/CMakeLists.txt +++ /dev/null @@ -1,7 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -if (DEFINED CONFIG_CPU_CORTEX_M) - add_subdirectory(cortex-m) -endif() diff --git a/zephyr/shim/core/cortex-m/CMakeLists.txt b/zephyr/shim/core/cortex-m/CMakeLists.txt deleted file mode 100644 index 01e5673f9e..0000000000 --- a/zephyr/shim/core/cortex-m/CMakeLists.txt +++ /dev/null @@ -1,5 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_MPU mpu.c) diff --git a/zephyr/shim/core/cortex-m/mpu.c b/zephyr/shim/core/cortex-m/mpu.c deleted file mode 100644 index 24d7948143..0000000000 --- a/zephyr/shim/core/cortex-m/mpu.c +++ /dev/null @@ -1,38 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "config.h" -#include "mpu.h" -#include "logging/log.h" -#include <arch/arm/aarch32/cortex_m/cmsis.h> -#include <arch/cpu.h> -#include <init.h> - -LOG_MODULE_REGISTER(shim_mpu, LOG_LEVEL_ERR); - -void mpu_enable(void) -{ - for (int index = 0; index < mpu_config.num_regions; index++) { - MPU->RNR = index; - MPU->RASR |= MPU_RASR_ENABLE_Msk; - LOG_DBG("[%d] %08x %08x", index, MPU->RBAR, MPU->RASR); - } -} - -static int mpu_disable_fixed_regions(const struct device *dev) -{ - /* MPU is configured and enabled by the Zephyr init code, disable the - * fixed sections by default. - */ - for (int index = 0; index < mpu_config.num_regions; index++) { - MPU->RNR = index; - MPU->RASR &= ~MPU_RASR_ENABLE_Msk; - LOG_DBG("[%d] %08x %08x", index, MPU->RBAR, MPU->RASR); - } - - return 0; -} - -SYS_INIT(mpu_disable_fixed_regions, PRE_KERNEL_1, 50); diff --git a/zephyr/shim/include/adc_chip.h b/zephyr/shim/include/adc_chip.h deleted file mode 100644 index c51cdfbb30..0000000000 --- a/zephyr/shim/include/adc_chip.h +++ /dev/null @@ -1,16 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * This file is left intentionally blank. It is required since the - * platform/ec/common/adc.c file includes it. Normally, this file - * would define chip specific ADC configs and would reside under - * platform/ec/chip/... - */ - -#ifndef __CROS_EC_ADC_CHIP_H -#define __CROS_EC_ADC_CHIP_H - -#endif /* __CROS_EC_ADC_CHIP_H */ diff --git a/zephyr/shim/include/atomic.h b/zephyr/shim/include/atomic.h deleted file mode 100644 index ad534d116b..0000000000 --- a/zephyr/shim/include/atomic.h +++ /dev/null @@ -1,16 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_ATOMIC_H -#define __CROS_EC_ATOMIC_H - -#include <sys/atomic.h> - -static inline atomic_val_t atomic_clear_bits(atomic_t *addr, atomic_val_t bits) -{ - return atomic_and(addr, ~bits); -} - -#endif /* __CROS_EC_ATOMIC_H */ diff --git a/zephyr/shim/include/battery_enum.h b/zephyr/shim/include/battery_enum.h deleted file mode 100644 index a461829a31..0000000000 --- a/zephyr/shim/include/battery_enum.h +++ /dev/null @@ -1,36 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_CONFIG_CHIP_H -#error "This file must only be included from config_chip.h and it should be" \ - "included in all zephyr builds automatically" -#endif - -#define BATTERY_ENUM(val) DT_CAT(BATTERY_, val) -#define BATTERY_TYPE(id) BATTERY_ENUM(DT_STRING_UPPER_TOKEN(id, enum_name)) -#define BATTERY_TYPE_WITH_COMMA(id) BATTERY_TYPE(id), - -/* This produces a list of BATTERY_<ENUM_NAME> identifiers */ -#if DT_NODE_EXISTS(DT_PATH(batteries)) - -enum battery_type { - DT_FOREACH_CHILD(DT_PATH(batteries), BATTERY_TYPE_WITH_COMMA) - - BATTERY_TYPE_COUNT, -}; - -#else /* DT_NODE_EXISTS(DT_PATH(batteries)) */ - -enum battery_type { -#if DT_NODE_EXISTS(DT_PATH(named_batteries)) - DT_FOREACH_CHILD(DT_PATH(named_batteries), BATTERY_TYPE_WITH_COMMA) -#endif - - BATTERY_TYPE_COUNT, -}; - -#endif /* DT_NODE_EXISTS(DT_PATH(batteries)) */ - -#undef BATTERY_TYPE_WITH_COMMA diff --git a/zephyr/shim/include/bbram.h b/zephyr/shim/include/bbram.h deleted file mode 100644 index 3eba4b157b..0000000000 --- a/zephyr/shim/include/bbram.h +++ /dev/null @@ -1,16 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef ZEPHYR_SHIM_INCLUDE_BBRAM_H_ -#define ZEPHYR_SHIM_INCLUDE_BBRAM_H_ - -#include <devicetree.h> - -#define BBRAM_SIZE DT_REG_SIZE_BY_NAME(DT_NODELABEL(bbram), memory) -#define BBRAM_ADDR DT_REG_ADDR_BY_NAME(DT_NODELABEL(bbram), memory) -#define BBRAM(offset) REG8(BBRAM_ADDR + offset) -#define BBRAM_BKUP_STS BBRAM(CONFIG_BBRAM_BKUP_STS) - -#endif /* ZEPHYR_SHIM_INCLUDE_BBRAM_H_ */ diff --git a/zephyr/shim/include/board.h b/zephyr/shim/include/board.h deleted file mode 100644 index df3ef33c0e..0000000000 --- a/zephyr/shim/include/board.h +++ /dev/null @@ -1,33 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __BOARD_H -#define __BOARD_H - -#include <devicetree.h> - -/* Included shimed version of gpio signal. */ -#include "gpio_signal.h" - -/* Include board specific gpio mapping/aliases if named_pgios node exists */ -#if DT_NODE_EXISTS(DT_PATH(named_gpios)) -#include "gpio_map.h" -#endif - -/* Include board specific i2c mapping if I2C is enabled. */ -#if defined(CONFIG_I2C) -#include "i2c/i2c.h" -#endif - -#ifdef CONFIG_PWM -#include "pwm_map.h" -#endif - -/* Include board specific sensor configuration if motionsense is enabled */ -#ifdef CONFIG_MOTIONSENSE -#include "motionsense_sensors.h" -#endif - -#endif /* __BOARD_H */ diff --git a/zephyr/shim/include/builtin/assert.h b/zephyr/shim/include/builtin/assert.h deleted file mode 100644 index 21a6c5b3d7..0000000000 --- a/zephyr/shim/include/builtin/assert.h +++ /dev/null @@ -1,16 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_ASSERT_H -#define __CROS_EC_ASSERT_H - -#include <sys/__assert.h> - -#undef ASSERT -#undef assert -#define ASSERT __ASSERT_NO_MSG -#define assert __ASSERT_NO_MSG - -#endif /* __CROS_EC_ASSERT_H */ diff --git a/zephyr/shim/include/config_chip.h b/zephyr/shim/include/config_chip.h deleted file mode 100644 index 04d2ca1d5d..0000000000 --- a/zephyr/shim/include/config_chip.h +++ /dev/null @@ -1,1811 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_CONFIG_CHIP_H -#define __CROS_EC_CONFIG_CHIP_H - -#include <devicetree.h> -#include <autoconf.h> - -/* - * The battery enum is used in various drivers and these assume that it is - * always available (defined in board.h). With Zephyr we don't include board.h - * so we have a battery_enum.h header in the shim which defines - * enum battery_type based on settings in the device tree. Include that here. - */ -#ifdef CONFIG_PLATFORM_EC_BATTERY -#include "battery_enum.h" -#endif - -/* - * This file translates Kconfig options to platform/ec options. - * - * Options which are from Zephyr platform/ec module (Kconfig) start - * with CONFIG_PLATFORM_EC_, and can be found in the Kconfig file. - * - * Options which are for the platform/ec configuration can be found in - * common/config.h. - */ - -/* - * Obsolete configs - these are options that are not needed, either because - * Zephyr features directly replace the option, or because the config option - * will not be used with Zephyr OS. - */ - -/* - * ROM resident support. The ROM resident capabilities in the Chromium OS - * code are used with EC chipsets that provide more flash space than - * executable RAM. These options allow storing the initialized data into - * an unused area of flash where it is copied directly from flash into data - * RAM by the early boot code. - * - * When ROM resident is disabled, the initialized data is stored in the main - * image, copied from flash to executable RAM by the chip boot loader, and - * then copied from executable RAM to data RAM by the early boot code. - * - * Supporting this under Zephyr would require linker changes to the common - * Zephyr linking. - */ -#undef CONFIG_CHIP_DATA_IN_INIT_ROM -#undef CONFIG_CHIP_INIT_ROM_REGION -#undef CONFIG_RO_ROM_RESIDENT_MEM_OFF -#undef CONFIG_RO_ROM_RESIDENT_SIZE -#undef CONFIG_RW_ROM_RESIDENT_MEM_OFF -#undef CONFIG_RW_ROM_RESIDENT_SIZE - -/* - * ECOS specific options, not used in Zephyr. - */ -#undef CONFIG_CONSOLE_UART /* Only used by the Chromium EC chip drivers */ -#undef CONFIG_I2C_MULTI_PORT_CONTROLLER /* Not required by I2C shim */ -#undef CONFIG_IRQ_COUNT /* Only used by Chromium EC core drivers */ -#undef CONFIG_KEYBOARD_KSO_HIGH_DRIVE /* Used by the Chromium EC chip drivers */ -#undef CONFIG_LTO /* Link time optimization enabled by Zephyr build system */ -#undef CONFIG_STACK_SIZE /* Only used in Chromium EC core init code */ -#ifndef CONFIG_FPU -#undef CONFIG_FPU /* Used in Zephyr as well, enabled in Kconfig directly */ -#endif -#ifndef CONFIG_WATCHDOG -#undef CONFIG_WATCHDOG /* Used in Zephyr as well, enabled in Kconfig directly */ -#endif - -/* - * The Zephyr I2C shell command provides the same functionality as the Chromium - * EC i2cscan and i2cxfer commands, so they are always disabled. - */ -#undef CONFIG_CMD_I2C_SCAN -#undef CONFIG_CMD_I2C_XFER - -/* - * This not used by the Zephyr code since we always make cros_crc8() available. - * Define it here to reduce the delta from the ECOS CONFIG. - */ -#undef CONFIG_CRC8 -#define CONFIG_CRC8 - -/* - * This is not used by the Zephyr code. - * Define it here to reduce the delta from the ECOS CONFIG. - */ -#undef CONFIG_CHIP_PRE_INIT -#define CONFIG_CHIP_PRE_INIT - -#undef CONFIG_BC12_SINGLE_DRIVER -#ifdef CONFIG_PLATFORM_EC_BC12_SINGLE_DRIVER -#define CONFIG_BC12_SINGLE_DRIVER -#endif - -#undef CONFIG_CHARGER_SINGLE_CHIP -#define CONFIG_CHARGER_SINGLE_CHIP - -/* EC chipset configuration */ -#define HOOK_TICK_INTERVAL CONFIG_CROS_EC_HOOK_TICK_INTERVAL -#define HOOK_TICK_INTERVAL_MS (HOOK_TICK_INTERVAL / 1000) - -/* Chipset and power configuration */ -#ifdef CONFIG_AP_ARM_QUALCOMM_SC7180 -#define CONFIG_CHIPSET_SC7180 -#endif - -#ifdef CONFIG_AP_ARM_QUALCOMM_SC7280 -#define CONFIG_CHIPSET_SC7280 -#endif - -#ifdef CONFIG_AP_X86_INTEL_CML -#define CONFIG_CHIPSET_COMETLAKE -#define CONFIG_CHIPSET_HAS_PRE_INIT_CALLBACK -#endif - -#ifdef CONFIG_AP_X86_INTEL_TGL -#define CONFIG_CHIPSET_TIGERLAKE -#endif - -#undef CONFIG_THROTTLE_AP -#ifdef CONFIG_PLATFORM_EC_THROTTLE_AP -#define CONFIG_THROTTLE_AP -#endif - -#undef CONFIG_CHIPSET_CAN_THROTTLE -#ifdef CONFIG_PLATFORM_EC_CHIPSET_CAN_THROTTLE -#define CONFIG_CHIPSET_CAN_THROTTLE -#endif - -#undef CONFIG_CMD_APTHROTTLE -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_APTHROTTLE -#define CONFIG_CMD_APTHROTTLE -#endif - -#undef CONFIG_BACKLIGHT_LID -#ifdef CONFIG_PLATFORM_EC_BACKLIGHT_LID -#define CONFIG_BACKLIGHT_LID -#endif - -/* Battery configuration */ -#undef CONFIG_BATTERY -#undef CONFIG_BATTERY_FUEL_GAUGE -#ifdef CONFIG_PLATFORM_EC_BATTERY -#define CONFIG_BATTERY -#define CONFIG_BATTERY_FUEL_GAUGE - -#endif /* CONFIG_PLATFORM_EC_BATTERY_FUEL_GAUGE */ - -#undef CONFIG_BATTERY_SMART -#ifdef CONFIG_PLATFORM_EC_BATTERY_SMART -#define CONFIG_BATTERY_SMART -#endif - -#undef CONFIG_I2C_VIRTUAL_BATTERY -#undef I2C_PORT_VIRTUAL_BATTERY -#ifdef CONFIG_PLATFORM_EC_I2C_VIRTUAL_BATTERY -#define CONFIG_I2C_VIRTUAL_BATTERY -#define I2C_PORT_VIRTUAL_BATTERY I2C_PORT_BATTERY -#endif - -#undef CONFIG_I2C_PASSTHRU_RESTRICTED -#ifdef CONFIG_PLATFORM_EC_I2C_PASSTHRU_RESTRICTED -#define CONFIG_I2C_PASSTHRU_RESTRICTED -#endif - -#undef CONFIG_CMD_I2C_SPEED -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_I2C_SPEED -#define CONFIG_CMD_I2C_SPEED -#endif - -#undef CONFIG_BATTERY_PRESENT_CUSTOM -#ifdef CONFIG_PLATFORM_EC_BATTERY_PRESENT_CUSTOM -#define CONFIG_BATTERY_PRESENT_CUSTOM -#endif - -#undef CONFIG_BATTERY_PRESENT_GPIO -#ifdef CONFIG_PLATFORM_EC_BATTERY_PRESENT_GPIO -/* This is always GPIO_BATT_PRES_ODL with Zephyr */ -#define CONFIG_BATTERY_PRESENT_GPIO GPIO_BATT_PRES_ODL -#endif - -#undef CONFIG_BATTERY_CRITICAL_SHUTDOWN_CUT_OFF -#ifdef CONFIG_PLATFORM_EC_BATTERY_CRITICAL_SHUTDOWN_CUT_OFF -#define CONFIG_BATTERY_CRITICAL_SHUTDOWN_CUT_OFF -#endif - -#undef CONFIG_BATTERY_CHECK_CHARGE_TEMP_LIMITS -#ifdef CONFIG_PLATFORM_EC_BATTERY_CHECK_CHARGE_TEMP_LIMITS -#define CONFIG_BATTERY_CHECK_CHARGE_TEMP_LIMITS -#endif - -#undef CONFIG_BATTERY_CUT_OFF -#ifdef CONFIG_PLATFORM_EC_BATTERY_CUT_OFF -#define CONFIG_BATTERY_CUT_OFF -#endif - -#undef CONFIG_BATTERY_HW_PRESENT_CUSTOM -#ifdef CONFIG_PLATFORM_EC_BATTERY_HW_PRESENT_CUSTOM -#define CONFIG_BATTERY_HW_PRESENT_CUSTOM -#endif - -#undef CONFIG_BATTERY_REVIVE_DISCONNECT -#ifdef CONFIG_PLATFORM_EC_BATTERY_REVIVE_DISCONNECT -#define CONFIG_BATTERY_REVIVE_DISCONNECT -#endif - -#undef CONFIG_BATTERY_MEASURE_IMBALANCE -#ifdef CONFIG_PLATFORM_EC_BATTERY_MEASURE_IMBALANCE - -#define CONFIG_BATTERY_MEASURE_IMBALANCE -#define CONFIG_BATTERY_MAX_IMBALANCE_MV \ - CONFIG_PLATFORM_EC_BATTERY_MAX_IMBALANCE_MV -#define CONFIG_CHARGER_MIN_BAT_PCT_IMBALANCED_POWER_ON \ - CONFIG_PLATFORM_EC_CHARGER_MIN_BAT_PCT_IMBALANCED_POWER_ON - -#endif - -#undef CONFIG_BATT_FULL_CHIPSET_OFF_INPUT_LIMIT_MV -#if defined(CONFIG_PLATFORM_EC_BATT_FULL_CHIPSET_OFF_INPUT_LIMIT_MV) && \ - (CONFIG_PLATFORM_EC_BATT_FULL_CHIPSET_OFF_INPUT_LIMIT_MV > 0) -#define CONFIG_BATT_FULL_CHIPSET_OFF_INPUT_LIMIT_MV \ - CONFIG_PLATFORM_EC_BATT_FULL_CHIPSET_OFF_INPUT_LIMIT_MV -#endif - -#undef CONFIG_BOARD_RESET_AFTER_POWER_ON -#ifdef CONFIG_PLATFORM_EC_BOARD_RESET_AFTER_POWER_ON -#define CONFIG_BOARD_RESET_AFTER_POWER_ON -#endif - -#undef CONFIG_CHARGER_ISL9241 -#ifdef CONFIG_PLATFORM_EC_CHARGER_ISL9241 -#define CONFIG_CHARGER_ISL9241 -#endif - -/* - * Note - ISL9241 chargers for all channels are configured with the same - * switching frequency. Use the first ISL9241 instance found in the device tree. - */ -#undef CONFIG_ISL9241_SWITCHING_FREQ -#define ISL9241_NODE DT_INST(0, intersil_isl9241) -#if DT_NODE_EXISTS(ISL9241_NODE) && \ - DT_NODE_HAS_PROP(ISL9241_NODE, switching_frequency) -#define CONFIG_ISL9241_SWITCHING_FREQ \ - DT_PROP(ISL9241_NODE, switching_frequency) -#endif - -#undef CONFIG_CHARGER_ISL9237 -#ifdef CONFIG_PLATFORM_EC_CHARGER_ISL9237 -#define CONFIG_CHARGER_ISL9237 -#endif - -#undef CONFIG_CHARGER_ISL9238 -#ifdef CONFIG_PLATFORM_EC_CHARGER_ISL9238 -#define CONFIG_CHARGER_ISL9238 -#endif - -#undef CONFIG_CHARGER_ISL9238C -#ifdef CONFIG_PLATFORM_EC_CHARGER_ISL9238C -#define CONFIG_CHARGER_ISL9238C -#endif - -#undef CONFIG_CHARGER_MAINTAIN_VBAT -#ifdef CONFIG_PLATFORM_EC_CHARGER_MAINTAIN_VBAT -#define CONFIG_CHARGER_MAINTAIN_VBAT -#endif - -#undef CONFIG_CHARGER_NARROW_VDC -#ifdef CONFIG_PLATFORM_EC_CHARGER_NARROW_VDC -#define CONFIG_CHARGER_NARROW_VDC -#endif - -#undef CONFIG_CHARGER_OTG -#ifdef CONFIG_PLATFORM_EC_CHARGER_OTG -#define CONFIG_CHARGER_OTG -#endif - -#undef CONFIG_CHIPSET_RESET_HOOK -#ifdef CONFIG_PLATFORM_EC_CHIPSET_RESET_HOOK -#define CONFIG_CHIPSET_RESET_HOOK -#endif - -#undef CONFIG_CHIPSET_RESUME_INIT_HOOK -#ifdef CONFIG_PLATFORM_EC_CHIPSET_RESUME_INIT_HOOK -#define CONFIG_CHIPSET_RESUME_INIT_HOOK -#endif - -#ifdef CONFIG_PLATFORM_EC_EXTPOWER_GPIO -#define CONFIG_EXTPOWER_GPIO - -/* This always needs to be defined for this option to work */ -#define CONFIG_EXTPOWER -#endif - -/* Bringup configuration */ -#ifdef CONFIG_PLATFORM_EC_BRINGUP -#define CONFIG_BRINGUP -#endif - -#undef CONFIG_EMULATED_SYSRQ -#ifdef CONFIG_PLATFORM_EC_EMULATED_SYSRQ -#define CONFIG_EMULATED_SYSRQ -#endif - -/* eSPI configuration */ -#ifdef CONFIG_PLATFORM_EC_ESPI - -#ifdef CONFIG_PLATFORM_EC_HOSTCMD -#define CONFIG_HOSTCMD_ESPI -#endif - -/* eSPI signals */ -#ifdef CONFIG_PLATFORM_EC_ESPI_VW_SLP_S3 -#define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 -#endif - -#ifdef CONFIG_PLATFORM_EC_ESPI_VW_SLP_S4 -#define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 -#endif - -#ifdef CONFIG_PLATFORM_EC_ESPI_RESET_SLP_SX_VW_ON_ESPI_RST -#define CONFIG_HOSTCMD_ESPI_RESET_SLP_SX_VW_ON_ESPI_RST -#endif - -#endif /* CONFIG_PLATFORM_EC_ESPI */ - -#if DT_NODE_EXISTS(DT_NODELABEL(flash0)) -#define CONFIG_PROGRAM_MEMORY_BASE DT_REG_ADDR(DT_NODELABEL(flash0)) -#else -#define CONFIG_PROGRAM_MEMORY_BASE 0X0 -#endif - -#if DT_NODE_EXISTS(DT_NODELABEL(sram0)) -#define CONFIG_RAM_BASE DT_REG_ADDR(DT_NODELABEL(sram0)) -#define CONFIG_DATA_RAM_SIZE DT_REG_SIZE(DT_NODELABEL(sram0)) -#else -#define CONFIG_RAM_BASE 0x0 -#define CONFIG_DATA_RAM_SIZE 0x0 -#endif - -#define CONFIG_RO_MEM_OFF CONFIG_CROS_EC_RO_MEM_OFF -#define CONFIG_RO_MEM_SIZE CONFIG_CROS_EC_RO_MEM_SIZE -#define CONFIG_RW_MEM_OFF CONFIG_CROS_EC_RW_MEM_OFF -#define CONFIG_RW_MEM_SIZE CONFIG_CROS_EC_RW_MEM_SIZE - -#define CONFIG_WP_STORAGE_OFF CONFIG_EC_PROTECTED_STORAGE_OFF -#define CONFIG_WP_STORAGE_SIZE CONFIG_EC_PROTECTED_STORAGE_SIZE -#define CONFIG_RO_SIZE CONFIG_CROS_EC_RO_SIZE -#define CONFIG_RW_SIZE CONFIG_CROS_EC_RW_SIZE - -/* Flash settings */ -#undef CONFIG_EXTERNAL_STORAGE -#undef CONFIG_INTERNAL_STORAGE -#undef CONFIG_MAPPED_STORAGE -#undef CONFIG_FLASH_PSTATE -#undef CONFIG_FLASH_SIZE_BYTES -#ifdef CONFIG_PLATFORM_EC_FLASH_CROS -#include "flash_chip.h" -#define CONFIG_FLASH_CROS - -/* Internal, don't use outside this header */ -#define _BINMAN_RO_PATH DT_PATH(binman, wp_ro) -#define _BINMAN_RW_PATH DT_PATH(binman, ec_rw) - -#define CONFIG_EC_PROTECTED_STORAGE_OFF DT_PROP(_BINMAN_RO_PATH, offset) -#define CONFIG_EC_PROTECTED_STORAGE_SIZE DT_PROP(_BINMAN_RO_PATH, size) -#define CONFIG_EC_WRITABLE_STORAGE_OFF DT_PROP(_BINMAN_RW_PATH, offset) -#define CONFIG_EC_WRITABLE_STORAGE_SIZE DT_PROP(_BINMAN_RW_PATH, size) - -#define CONFIG_RAM_SIZE CONFIG_DATA_RAM_SIZE - -#ifdef CONFIG_PLATFORM_EC_EXTERNAL_STORAGE -#define CONFIG_EXTERNAL_STORAGE -#endif - -#ifdef CONFIG_PLATFORM_EC_INTERNAL_STORAGE -#define CONFIG_INTERNAL_STORAGE -#endif - -#ifdef CONFIG_PLATFORM_EC_MAPPED_STORAGE -#define CONFIG_MAPPED_STORAGE -#endif - -#ifdef CONFIG_PLATFORM_EC_FLASH_PSTATE -#define CONFIG_FLASH_PSTATE -#endif - -#undef CONFIG_CMD_FLASH -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_FLASH -#define CONFIG_CMD_FLASH -#endif - -#undef CONFIG_CMD_FLASHINFO -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_FLASHINFO -#define CONFIG_CMD_FLASHINFO -#endif - -#undef CONFIG_CMD_FLASH_WP -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_FLASH_WP -#define CONFIG_CMD_FLASH_WP -#endif - -#endif /* CONFIG_PLATFORM_EC_FLASH_CROS */ - -#undef CONFIG_ADC -#ifdef CONFIG_PLATFORM_EC_ADC -#define CONFIG_ADC -#endif - -#undef CONFIG_ADC_CHANNELS_RUNTIME_CONFIG -#ifdef CONFIG_PLATFORM_EC_ADC_CHANNELS_RUNTIME_CONFIG -#define CONFIG_ADC_CHANNELS_RUNTIME_CONFIG -#endif - -#undef CONFIG_CMD_ADC -#ifdef CONFIG_PLATFORM_EC_ADC_CMD -#define CONFIG_CMD_ADC -#endif - -#undef CONFIG_TEMP_SENSOR -#ifdef CONFIG_PLATFORM_EC_TEMP_SENSOR -#define CONFIG_TEMP_SENSOR -#endif - -#undef CONFIG_THERMISTOR -#ifdef CONFIG_PLATFORM_EC_THERMISTOR -#define CONFIG_THERMISTOR -#endif - -#ifdef CONFIG_PLATFORM_EC_I2C -/* Also see shim/include/i2c/i2c.h which defines the ports enum */ -#define CONFIG_I2C_CONTROLLER -#endif - -#undef CONFIG_I2C_DEBUG -#ifdef CONFIG_PLATFORM_EC_I2C_DEBUG -#define CONFIG_I2C_DEBUG -#endif - -#undef CONFIG_I2C_DEBUG_PASSTHRU -#ifdef CONFIG_PLATFORM_EC_I2C_DEBUG_PASSTHRU -#define CONFIG_I2C_DEBUG_PASSTHRU -#endif - -#undef CONFIG_SMBUS_PEC -#ifdef CONFIG_PLATFORM_EC_SMBUS_PEC -#define CONFIG_SMBUS_PEC -#endif - -#undef CONFIG_KEYBOARD_PROTOCOL_8042 -#ifdef CONFIG_PLATFORM_EC_KEYBOARD_PROTOCOL_8042 -#define CONFIG_KEYBOARD_PROTOCOL_8042 -#endif /* CONFIG_PLATFORM_EC_KEYBOARD_PROTOCOL_8042 */ - -#undef CONFIG_KEYBOARD_PROTOCOL_MKBP -#ifdef CONFIG_PLATFORM_EC_KEYBOARD_PROTOCOL_MKBP -#define CONFIG_KEYBOARD_PROTOCOL_MKBP -#endif - -#undef CONFIG_MKBP_INPUT_DEVICES -#ifdef CONFIG_PLATFORM_EC_MKBP_INPUT_DEVICES -#define CONFIG_MKBP_INPUT_DEVICES -#endif - -#undef CONFIG_MKBP_EVENT_WAKEUP_MASK -#if defined(CONFIG_PLATFORM_EC_MKBP_EVENT_WAKEUP_MASK) && \ - DT_NODE_EXISTS(DT_PATH(ec_mkbp_event_wakeup_mask)) -#define CONFIG_MKBP_EVENT_WAKEUP_MASK \ - DT_PROP(DT_PATH(ec_mkbp_event_wakeup_mask), wakeup_mask) -#endif - -#undef CONFIG_MKBP_HOST_EVENT_WAKEUP_MASK -#if defined(CONFIG_PLATFORM_EC_MKBP_HOST_EVENT_WAKEUP_MASK) && \ - DT_NODE_EXISTS(DT_PATH(ec_mkbp_host_event_wakeup_mask)) -#define CONFIG_MKBP_HOST_EVENT_WAKEUP_MASK \ - DT_PROP(DT_PATH(ec_mkbp_host_event_wakeup_mask), wakeup_mask) -#endif - -#undef CONFIG_CMD_KEYBOARD -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_KEYBOARD -#define CONFIG_CMD_KEYBOARD -#endif - -#undef CONFIG_KEYBOARD_COL2_INVERTED -#ifdef CONFIG_PLATFORM_EC_KEYBOARD_COL2_INVERTED -#define CONFIG_KEYBOARD_COL2_INVERTED -#endif /* CONFIG_PLATFORM_EC_KEYBOARD_COL2_INVERTED */ - -#undef CONFIG_KEYBOARD_REFRESH_ROW3 -#ifdef CONFIG_PLATFORM_EC_KEYBOARD_REFRESH_ROW3 -#define CONFIG_KEYBOARD_REFRESH_ROW3 -#endif /* CONFIG_PLATFORM_EC_KEYBOARD_REFRESH_ROW3 */ - -#undef CONFIG_KEYBOARD_KEYPAD -#ifdef CONFIG_PLATFORM_EC_KEYBOARD_KEYPAD -#define CONFIG_KEYBOARD_KEYPAD -#endif - -#undef CONFIG_KEYBOARD_VIVALDI -#ifdef CONFIG_PLATFORM_EC_KEYBOARD_VIVALDI -#define CONFIG_KEYBOARD_VIVALDI -#endif - -#undef CONFIG_KEYBOARD_PWRBTN_ASSERTS_KSI2 -#ifdef CONFIG_PLATFORM_EC_KEYBOARD_PWRBTN_ASSERTS_KSI2 -#define CONFIG_KEYBOARD_PWRBTN_ASSERTS_KSI2 -#endif - -#undef CONFIG_KEYBOARD_PWRBTN_ASSERTS_KSI3 -#ifdef CONFIG_PLATFORM_EC_KEYBOARD_PWRBTN_ASSERTS_KSI3 -#define CONFIG_KEYBOARD_PWRBTN_ASSERTS_KSI3 -#endif - -#undef CONFIG_VOLUME_BUTTONS -#ifdef CONFIG_PLATFORM_EC_VOLUME_BUTTONS -#define CONFIG_VOLUME_BUTTONS -#endif - -#undef CONFIG_CMD_BUTTON -#ifdef CONFIG_PLATFORM_EC_CMD_BUTTON -#define CONFIG_CMD_BUTTON -#endif - -#undef CONFIG_PWM_KBLIGHT -#undef CONFIG_KEYBOARD_BACKLIGHT -#ifdef CONFIG_PLATFORM_EC_PWM_KBLIGHT -#define CONFIG_PWM_KBLIGHT -#define CONFIG_KEYBOARD_BACKLIGHT -#endif - -#undef CONFIG_LED_COMMON -#ifdef CONFIG_PLATFORM_EC_LED_COMMON -#define CONFIG_LED_COMMON -#endif - -#undef CONFIG_LED_PWM -#ifdef CONFIG_PLATFORM_EC_LED_PWM -#define CONFIG_LED_PWM -#endif - -#undef CONFIG_LED_PWM_COUNT -#if DT_HAS_COMPAT_STATUS_OKAY(cros_ec_pwm_leds) -#define CONFIG_LED_PWM_COUNT DT_PROP_LEN(DT_INST(0, cros_ec_pwm_leds), leds) -#endif - -#undef CONFIG_CMD_LEDTEST -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_LEDTEST -#define CONFIG_CMD_LEDTEST -#endif - -#undef CONFIG_PWM_DISPLIGHT -#ifdef CONFIG_PLATFORM_EC_PWM_DISPLIGHT -#define CONFIG_PWM_DISPLIGHT -#endif - -#undef CONFIG_CPU_PROCHOT_ACTIVE_LOW -#ifdef CONFIG_PLATFORM_EC_POWERSEQ_CPU_PROCHOT_ACTIVE_LOW -#define CONFIG_CPU_PROCHOT_ACTIVE_LOW -#endif - -#undef CONFIG_POWER_TRACK_HOST_SLEEP_STATE -#ifdef CONFIG_PLATFORM_EC_POWERSEQ_HOST_SLEEP -#define CONFIG_POWER_TRACK_HOST_SLEEP_STATE -#endif - -#undef CONFIG_POWER_SLEEP_FAILURE_DETECTION -#ifdef CONFIG_PLATFORM_EC_POWER_SLEEP_FAILURE_DETECTION -#define CONFIG_POWER_SLEEP_FAILURE_DETECTION -#endif - -#undef CONFIG_HOSTCMD_AP_RESET -#ifdef CONFIG_PLATFORM_EC_HOSTCMD_AP_RESET -#define CONFIG_HOSTCMD_AP_RESET -#endif - -#ifdef CONFIG_PLATFORM_EC_POWERSEQ_RSMRST_DELAY -#define CONFIG_CHIPSET_X86_RSMRST_DELAY -#endif - -#ifdef CONFIG_PLATFORM_EC_POWERSEQ_SLP_S3_L_OVERRIDE -#define CONFIG_CHIPSET_SLP_S3_L_OVERRIDE -#endif - -#ifdef CONFIG_PLATFORM_EC_POWERSEQ_PP3300_RAIL_FIRST -#define CONFIG_CHIPSET_PP3300_RAIL_FIRST -#endif - -#ifdef CONFIG_PLATFORM_EC_POWERSEQ_RTC_RESET -#define CONFIG_BOARD_HAS_RTC_RESET -#endif - -#ifdef CONFIG_PLATFORM_EC_POWERSEQ_PP5000_CONTROL -#define CONFIG_POWER_PP5000_CONTROL -#endif - -#undef CONFIG_POWER_S0IX -#ifdef CONFIG_PLATFORM_EC_POWERSEQ_S0IX -#define CONFIG_POWER_S0IX -#endif - -#undef CONFIG_POWER_BUTTON_X86 -#ifdef CONFIG_PLATFORM_EC_POWERSEQ_INTEL -#define CONFIG_POWER_BUTTON_X86 -#endif - -#undef CONFIG_FAKE_SHMEM -#ifdef CONFIG_ARCH_POSIX -#define CONFIG_FAKE_SHMEM -#endif - -#undef CONFIG_PWM -#ifdef CONFIG_PLATFORM_EC_PWM -#define CONFIG_PWM -#endif - -#undef CONFIG_CMD_S5_TIMEOUT -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_S5_TIMEOUT -#define CONFIG_CMD_S5_TIMEOUT -#endif - -#undef CONFIG_CMD_SHMEM -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_SHMEM -#define CONFIG_CMD_SHMEM -#endif - -#undef CONFIG_CROS_FWID_VERSION -#ifdef CONFIG_PLATFORM_EC_CROS_FWID_VERSION -#define CONFIG_CROS_FWID_VERSION -#endif - -#ifdef CONFIG_PLATFORM_EC_TIMER -#define CONFIG_HWTIMER_64BIT -#define CONFIG_HW_SPECIFIC_UDELAY - -#undef CONFIG_CMD_GETTIME -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_GETTIME -#define CONFIG_CMD_GETTIME -#endif /* CONFIG_PLATFORM_EC_CONSOLE_CMD_GETTIME */ - -#undef CONFIG_CMD_TIMERINFO -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_TIMERINFO -#define CONFIG_CMD_TIMERINFO -#endif /* CONFIG_PLATFORM_EC_CONSOLE_CMD_TIMERINFO */ - -#undef CONFIG_CMD_WAITMS -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_WAITMS -#define CONFIG_CMD_WAITMS -#endif /* CONFIG_PLATFORM_EC_CONSOLE_CMD_TIMERINFO */ - -#endif /* CONFIG_PLATFORM_EC_TIMER */ - -/* USB-C things */ -#ifdef CONFIG_PLATFORM_EC_USBC - -/* Zephyr only supports v2 so we always define this */ -#define CONFIG_USB_PD_TCPMV2 - -/* - * Define these here for now. They are not actually CONFIG options in the EC - * code base. Ideally they would be defined in the devicetree (perhaps for a - * 'board' driver if not in the USB chip driver itself). - * - * SN5S30 PPC supports up to 24V VBUS source and sink, however passive USB-C - * cables only support up to 60W. - */ -#define PD_OPERATING_POWER_MW 15000 -#define PD_MAX_POWER_MW 60000 -#define PD_MAX_CURRENT_MA 3000 -#define PD_MAX_VOLTAGE_MV 20000 - -/* TODO: b/144165680 - measure and check these values on Volteer */ -#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ -#define PD_POWER_SUPPLY_TURN_OFF_DELAY 30000 /* us */ -#endif - -#undef CONFIG_CMD_PPC_DUMP -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_PPC_DUMP -#define CONFIG_CMD_PPC_DUMP -#endif - -#undef CONFIG_CMD_TCPC_DUMP -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_TCPC_DUMP -#define CONFIG_CMD_TCPC_DUMP -#endif - -#undef CONFIG_USB_POWER_DELIVERY -#ifdef CONFIG_PLATFORM_EC_USB_POWER_DELIVERY -#define CONFIG_USB_POWER_DELIVERY -#endif - -#undef CONFIG_CHARGER -#undef CONFIG_CHARGE_MANAGER -#ifdef CONFIG_PLATFORM_EC_CHARGE_MANAGER -#define CONFIG_CHARGE_MANAGER -#define CONFIG_CHARGER - -/* TODO: Put these charger defines in the devicetree? */ -#define CONFIG_CHARGER_SENSE_RESISTOR 10 -#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 - -#endif - -#undef CONFIG_CHARGER_INPUT_CURRENT -#ifdef CONFIG_PLATFORM_EC_CHARGER_INPUT_CURRENT -#define CONFIG_CHARGER_INPUT_CURRENT CONFIG_PLATFORM_EC_CHARGER_INPUT_CURRENT -#endif - -#undef CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON -#ifdef CONFIG_PLATFORM_EC_CHARGER_MIN_BAT_PCT_FOR_POWER_ON -#define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON \ - CONFIG_PLATFORM_EC_CHARGER_MIN_BAT_PCT_FOR_POWER_ON -#endif - -#undef CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON_WITH_AC -#ifdef CONFIG_PLATFORM_EC_CHARGER_MIN_BAT_PCT_FOR_POWER_ON_WITH_AC -#define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON_WITH_AC \ - CONFIG_PLATFORM_EC_CHARGER_MIN_BAT_PCT_FOR_POWER_ON_WITH_AC -#endif - -#undef CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON_WITH_BATT -#ifdef CONFIG_PLATFORM_EC_CHARGER_MIN_POWER_MW_FOR_POWER_ON_WITH_BATT -#define CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON_WITH_BATT \ - CONFIG_PLATFORM_EC_CHARGER_MIN_POWER_MW_FOR_POWER_ON_WITH_BATT -#endif - -#undef CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON -#ifdef CONFIG_PLATFORM_EC_CHARGER_MIN_POWER_MW_FOR_POWER_ON -#define CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON \ - CONFIG_PLATFORM_EC_CHARGER_MIN_POWER_MW_FOR_POWER_ON -#endif - -#undef CONFIG_CHARGE_RAMP_SW -#ifdef CONFIG_PLATFORM_EC_CHARGE_RAMP_SW -#define CONFIG_CHARGE_RAMP_SW -#endif - -#undef CONFIG_CHARGE_RAMP_HW -#ifdef CONFIG_PLATFORM_EC_CHARGE_RAMP_HW -#define CONFIG_CHARGE_RAMP_HW -#endif - -#undef CONFIG_CMD_CHGRAMP -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_CHGRAMP -#define CONFIG_CMD_CHGRAMP -#endif - -#undef CONFIG_USB_PID -#ifdef CONFIG_PLATFORM_EC_USB_PID -#define CONFIG_USB_PID CONFIG_PLATFORM_EC_USB_PID -#endif - -#undef CONFIG_USB_BCD_DEV -#ifdef CONFIG_PLATFORM_EC_USB_BCD_DEV -#define CONFIG_USB_BCD_DEV CONFIG_PLATFORM_EC_USB_BCD_DEV -#endif - -#undef CONFIG_USB_VID -#ifdef CONFIG_PLATFORM_EC_USB_VID -#define CONFIG_USB_VID CONFIG_PLATFORM_EC_USB_VID -#endif - -/* VBUS-voltage measurement */ -#undef CONFIG_USB_PD_VBUS_MEASURE_NOT_PRESENT -#undef CONFIG_USB_PD_VBUS_MEASURE_CHARGER -#undef CONFIG_USB_PD_VBUS_MEASURE_TCPC -#undef CONFIG_USB_PD_VBUS_MEASURE_ADC_EACH_PORT -#undef CONFIG_USB_PD_VBUS_MEASURE_BY_BOARD -#ifdef CONFIG_PLATFORM_EC_USB_PD_VBUS_MEASURE_NOT_PRESENT -#define CONFIG_USB_PD_VBUS_MEASURE_NOT_PRESENT -#elif defined(CONFIG_PLATFORM_EC_USB_PD_VBUS_MEASURE_CHARGER) -#define CONFIG_USB_PD_VBUS_MEASURE_CHARGER -#elif defined(CONFIG_PLATFORM_EC_USB_PD_VBUS_MEASURE_TCPC) -#define CONFIG_USB_PD_VBUS_MEASURE_TCPC -#elif defined(CONFIG_PLATFORM_EC_USB_PD_VBUS_MEASURE_ADC_EACH_PORT) -#define CONFIG_USB_PD_VBUS_MEASURE_ADC_EACH_PORT -#elif defined(CONFIG_PLATFORM_EC_USB_PD_VBUS_MEASURE_BY_BOARD) -#define CONFIG_USB_PD_VBUS_MEASURE_BY_BOARD -#endif /* VBUS-voltage measurement */ - -#undef CONFIG_USB_CHARGER -#ifdef CONFIG_PLATFORM_EC_USB_CHARGER -#define CONFIG_USB_CHARGER -#endif - -#define USB_PORT_COUNT CONFIG_PLATFORM_EC_USB_A_PORT_COUNT - -#undef CONFIG_USB_PORT_POWER_DUMB -#ifdef CONFIG_PLATFORM_EC_USB_PORT_POWER_DUMB -#define CONFIG_USB_PORT_POWER_DUMB -#endif - -#undef CONFIG_USB_PORT_POWER_DUMB_CUSTOM_HOOK -#ifdef CONFIG_PLATFORM_EC_USB_PORT_POWER_DUMB_CUSTOM_HOOK -#define CONFIG_USB_PORT_POWER_DUMB_CUSTOM_HOOK -#endif - -#undef CONFIG_BC12_DETECT_PI3USB9201 -#ifdef CONFIG_PLATFORM_EC_BC12_DETECT_PI3USB9201 -#define CONFIG_BC12_DETECT_PI3USB9201 -#endif - -#undef CONFIG_BC12_DETECT_MT6360 -#ifdef CONFIG_PLATFORM_EC_BC12_DETECT_MT6360 -#define CONFIG_BC12_DETECT_MT6360 -#endif - -#undef CONFIG_MT6360_BC12_GPIO -#ifdef CONFIG_PLATFORM_EC_MT6360_BC12_GPIO -#define CONFIG_MT6360_BC12_GPIO -#endif - -#undef CONFIG_HOSTCMD_REGULATOR -#ifdef CONFIG_PLATFORM_EC_HOSTCMD_REGULATOR -#define CONFIG_HOSTCMD_REGULATOR -#endif - -#undef CONFIG_USB_PD_DUAL_ROLE -#ifdef CONFIG_PLATFORM_EC_USB_PD_DUAL_ROLE -#define CONFIG_USB_PD_DUAL_ROLE -#endif - -#undef CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE -#ifdef CONFIG_PLATFORM_EC_USB_PD_DUAL_ROLE_AUTO_TOGGLE -#define CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE -#endif - -#undef CONFIG_USB_PD_DISCHARGE_PPC -#ifdef CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_PPC -#define CONFIG_USB_PD_DISCHARGE_PPC -#endif - -#undef CONFIG_USB_PD_LOGGING -#ifdef CONFIG_PLATFORM_EC_USB_PD_LOGGING -#define CONFIG_USB_PD_LOGGING -#endif - -#undef CONFIG_USBC_OCP -#ifdef CONFIG_PLATFORM_EC_USBC_OCP -#define CONFIG_USBC_OCP -#endif - -#undef CONFIG_USB_PD_CONSOLE_CMD -#ifdef CONFIG_PLATFORM_EC_USB_PD_CONSOLE_CMD -#define CONFIG_USB_PD_CONSOLE_CMD -#endif - -#undef CONFIG_USB_PD_HOST_CMD -#ifdef CONFIG_PLATFORM_EC_USB_PD_HOST_CMD -#define CONFIG_USB_PD_HOST_CMD -#endif - -#undef CONFIG_USB_PD_REV30 -#ifdef CONFIG_PLATFORM_EC_USB_PD_REV30 -#define CONFIG_USB_PD_REV30 - -/* - * Support USB PD 3.0 Extended Messages. Note that Chromebooks disabling this - * config item are non-compliant with PD 3.0, because they have batteries but do - * not support Get_Battery_Cap or Get_Battery_Status. - */ -#define CONFIG_USB_PD_EXTENDED_MESSAGES -#endif - -#undef CONFIG_USB_PD_VBUS_DETECT_TCPC -#undef CONFIG_USB_PD_VBUS_DETECT_CHARGER -#undef CONFIG_USB_PD_VBUS_DETECT_GPIO -#undef CONFIG_USB_PD_VBUS_DETECT_PPC -#undef CONFIG_USB_PD_VBUS_DETECT_NONE -#ifdef CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_TCPC -#define CONFIG_USB_PD_VBUS_DETECT_TCPC -#endif -#ifdef CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_CHARGER -#define CONFIG_USB_PD_VBUS_DETECT_CHARGER -#endif -#ifdef CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_PPC -#define CONFIG_USB_PD_VBUS_DETECT_PPC -#endif -#ifdef CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_NONE -#define CONFIG_USB_PD_VBUS_DETECT_NONE -#endif - -#undef CONFIG_USB_PD_5V_EN_CUSTOM -#ifdef CONFIG_PLATFORM_EC_USB_PD_5V_EN_CUSTOM -#define CONFIG_USB_PD_5V_EN_CUSTOM -#endif - -#undef CONFIG_USB_TYPEC_SM -#ifdef CONFIG_PLATFORM_EC_USB_TYPEC_SM -#define CONFIG_USB_TYPEC_SM -#endif - -#undef CONFIG_USB_PRL_SM -#ifdef CONFIG_PLATFORM_EC_USB_PRL_SM -#define CONFIG_USB_PRL_SM -#endif - -#undef CONFIG_USB_PE_SM -#ifdef CONFIG_PLATFORM_EC_USB_PE_SM -#define CONFIG_USB_PE_SM -#endif - -#undef CONFIG_USB_PD_DECODE_SOP -#ifdef CONFIG_PLATFORM_EC_USB_PD_DECODE_SOP -#define CONFIG_USB_PD_DECODE_SOP -#endif - -#undef CONFIG_USB_VPD -#ifdef CONFIG_PLATFORM_EC_USB_VPD -#define CONFIG_USB_VPD -#endif - -#undef CONFIG_USB_CTVPD -#ifdef CONFIG_PLATFORM_EC_USB_CTVPD -#define CONFIG_USB_CTVPD -#endif - -#undef CONFIG_USB_DRP_ACC_TRYSRC -#ifdef CONFIG_PLATFORM_EC_USB_DRP_ACC_TRYSRC -#define CONFIG_USB_DRP_ACC_TRYSRC -#endif - -#undef CONFIG_USB_PD_TCPM_PS8751 -#ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8751 -#define CONFIG_USB_PD_TCPM_PS8751 -#endif - -#undef CONFIG_USB_PD_TCPM_PS8805 -#ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8805 -#define CONFIG_USB_PD_TCPM_PS8805 -#endif - -#undef CONFIG_USB_PD_TCPM_PS8805_FORCE_DID -#ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8805_FORCE_DID -#define CONFIG_USB_PD_TCPM_PS8805_FORCE_DID -#endif - -#undef CONFIG_USB_PD_TCPM_PS8815 -#ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8815 -#define CONFIG_USB_PD_TCPM_PS8815 -#endif - -#undef CONFIG_USB_PD_TCPM_PS8815_FORCE_DID -#ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8815_FORCE_DID -#define CONFIG_USB_PD_TCPM_PS8815_FORCE_DID -#endif - -#undef CONFIG_USB_PD_TCPM_MULTI_PS8XXX -#ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_MULTI_PS8XXX -#define CONFIG_USB_PD_TCPM_MULTI_PS8XXX -#endif - -#undef CONFIG_USB_PD_TCPM_RT1715 -#ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_RT1715 -#define CONFIG_USB_PD_TCPM_RT1715 -#endif - -#undef CONFIG_USB_PD_TCPM_TUSB422 -#ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_TUSB422 -#define CONFIG_USB_PD_TCPM_TUSB422 -#endif - -#undef CONFIG_USB_PD_TCPM_TCPCI -#ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_TCPCI -#define CONFIG_USB_PD_TCPM_TCPCI -#endif - -#undef CONFIG_USB_PD_TCPM_ITE_ON_CHIP -#ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_ITE_ON_CHIP -#define CONFIG_USB_PD_TCPM_ITE_ON_CHIP - -/* TODO(b:189855648): hard-code a few things here; move to zephyr? */ -#define IT83XX_USBPD_PHY_PORT_COUNT 2 -#endif - -#undef CONFIG_USB_PD_TCPM_DRIVER_IT8XXX2 -#ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_DRIVER_IT8XXX2 -#define CONFIG_USB_PD_TCPM_DRIVER_IT8XXX2 -#endif - -#undef CONFIG_USB_PD_TCPM_DRIVER_IT83XX -#ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_DRIVER_IT83XX -#define CONFIG_USB_PD_TCPM_DRIVER_IT83XX -#endif - -#undef CONFIG_USB_PD_PORT_MAX_COUNT -#ifdef CONFIG_PLATFORM_EC_USB_PD_PORT_MAX_COUNT -#define CONFIG_USB_PD_PORT_MAX_COUNT CONFIG_PLATFORM_EC_USB_PD_PORT_MAX_COUNT -#endif - -#undef CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT -#ifdef CONFIG_PLATFORM_EC_USB_PD_ITE_ACTIVE_PORT_COUNT -#define CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT \ - CONFIG_PLATFORM_EC_USB_PD_ITE_ACTIVE_PORT_COUNT -#endif - -#undef CONFIG_USBC_PPC -#ifdef CONFIG_PLATFORM_EC_USBC_PPC -#define CONFIG_USBC_PPC -#endif - -#undef CONFIG_USBC_PPC_SN5S330 -#ifdef CONFIG_PLATFORM_EC_USBC_PPC_SN5S330 -#define CONFIG_USBC_PPC_SN5S330 -#endif - -#undef CONFIG_USBC_PPC_SYV682X -#ifdef CONFIG_PLATFORM_EC_USBC_PPC_SYV682X -#define CONFIG_USBC_PPC_SYV682X -#endif - -#undef CONFIG_USBC_PPC_SYV682C -#ifdef CONFIG_PLATFORM_EC_USBC_PPC_SYV682C -#define CONFIG_USBC_PPC_SYV682C -#endif - -#undef CONFIG_USBC_PPC_SYV682X_NO_CC -#ifdef CONFIG_PLATFORM_EC_USBC_PPC_SYV682X_NO_CC -#define CONFIG_USBC_PPC_SYV682X_NO_CC -#endif - -#undef CONFIG_USBC_PPC_SYV682X_SMART_DISCHARGE -#ifdef CONFIG_PLATFORM_EC_USBC_PPC_SYV682X_SMART_DISCHARGE -#define CONFIG_USBC_PPC_SYV682X_SMART_DISCHARGE -#endif - -#undef CONFIG_USB_PD_TCPC_RUNTIME_CONFIG -#undef CONFIG_USB_MUX_RUNTIME_CONFIG -#ifdef CONFIG_PLATFORM_EC_USB_PD_TCPC_RUNTIME_CONFIG -#define CONFIG_USB_PD_TCPC_RUNTIME_CONFIG - -#ifdef CONFIG_PLATFORM_EC_USB_MUX_RUNTIME_CONFIG -#define CONFIG_USB_MUX_RUNTIME_CONFIG -#endif /* CONFIG_PLATFORM_EC_USB_MUX_RUNTIME_CONFIG */ - -#endif /* CONFIG_PLATFORM_EC_USB_PD_TCPC_RUNTIME_CONFIG */ - -#undef CONFIG_USB_PD_ALT_MODE -#ifdef CONFIG_PLATFORM_EC_USB_PD_ALT_MODE -#define CONFIG_USB_PD_ALT_MODE -#endif - -#undef CONFIG_USB_PD_ALT_MODE_DFP -#ifdef CONFIG_PLATFORM_EC_USB_PD_ALT_MODE_DFP -#define CONFIG_USB_PD_ALT_MODE_DFP -#endif - -#undef CONFIG_USB_PD_ALT_MODE_UFP -#ifdef CONFIG_PLATFORM_EC_USB_PD_ALT_MODE_UFP -#define CONFIG_USB_PD_ALT_MODE_UFP -#endif - -#undef CONFIG_USB_PD_DPS -#ifdef CONFIG_PLATFORM_EC_USB_PD_DPS -#define CONFIG_USB_PD_DPS -#endif - -#undef CONFIG_DP_REDRIVER_TDP142 -#ifdef CONFIG_PLATFORM_EC_DP_REDRIVER_TDP142 -#define CONFIG_DP_REDRIVER_TDP142 -#endif - -#undef CONFIG_USBC_RETIMER_FW_UPDATE -#ifdef CONFIG_PLATFORM_EC_USBC_RETIMER_FW_UPDATE -#define CONFIG_USBC_RETIMER_FW_UPDATE -#endif - -#undef CONFIG_USBC_RETIMER_INTEL_BB -#ifdef CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_BB - -#define USBC_PORT_C1_BB_RETIMER_I2C_ADDR \ - DT_REG_ADDR(DT_NODELABEL(usb_c1_bb_retimer)) -#define CONFIG_USBC_RETIMER_INTEL_BB -#endif - -#undef CONFIG_USBC_RETIMER_INTEL_BB_RUNTIME_CONFIG -#ifdef CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_BB_RUNTIME_CONFIG -#define CONFIG_USBC_RETIMER_INTEL_BB_RUNTIME_CONFIG -#endif - -#undef CONFIG_USBC_RETIMER_ANX7451 -#ifdef CONFIG_PLATFORM_EC_USBC_RETIMER_ANX7451 -#define CONFIG_USBC_RETIMER_ANX7451 -#endif - -#undef CONFIG_USBC_RETIMER_PS8811 -#ifdef CONFIG_PLATFORM_EC_USBC_RETIMER_PS8811 -#define CONFIG_USBC_RETIMER_PS8811 -#endif - -#undef CONFIG_USBC_SS_MUX -#ifdef CONFIG_PLATFORM_EC_USBC_SS_MUX -#define CONFIG_USBC_SS_MUX -#endif - -#undef CONFIG_USBC_SS_MUX_DFP_ONLY -#ifdef CONFIG_PLATFORM_EC_USBC_SS_MUX_DFP_ONLY -#define CONFIG_USBC_SS_MUX_DFP_ONLY -#endif - -#undef CONFIG_USB_MUX_IT5205 -#ifdef CONFIG_PLATFORM_EC_USB_MUX_IT5205 -#define CONFIG_USB_MUX_IT5205 -#endif - -#undef CONFIG_USB_MUX_PS8743 -#ifdef CONFIG_PLATFORM_EC_USB_MUX_PS8743 -#define CONFIG_USB_MUX_PS8743 -#endif - -#undef CONFIG_USB_MUX_VIRTUAL -#ifdef CONFIG_PLATFORM_EC_USB_MUX_VIRTUAL -#define CONFIG_USB_MUX_VIRTUAL -#endif - -#undef CONFIG_USB_PD_TCPM_MUX -#ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_MUX -#define CONFIG_USB_PD_TCPM_MUX -#endif - -#undef CONFIG_USBC_PPC_DEDICATED_INT -#ifdef CONFIG_PLATFORM_EC_USBC_PPC_DEDICATED_INT -#define CONFIG_USBC_PPC_DEDICATED_INT -#endif - -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_PD -#define CONFIG_CONSOLE_CMD_PD -#endif - -#ifdef CONFIG_HAS_TASK_PD_INT_C0 -/* This must be defined if any task is active */ -#define CONFIG_HAS_TASK_PD_INT -#endif - -#undef CONFIG_MKBP_EVENT -#undef CONFIG_MKBP_USE_GPIO -#undef CONFIG_MKBP_USE_HOST_EVENT -#undef CONFIG_MKBP_USE_GPIO_AND_HOST_EVENT -#undef CONFIG_MKBP_USE_CUSTOM -#ifdef CONFIG_PLATFORM_EC_MKBP_EVENT -#define CONFIG_MKBP_EVENT -#ifdef CONFIG_PLATFORM_EC_MKBP_USE_GPIO -#define CONFIG_MKBP_USE_GPIO -#elif defined(CONFIG_PLATFORM_EC_MKBP_USE_HOST_EVENT) -#define CONFIG_MKBP_USE_HOST_EVENT -#elif defined(CONFIG_PLATFORM_EC_MKBP_USE_GPIO_AND_HOST_EVENT) -#define CONFIG_MKBP_USE_GPIO_AND_HOST_EVENT -#elif defined(CONFIG_PLATFORM_EC_MKBP_USE_CUSTOM) -#define CONFIG_MKBP_USE_CUSTOM -#endif -#endif /* CONFIG_PLATFORM_EC_MKBP_EVENT */ - -#undef CONFIG_USB_PD_TCPC_LOW_POWER -#undef CONFIG_USB_PD_TCPC_LPM_EXIT_DEBOUNCE -#ifdef CONFIG_PLATFORM_EC_USB_PD_TCPC_LOW_POWER -#define CONFIG_USB_PD_TCPC_LOW_POWER -#define CONFIG_USB_PD_TCPC_LPM_EXIT_DEBOUNCE \ - CONFIG_PLATFORM_EC_USB_PD_TCPC_LPM_EXIT_DEBOUNCE_US -#endif /* CONFIG_PLATFORM_EC_USB_PD_TCPC_LOW_POWER */ - -#undef CONFIG_USB_PD_DEBUG_LEVEL -#ifdef CONFIG_PLATFORM_EC_USB_PD_DEBUG_FIXED_LEVEL -#define CONFIG_USB_PD_DEBUG_LEVEL CONFIG_PLATFORM_EC_USB_PD_DEBUG_LEVEL -#endif - -#undef CONFIG_USBC_VCONN -#ifdef CONFIG_PLATFORM_EC_USBC_VCONN -#define CONFIG_USBC_VCONN - -/* This must be defined as well */ -#define CONFIG_USBC_VCONN_SWAP -#endif /* CONFIG_PLATFORM_EC_USBC_VCONN */ - -#undef CONFIG_USB_PD_TRY_SRC -#ifdef CONFIG_PLATFORM_EC_USB_PD_TRY_SRC -#define CONFIG_USB_PD_TRY_SRC -#endif - -#undef CONFIG_USBC_PPC_POLARITY -#ifdef CONFIG_PLATFORM_EC_USBC_PPC_POLARITY -#define CONFIG_USBC_PPC_POLARITY -#endif - -#undef CONFIG_USBC_PPC_SBU -#ifdef CONFIG_PLATFORM_EC_USBC_PPC_SBU -#define CONFIG_USBC_PPC_SBU -#endif - -#undef CONFIG_USBC_PPC_VCONN -#ifdef CONFIG_PLATFORM_EC_USBC_PPC_VCONN -#define CONFIG_USBC_PPC_VCONN -#endif - -#undef CONFIG_USB_PD_USB32_DRD -#ifdef CONFIG_PLATFORM_EC_USB_PD_USB32_DRD -#define CONFIG_USB_PD_USB32_DRD -#endif - -#undef CONFIG_HOSTCMD_PD_CONTROL -#ifdef CONFIG_PLATFORM_EC_HOSTCMD_PD_CONTROL -#define CONFIG_HOSTCMD_PD_CONTROL -#endif - -#undef CONFIG_CMD_HCDEBUG -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_HCDEBUG -#define CONFIG_CMD_HCDEBUG -#endif - -#undef CONFIG_CMD_USB_PD_PE -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_USB_PD_PE -#define CONFIG_CMD_USB_PD_PE -#endif - -#undef CONFIG_CMD_USB_PD_CABLE -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_USB_PD_CABLE -#define CONFIG_CMD_USB_PD_CABLE -#endif - -#undef CONFIG_USB_PD_TBT_COMPAT_MODE -#ifdef CONFIG_PLATFORM_EC_USB_PD_TBT_COMPAT_MODE -#define CONFIG_USB_PD_TBT_COMPAT_MODE -#endif - -#undef CONFIG_USB_PD_USB4 -#ifdef CONFIG_PLATFORM_EC_USB_PD_USB4 -#define CONFIG_USB_PD_USB4 -#endif - -#undef CONFIG_USB_PD_FRS -#ifdef CONFIG_PLATFORM_EC_USB_PD_FRS -#define CONFIG_USB_PD_FRS -#endif - -#undef CONFIG_USB_PD_FRS_TCPC -#ifdef CONFIG_PLATFORM_EC_USB_PD_FRS_TCPC -#define CONFIG_USB_PD_FRS_TCPC -#endif - -#undef CONFIG_USB_PD_FRS_PPC -#ifdef CONFIG_PLATFORM_EC_USB_PD_FRS_PPC -#define CONFIG_USB_PD_FRS_PPC -#endif - -#undef CONFIG_VSTORE -#undef VSTORE_SLOT_COUNT -#ifdef CONFIG_PLATFORM_EC_VSTORE -#define CONFIG_VSTORE -#define CONFIG_VSTORE_SLOT_COUNT CONFIG_PLATFORM_EC_VSTORE_SLOT_COUNT -#endif - -/* motion sense */ -#undef CONFIG_MOTIONSENSE -#ifdef CONFIG_PLATFORM_EC_MOTIONSENSE -#define CONFIG_MOTIONSENSE - -#undef CONFIG_ACCEL_FIFO -#undef CONFIG_ACCEL_FIFO_SIZE -#undef CONFIG_ACCEL_FIFO_THRES -#ifdef CONFIG_PLATFORM_EC_ACCEL_FIFO -#define CONFIG_ACCEL_FIFO -#define CONFIG_ACCEL_FIFO_SIZE CONFIG_PLATFORM_EC_ACCEL_FIFO_SIZE -#define CONFIG_ACCEL_FIFO_THRES CONFIG_PLATFORM_EC_ACCEL_FIFO_THRES -#endif /* CONFIG_PLATFORM_EC_ACCEL_FIFO */ - -#undef CONFIG_CMD_ACCELS -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCELS -#define CONFIG_CMD_ACCELS -#endif - -#undef CONFIG_CMD_ACCEL_INFO -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCEL_INFO -#define CONFIG_CMD_ACCEL_INFO -#endif - -#undef CONFIG_ACCEL_SPOOF_MODE -#ifdef CONFIG_PLATFORM_EC_ACCEL_SPOOF_MODE -#define CONFIG_ACCEL_SPOOF_MODE -#endif - -#undef CONFIG_CMD_ACCEL_SPOOF -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCEL_SPOOF -#define CONFIG_CMD_ACCEL_SPOOF -#endif - -#undef CONFIG_SENSOR_TIGHT_TIMESTAMPS -#ifdef CONFIG_PLATFORM_EC_SENSOR_TIGHT_TIMESTAMPS -#define CONFIG_SENSOR_TIGHT_TIMESTAMPS -#endif - -#undef CONFIG_ACCEL_INTERRUPTS -#ifdef CONFIG_PLATFORM_EC_ACCEL_INTERRUPTS -#define CONFIG_ACCEL_INTERRUPTS -#endif - -#undef CONFIG_ALS -#undef CONFIG_ALS_COUNT -#ifdef CONFIG_PLATFORM_EC_ALS -#define CONFIG_ALS -#define ALS_COUNT CONFIG_PLATFORM_EC_ALS_COUNT -#else -#define ALS_COUNT 0 -#endif - -#undef CONFIG_DYNAMIC_MOTION_SENSOR_COUNT -#ifdef CONFIG_PLATFORM_EC_DYNAMIC_MOTION_SENSOR_COUNT -#define CONFIG_DYNAMIC_MOTION_SENSOR_COUNT -#endif - -#undef CONFIG_LID_ANGLE -#ifdef CONFIG_PLATFORM_EC_LID_ANGLE -#define CONFIG_LID_ANGLE -#endif - -#undef CONFIG_LID_ANGLE_UPDATE -#ifdef CONFIG_PLATFORM_EC_LID_ANGLE_UPDATE -#define CONFIG_LID_ANGLE_UPDATE -#endif - -#undef CONFIG_TABLET_MODE -#ifdef CONFIG_PLATFORM_EC_TABLET_MODE -#define CONFIG_TABLET_MODE -#endif - -#undef CONFIG_TABLET_MODE_SWITCH -#ifdef CONFIG_PLATFORM_EC_TABLET_MODE_SWITCH -#define CONFIG_TABLET_MODE_SWITCH -#endif - -#undef CONFIG_GMR_TABLET_MODE -#ifdef CONFIG_PLATFORM_EC_GMR_TABLET_MODE -#define CONFIG_GMR_TABLET_MODE -#endif - -/* sensors */ -#undef CONFIG_ACCELGYRO_BMI160 -#ifdef CONFIG_PLATFORM_EC_ACCELGYRO_BMI160 -#define CONFIG_ACCELGYRO_BMI160 -#endif - -#undef CONFIG_ACCELGYRO_BMI260 -#ifdef CONFIG_PLATFORM_EC_ACCELGYRO_BMI260 -#define CONFIG_ACCELGYRO_BMI260 -#endif - -#undef CONFIG_ACCELGYRO_BMI3XX -#ifdef CONFIG_PLATFORM_EC_ACCELGYRO_BMI3XX -#define CONFIG_ACCELGYRO_BMI3XX -#endif - -#undef CONFIG_ACCEL_BMA255 -#ifdef CONFIG_PLATFORM_EC_ACCEL_BMA255 -#define CONFIG_ACCEL_BMA255 -#endif - -#undef CONFIG_ACCEL_BMA4XX -#ifdef CONFIG_PLATFORM_EC_ACCEL_BMA4XX -#define CONFIG_ACCEL_BMA4XX -#endif - -#undef CONFIG_ACCEL_KX022 -#ifdef CONFIG_PLATFORM_EC_ACCEL_KX022 -#define CONFIG_ACCEL_KX022 -#endif - -#undef CONFIG_ALS_TCS3400 -#ifdef CONFIG_PLATFORM_EC_ALS_TCS3400 -#define CONFIG_ALS_TCS3400 -#endif - -#undef CONFIG_ACCELGYRO_ICM426XX -#ifdef CONFIG_PLATFORM_EC_ACCELGYRO_ICM426XX -#define CONFIG_ACCELGYRO_ICM426XX -#endif - -#undef CONFIG_ACCELGYRO_ICM42607 -#ifdef CONFIG_PLATFORM_EC_ACCELGYRO_ICM42607 -#define CONFIG_ACCELGYRO_ICM42607 -#endif - -#endif /* CONFIG_PLATFORM_EC_MOTIONSENSE */ - -#undef CONFIG_HOSTCMD_GET_UPTIME_INFO -#ifdef CONFIG_PLATFORM_EC_HOSTCMD_GET_UPTIME_INFO -#define CONFIG_HOSTCMD_GET_UPTIME_INFO -#endif - -#undef CONFIG_CMD_AP_RESET_LOG -#ifdef CONFIG_PLATFORM_EC_AP_RESET_LOG -#define CONFIG_CMD_AP_RESET_LOG -#endif - -#undef CONFIG_POWER_BUTTON -#ifdef CONFIG_PLATFORM_EC_POWER_BUTTON -#define CONFIG_POWER_BUTTON -#endif - -#undef CONFIG_COMMON_PANIC_OUTPUT -#ifdef CONFIG_PLATFORM_EC_PANIC -#define CONFIG_COMMON_PANIC_OUTPUT -#endif - -#undef CONFIG_SOFTWARE_PANIC -#ifdef CONFIG_PLATFORM_EC_SOFTWARE_PANIC -#define CONFIG_SOFTWARE_PANIC -#endif - -#undef CONFIG_CMD_CRASH -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_CRASH -#define CONFIG_CMD_CRASH -#endif - -#undef CONFIG_CMD_STACKOVERFLOW -#ifdef CONFIG_PLATFORM_EC_STACKOVERFLOW -#define CONFIG_CMD_STACKOVERFLOW -#endif - -#undef CONFIG_CMD_MEM -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_MEM -#define CONFIG_CMD_MEM -#endif - -#undef CONFIG_CMD_MD -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_MD -#define CONFIG_CMD_MD -#endif - -#undef CONFIG_CMD_RW -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_RW -#define CONFIG_CMD_RW -#endif - -#undef CONFIG_RTC -#ifdef CONFIG_PLATFORM_EC_RTC -#define CONFIG_RTC -#endif - -#undef CONFIG_CMD_RTC -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_RTC -#define CONFIG_CMD_RTC -#endif - -#undef CONFIG_CMD_RTC_ALARM -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_RTC_ALARM -#define CONFIG_CMD_RTC_ALARM -#endif - -#undef CONFIG_HOSTCMD_RTC -#ifdef CONFIG_PLATFORM_EC_HOSTCMD_RTC -#define CONFIG_HOSTCMD_RTC -#endif - -#undef CONFIG_HOST_COMMAND_STATUS -#ifdef CONFIG_PLATFORM_EC_HOST_COMMAND_STATUS -#define CONFIG_HOST_COMMAND_STATUS -#endif - -#undef CONFIG_SWITCH -#ifdef CONFIG_PLATFORM_EC_SWITCH -#define CONFIG_SWITCH -#endif - -#undef CONFIG_LN9310 -#ifdef CONFIG_PLATFORM_EC_SWITCHCAP_LN9310 -#define CONFIG_LN9310 -#endif - -#undef CONFIG_BOARD_VERSION_CBI -#ifdef CONFIG_PLATFORM_EC_BOARD_VERSION_CBI -#define CONFIG_BOARD_VERSION_CBI -#endif - -#undef CONFIG_BOARD_VERSION_GPIO -#ifdef CONFIG_PLATFORM_EC_BOARD_VERSION_GPIO -#define CONFIG_BOARD_VERSION_GPIO -#endif - -#undef CONFIG_CBI_EEPROM -#ifdef CONFIG_PLATFORM_EC_CBI_EEPROM -#define CONFIG_CBI_EEPROM -#define I2C_ADDR_EEPROM_FLAGS DT_REG_ADDR(DT_NODELABEL(cbi_eeprom)) -#endif - -#undef CONFIG_CBI_GPIO -#ifdef CONFIG_PLATFORM_EC_CBI_GPIO -#define CONFIG_CBI_GPIO -#endif - -#undef CONFIG_VBOOT_HASH -#ifdef CONFIG_PLATFORM_EC_VBOOT_HASH -#define CONFIG_VBOOT_HASH -#endif - -#undef CONFIG_SHA256_HW_ACCELERATE -#ifdef CONFIG_PLATFORM_EC_SHA256_HW_ACCELERATE -#define CONFIG_SHA256_HW_ACCELERATE -#endif - -#undef CONFIG_RO_HDR_MEM_OFF -#ifdef CONFIG_PLATFORM_EC_RO_HEADER_OFFSET -#define CONFIG_RO_HDR_MEM_OFF CONFIG_PLATFORM_EC_RO_HEADER_OFFSET -#else -#define CONFIG_RO_HDR_MEM_OFF 0 -#endif - -#undef CONFIG_RO_HDR_SIZE -#ifdef CONFIG_PLATFORM_EC_RO_HEADER_SIZE -#define CONFIG_RO_HDR_SIZE CONFIG_PLATFORM_EC_RO_HEADER_SIZE -#else -#define CONFIG_RO_HDR_SIZE 0 -#endif - -#undef CONFIG_SYSTEM_UNLOCKED -#ifdef CONFIG_PLATFORM_EC_SYSTEM_UNLOCKED -#define CONFIG_SYSTEM_UNLOCKED -#endif - -#undef CONFIG_BYPASS_CBI_EEPROM_WP_CHECK -#ifdef CONFIG_PLATFORM_EC_BYPASS_CBI_EEPROM_WP_CHECK -#define CONFIG_BYPASS_CBI_EEPROM_WP_CHECK -#endif - -#undef CONFIG_SPI_FLASH_REGS -#ifdef CONFIG_PLATFORM_EC_SPI_FLASH_REGS -#define CONFIG_SPI_FLASH_REGS -#endif - -#undef CONFIG_CMD_CHARGEN -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_CHARGEN -#define CONFIG_CMD_CHARGEN -#endif - -#undef CONFIG_DEBUG_ASSERT -#ifdef CONFIG_PLATFORM_EC_DEBUG_ASSERT -#define CONFIG_DEBUG_ASSERT -#endif - -#undef CONFIG_DEBUG_ASSERT_BRIEF -#ifdef CONFIG_PLATFORM_EC_DEBUG_ASSERT_BRIEF -#define CONFIG_DEBUG_ASSERT_BRIEF -#endif - -#undef CONFIG_DEBUG_ASSERT_REBOOTS -#ifdef CONFIG_PLATFORM_EC_DEBUG_ASSERT_REBOOTS -#define CONFIG_DEBUG_ASSERT_REBOOTS -#endif - -#undef CONFIG_MPU -#ifdef CONFIG_PLATFORM_EC_MPU -#define CONFIG_MPU -#endif - -#undef CONFIG_CMD_SYSINFO -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_SYSINFO -#define CONFIG_CMD_SYSINFO -#endif - -#undef CONFIG_CMD_SCRATCHPAD -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_SCRATCHPAD -#define CONFIG_CMD_SCRATCHPAD -#endif - -#undef CONFIG_CMD_SYSJUMP -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_SYSJUMP -#define CONFIG_CMD_SYSJUMP -#endif - -#undef CONFIG_WATCHDOG_PERIOD_MS -#ifdef CONFIG_PLATFORM_EC_WATCHDOG_PERIOD_MS -#define CONFIG_WATCHDOG_PERIOD_MS CONFIG_PLATFORM_EC_WATCHDOG_PERIOD_MS -#endif - -#undef CONFIG_WATCHDOG_WARNING_LEADING_TIME_MS -#if defined(CONFIG_PLATFORM_EC_WATCHDOG_WARNING_LEADING_TIME_MS) || \ - defined(CONFIG_WDT_NPCX_DELAY_CYCLES) || \ - defined(CONFIG_WDT_ITE_WARNING_LEADING_TIME_MS) -/* - * Note: - * NPCX wdt driver uses CONFIG_WDT_NPCX_DELAY_CYCLES to set the leading - * time of the watchdog warning timer. - * IT8XXX2 WDT driver uses CONFIG_WDT_ITE_WARNING_LEADING_TIME_MS period - * between watchdog warning and reset. - */ -#ifdef CONFIG_WDT_NPCX_DELAY_CYCLES -#define CONFIG_WATCHDOG_WARNING_LEADING_TIME_MS \ - (CONFIG_WDT_NPCX_DELAY_CYCLES * 31) -#elif CONFIG_WDT_ITE_WARNING_LEADING_TIME_MS -#define CONFIG_WATCHDOG_WARNING_LEADING_TIME_MS \ - CONFIG_WDT_ITE_WARNING_LEADING_TIME_MS -#else -#define CONFIG_WATCHDOG_WARNING_LEADING_TIME_MS \ - CONFIG_PLATFORM_EC_WATCHDOG_WARNING_LEADING_TIME_MS -#endif -#endif - -#undef CONFIG_VBOOT_EFS -#undef CONFIG_VBOOT_EFS2 -#ifdef CONFIG_PLATFORM_EC_VBOOT_EFS2 -#define CONFIG_VBOOT_EFS2 -#endif - -#undef CONFIG_USB_PD_TCPC_VCONN -#ifdef CONFIG_PLATFORM_EC_USB_PD_TCPC_VCONN -#define CONFIG_USB_PD_TCPC_VCONN -#endif - -#undef CONFIG_DPTF -#ifdef CONFIG_PLATFORM_EC_DPTF -#define CONFIG_DPTF -#endif - -#undef CONFIG_CHARGER_BQ25710 -#ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25710 -#define CONFIG_CHARGER_BQ25710 -#endif - -#undef CONFIG_CHARGER_BQ25720 -#ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25720 -#define CONFIG_CHARGER_BQ25720 -#endif - -#undef CONFIG_CHARGER_BQ25720_VSYS_TH2_DV -#ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25720_VSYS_TH2_CUSTOM -#define CONFIG_CHARGER_BQ25720_VSYS_TH2_DV \ - CONFIG_PLATFORM_EC_CHARGER_BQ25720_VSYS_TH2_DV -#endif - -#undef CONFIG_HIBERNATE_PSL -#ifdef CONFIG_PLATFORM_EC_HIBERNATE_PSL -#define CONFIG_HIBERNATE_PSL -#endif - -#undef CONFIG_BATTERY_DEVICE_CHEMISTRY -#ifdef CONFIG_PLATFORM_EC_USE_BATTERY_DEVICE_CHEMISTRY -#define CONFIG_BATTERY_DEVICE_CHEMISTRY \ - CONFIG_PLATFORM_EC_BATTERY_DEVICE_CHEMISTRY -#endif - -#undef CONFIG_CHARGER_DISCHARGE_ON_AC -#ifdef CONFIG_PLATFORM_EC_CHARGER_DISCHARGE_ON_AC -#define CONFIG_CHARGER_DISCHARGE_ON_AC -#endif - -#undef CONFIG_CHARGER_DISCHARGE_ON_AC_CUSTOM -#ifdef CONFIG_PLATFORM_EC_CHARGER_DISCHARGE_ON_AC_CUSTOM -#define CONFIG_CHARGER_DISCHARGE_ON_AC_CUSTOM -#endif - -#undef CONFIG_CHARGER_SENSE_RESISTOR -#ifdef CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR -#define CONFIG_CHARGER_SENSE_RESISTOR \ - CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR -#endif - -#undef CONFIG_CHARGER_SENSE_RESISTOR_AC -#ifdef CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR_AC -#define CONFIG_CHARGER_SENSE_RESISTOR_AC \ - CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR_AC -#endif - -#undef CONFIG_CHARGER_PROFILE_OVERRIDE -#ifdef CONFIG_PLATFORM_EC_CHARGER_PROFILE_OVERRIDE -#define CONFIG_CHARGER_PROFILE_OVERRIDE -#endif - -#undef CONFIG_CHARGER_PSYS -#ifdef CONFIG_PLATFORM_EC_CHARGER_PSYS -#define CONFIG_CHARGER_PSYS -#endif - -#undef CONFIG_CHARGER_PSYS_READ -#ifdef CONFIG_PLATFORM_EC_CHARGER_PSYS_READ -#define CONFIG_CHARGER_PSYS_READ -#endif - -#undef CONFIG_CMD_CHARGER_ADC_AMON_BMON -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_CHARGER_ADC_AMON_BMON -#define CONFIG_CMD_CHARGER_ADC_AMON_BMON -#endif - -#undef CONFIG_USB_PD_ONLY_FIXED_PDOS -#ifdef CONFIG_PLATFORM_EC_USB_PD_ONLY_FIXED_PDOS -#define CONFIG_USB_PD_ONLY_FIXED_PDOS -#endif - -#undef CONFIG_MP2964 -#ifdef CONFIG_PLATFORM_EC_MP2964 -#define CONFIG_MP2964 -#endif - -#undef CONFIG_ACCELGYRO_ICM_COMM_SPI -#ifdef CONFIG_PLATFORM_EC_ACCELGYRO_ICM_COMM_SPI -#define CONFIG_ACCELGYRO_ICM_COMM_SPI -#endif - -#undef CONFIG_ACCELGYRO_ICM_COMM_I2C -#ifdef CONFIG_PLATFORM_EC_ACCELGYRO_ICM_COMM_I2C -#define CONFIG_ACCELGYRO_ICM_COMM_I2C -#endif - -#undef CONFIG_ACCELGYRO_BMI_COMM_SPI -#ifdef CONFIG_PLATFORM_EC_ACCELGYRO_BMI_COMM_SPI -#define CONFIG_ACCELGYRO_BMI_COMM_SPI -#endif - -#undef CONFIG_ACCELGYRO_BMI_COMM_I2C -#ifdef CONFIG_PLATFORM_EC_ACCELGYRO_BMI_COMM_I2C -#define CONFIG_ACCELGYRO_BMI_COMM_I2C -#endif - -#undef CONFIG_CMD_SLEEPMASK -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_SLEEPMASK -#define CONFIG_CMD_SLEEPMASK -#endif - -#undef CONFIG_CMD_SLEEPMASK_SET -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_SLEEPMASK_SET -#define CONFIG_CMD_SLEEPMASK_SET -#endif - -#undef CONFIG_LOW_POWER_IDLE -#ifdef CONFIG_PLATFORM_EC_LOW_POWER_IDLE -#define CONFIG_LOW_POWER_IDLE -#endif - -#undef CONFIG_PORT80_4_BYTE -#ifdef CONFIG_PLATFORM_EC_PORT80_4_BYTE -#define CONFIG_PORT80_4_BYTE -#endif - -#undef CONFIG_ASSERT_CCD_MODE_ON_DTS_CONNECT -#ifdef CONFIG_PLATFORM_EC_ASSERT_CCD_MODE_ON_DTS_CONNECT -#define CONFIG_ASSERT_CCD_MODE_ON_DTS_CONNECT -#endif - -#undef CONFIG_CCD_USBC_PORT_NUMBER -#ifdef CONFIG_PLATFORM_EC_CCD_USBC_PORT_NUMBER -#define CONFIG_CCD_USBC_PORT_NUMBER CONFIG_PLATFORM_EC_CCD_USBC_PORT_NUMBER -#endif - -#undef CONFIG_ACCEL_LIS2DW12 -#ifdef CONFIG_PLATFORM_EC_ACCEL_LIS2DW12 -#define CONFIG_ACCEL_LIS2DW12 -#endif - -#undef CONFIG_ACCEL_LIS2DW_AS_BASE -#ifdef CONFIG_PLATFORM_EC_ACCEL_LIS2DW12_AS_BASE -#define CONFIG_ACCEL_LIS2DW_AS_BASE -#endif - -#undef CONFIG_CONSOLE_CHANNEL -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CHANNEL -#define CONFIG_CONSOLE_CHANNEL -#endif - -#undef CONFIG_USB_PD_DP_HPD_GPIO -#ifdef CONFIG_PLATFORM_EC_USB_PD_DP_HPD_GPIO -#define CONFIG_USB_PD_DP_HPD_GPIO -#endif - -#undef CONFIG_USB_PD_DP_HPD_GPIO_CUSTOM -#ifdef CONFIG_PLATFORM_EC_USB_PD_DP_HPD_GPIO_CUSTOM -#define CONFIG_USB_PD_DP_HPD_GPIO_CUSTOM -#endif - -#undef CONSOLE_CMD_MFALLOW -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_MFALLOW -#define CONSOLE_CMD_MFALLOW -#endif - -#undef CONFIG_TEMP_SENSOR_FIRST_READ_DELAY_MS -#ifdef CONFIG_PLATFORM_EC_TEMP_SENSOR_FIRST_READ_DELAY -#define CONFIG_TEMP_SENSOR_FIRST_READ_DELAY_MS \ - CONFIG_PLATFORM_EC_TEMP_SENSOR_FIRST_READ_DELAY_MS -#endif - -#undef CONFIG_CMD_S5_TIMEOUT -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_S5_TIMEOUT -#define CONFIG_CMD_S5_TIMEOUT -#endif - -#undef CONFIG_FW_RESET_VECTOR -#ifdef CONFIG_PLATFORM_EC_FW_RESET_VECTOR -#define CONFIG_FW_RESET_VECTOR -#endif - -#undef CONFIG_HOSTCMD_DEBUG_MODE -#if defined(CONFIG_HCDEBUG_OFF) -#define CONFIG_HOSTCMD_DEBUG_MODE 0 -#elif defined(CONFIG_HCDEBUG_NORMAL) -#define CONFIG_HOSTCMD_DEBUG_MODE 1 -#elif defined(CONFIG_HCDEBUG_EVERY) -#define CONFIG_HOSTCMD_DEBUG_MODE 2 -#elif defined(CONFIG_HCDEBUG_PARAMS) -#define CONFIG_HOSTCMD_DEBUG_MODE 3 -#endif - -#undef CONFIG_AMD_SB_RMI -#ifdef CONFIG_PLATFORM_EC_AMD_SB_RMI -#define CONFIG_AMD_SB_RMI -#endif - -#undef CONFIG_AMD_STT -#ifdef CONFIG_PLATFORM_EC_AMD_STT -#define CONFIG_AMD_STT -#endif - -#endif /* __CROS_EC_CONFIG_CHIP_H */ diff --git a/zephyr/shim/include/cpu.h b/zephyr/shim/include/cpu.h deleted file mode 100644 index 617f644fa9..0000000000 --- a/zephyr/shim/include/cpu.h +++ /dev/null @@ -1,14 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_CPU_H -#define __CROS_EC_CPU_H - -/* Do nothing for Zephyr */ -static inline void cpu_init(void) -{ -} - -#endif /* __CROS_EC_CPU_H */ diff --git a/zephyr/shim/include/ec_tasks.h b/zephyr/shim/include/ec_tasks.h deleted file mode 100644 index 6f75bd577e..0000000000 --- a/zephyr/shim/include/ec_tasks.h +++ /dev/null @@ -1,30 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_EC_TASKS_H -#define __CROS_EC_EC_TASKS_H - -/* - * The lowest preemptive thread priority is (CONFIG_NUM_PREEMT_PRIORITIES-1) - * while the lowest cooperative thread priority is -1. - * - * https://docs.zephyrproject.org/latest/reference/kernel/threads/index.html#thread-priorities - */ -#define LOWEST_THREAD_PRIORITY \ - COND_CODE_1(CONFIG_PREEMPT_ENABLED, \ - (CONFIG_NUM_PREEMPT_PRIORITIES - 1), (-1)) - -/** Starts all of the shimmed EC tasks. Requires CONFIG_SHIMMED_TASKS=y. */ -void start_ec_tasks(void); - -#ifdef TEST_BUILD -/** - * Set TASK_ID_TEST_RUNNER to current thread tid. Some functions that are tested - * require to run in any task context. - */ -void set_test_runner_tid(void); -#endif - -#endif /* __CROS_EC_EC_TASKS_H */ diff --git a/zephyr/shim/include/fpu.h b/zephyr/shim/include/fpu.h deleted file mode 100644 index da36f50492..0000000000 --- a/zephyr/shim/include/fpu.h +++ /dev/null @@ -1,56 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_FPU_H -#define __CROS_EC_FPU_H - -/* - * These functions are available in newlib but we are are using Zephyr's - * minimal library at present. - * - * This file is not called math.h to avoid a conflict with the toolchain's - * built-in version. - * - * This code is taken from core/cortex-m/include/fpu.h - */ - -#ifdef CONFIG_PLATFORM_EC_FPU - -/* Implementation for Cortex-M */ -#ifdef CONFIG_CPU_CORTEX_M -static inline float sqrtf(float v) -{ - float root; - - /* Use the CPU instruction */ - __asm__ volatile( - "fsqrts %0, %1" - : "=w" (root) - : "w" (v) - ); - - return root; -} - -static inline float fabsf(float v) -{ - float root; - - /* Use the CPU instruction */ - __asm__ volatile( - "fabss %0, %1" - : "=w" (root) - : "w" (v) - ); - - return root; -} -#else -#error "Unsupported core: please add an implementation" -#endif /* CONFIG_CPU_CORTEX_M */ - -#endif /* CONFIG_PLATFORM_EC_FPU */ - -#endif /* __CROS_EC_MATH_H */ diff --git a/zephyr/shim/include/gpio/gpio.h b/zephyr/shim/include/gpio/gpio.h deleted file mode 100644 index 18089e8a8e..0000000000 --- a/zephyr/shim/include/gpio/gpio.h +++ /dev/null @@ -1,95 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef ZEPHYR_SHIM_INCLUDE_GPIO_GPIO_H_ -#define ZEPHYR_SHIM_INCLUDE_GPIO_GPIO_H_ - -#include <device.h> -#include <devicetree.h> - -/* Information about each unused pin in the 'unused-pins' device tree node. */ -struct unused_pin_config { - /* Device name of a unused gpio pin */ - const char *dev_name; - /* Bit number of pin within a unused gpio pin */ - gpio_pin_t pin; - /* Config flags of unused gpio pin */ - gpio_flags_t flags; -}; - -/** - * @brief Set proper configuration for all unused pins. - * - * This function loops through all unused GPIOs in the node of "unused-gpios" - * in the device tree file to set proper configuration. If the GPIO flag is 0, - * set the GPIOs default setting for floating IOs to improve the power - * consumption. - * - * @return 0 If successful. - * @retval -ENOTSUP Not supported gpio device. - * @retval -EIO I/O error when accessing an external GPIO chip. - */ -int gpio_config_unused_pins(void) __attribute__((weak)); - -#if DT_NODE_EXISTS(DT_PATH(unused_pins)) -/** - * @brief Get a node from path '/unused-pins' which has a prop 'unused-gpios'. - * It contains unused GPIOs and chip vendor needs to configure them for - * better power consumption in the lowest power state. - * - * @return node identifier with that path. - */ -#define UNUSED_PINS_LIST DT_PATH(unused_pins) - -/** - * @brief Length of 'unused-gpios' property - * - * @return length of 'unused-gpios' prop which type is 'phandle-array' - */ -#define UNUSED_GPIOS_LIST_LEN DT_PROP_LEN(UNUSED_PINS_LIST, unused_gpios) - -/** - * @brief Construct a unused_pin_config structure from 'unused-gpios' property - * at index 'i' - * - * @param i index of 'unused-gpios' prop which type is 'phandles-array' - * @return unused_pin_config item at index 'i' - */ -#define UNUSED_GPIO_CONFIG_BY_IDX(i, _) \ - { \ - .dev_name = DT_GPIO_LABEL_BY_IDX(UNUSED_PINS_LIST, \ - unused_gpios, i), \ - .pin = DT_GPIO_PIN_BY_IDX(UNUSED_PINS_LIST, unused_gpios, i), \ - .flags = DT_GPIO_FLAGS_BY_IDX(UNUSED_PINS_LIST, unused_gpios, \ - i), \ - }, - -/** - * @brief Macro function to construct a list of unused_pin_config items by - * UTIL_LISTIFY func. - * - * Example devicetree fragment: - * / { - * unused-pins { - * compatible = "unused-gpios"; - * unused-gpios = <&gpio5 1 0>, - * <&gpiod 0 0>, - * <&gpiof 3 0>; - * }; - * - * Example usage: - * static const struct unused_pin_config unused_pin_configs[] = { - * UNUSED_GPIO_CONFIG_LIST - * }; - * - * @return a list of unused_pin_config items - */ -#define UNUSED_GPIO_CONFIG_LIST \ - UTIL_LISTIFY(UNUSED_GPIOS_LIST_LEN, UNUSED_GPIO_CONFIG_BY_IDX, _) - -#else -#define UNUSED_GPIO_CONFIG_LIST /* Nothing if no 'unused-pins' node */ -#endif /* unused_pins */ -#endif /* ZEPHYR_SHIM_INCLUDE_GPIO_GPIO_H_ */ diff --git a/zephyr/shim/include/i2c/i2c.h b/zephyr/shim/include/i2c/i2c.h deleted file mode 100644 index d945732856..0000000000 --- a/zephyr/shim/include/i2c/i2c.h +++ /dev/null @@ -1,54 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef ZEPHYR_CHROME_I2C_I2C_H -#define ZEPHYR_CHROME_I2C_I2C_H - -#include <device.h> -#include <devicetree.h> - -#ifdef CONFIG_PLATFORM_EC_I2C -#if DT_NODE_EXISTS(DT_PATH(named_i2c_ports)) - -#define I2C_PORT(id) DT_STRING_UPPER_TOKEN(id, enum_name) -#define I2C_PORT_WITH_COMMA(id) I2C_PORT(id), - -enum i2c_ports { - DT_FOREACH_CHILD(DT_PATH(named_i2c_ports), I2C_PORT_WITH_COMMA) - I2C_PORT_COUNT -}; -#define NAMED_I2C(name) I2C_PORT(DT_PATH(named_i2c_ports, name)) -#endif /* named_i2c_ports */ -#endif /* CONFIG_PLATFORM_EC_I2C */ - -/** - * @brief Adaptation of platform/ec's port IDs which map a port/bus to a device. - * - * This function should be implemented per chip and should map the enum value - * defined for the chip for encoding each valid port/bus combination. For - * example, the npcx chip defines the port/bus combinations NPCX_I2C_PORT* under - * chip/npcx/registers-npcx7.h. - * - * Thus, the npcx shim should implement this function to map the enum values - * to the correct devicetree device. - * - * @param port The port to get the device for. - * @return Pointer to the device struct or {@code NULL} if none are available. - */ -const struct device *i2c_get_device_for_port(const int port); - -/** - * @brief Get a port number for a received remote port number. - * - * This function translate a received port number via the I2C_PASSTHRU host - * command to a port number used in ZephyrEC based on remote_port property in - * dts. The first port which matches the remote port number is returned. - * - * @param port The received remote port. - * @return Port number used in EC. -1 if the remote port is not defined - */ -int i2c_get_port_from_remote_port(int remote_port); - -#endif /* ZEPHYR_CHROME_I2C_I2C_H */ diff --git a/zephyr/shim/include/linker.h b/zephyr/shim/include/linker.h deleted file mode 100644 index 335f4f0f19..0000000000 --- a/zephyr/shim/include/linker.h +++ /dev/null @@ -1,12 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_LINKER_H -#define __CROS_EC_LINKER_H - -/* Put the start of shared memory after all allocated RAM symbols */ -#define __shared_mem_buf _image_ram_end - -#endif diff --git a/zephyr/shim/include/motionsense_sensors.h b/zephyr/shim/include/motionsense_sensors.h deleted file mode 100644 index bdec8e79bd..0000000000 --- a/zephyr/shim/include/motionsense_sensors.h +++ /dev/null @@ -1,103 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_MOTIONSENSE_SENSORS_H -#define __CROS_EC_MOTIONSENSE_SENSORS_H - -#include <devicetree.h> - -#define SENSOR_NODE DT_PATH(motionsense_sensor) -#define SENSOR_INFO_NODE DT_PATH(motionsense_sensor_info) -#define SENSOR_ALT_NODE DT_PATH(motionsense_sensor_alt) - -#define SENSOR_ID(id) DT_CAT(SENSOR_, id) - -/* Define the SENSOR_ID if: - * DT_NODE_HAS_STATUS(id, okay) && !DT_NODE_HAS_PROP(id, alternate_for) - */ -#define SENSOR_ID_WITH_COMMA(id) \ - IF_ENABLED(DT_NODE_HAS_STATUS(id, okay), \ - (COND_CODE_0(DT_NODE_HAS_PROP(id, alternate_for), \ - (SENSOR_ID(id), ), ()))) - -enum sensor_id { -#if DT_NODE_EXISTS(SENSOR_NODE) - DT_FOREACH_CHILD(SENSOR_NODE, SENSOR_ID_WITH_COMMA) -#endif - SENSOR_COUNT, -}; - -#undef SENSOR_ID_WITH_COMMA -/* Define the SENSOR_ID if: - * DT_NODE_HAS_STATUS(id, okay) && DT_NODE_HAS_PROP(id, alternate_for) - */ -#define SENSOR_ID_WITH_COMMA(id) \ - IF_ENABLED(DT_NODE_HAS_STATUS(id, okay), \ - (COND_CODE_1(DT_NODE_HAS_PROP(id, alternate_for), \ - (SENSOR_ID(id), ), ()))) -enum sensor_alt_id { -#if DT_NODE_EXISTS(SENSOR_ALT_NODE) - DT_FOREACH_CHILD(SENSOR_ALT_NODE, SENSOR_ID_WITH_COMMA) -#endif - SENSOR_ALT_COUNT, -}; - -/* - * Find the accelerometers for lid angle calculation. - * - * The angle calculation requires two accelerometers. One is on the lid - * and the other one is on the base. So we need to specify which sensor is - * on the lid and which one is on the base. We use two labels "lid_accel" - * and "base_accel". - * - * base_accel - label for the accelerometer sensor on the base. - * lid_accel - label for the accelerometer sensor on the lid. - * - * e.g) below shows BMA255 is the accelerometer on the lid and bmi260 is - * the accelerometer on the base. - * - * motionsense-sensor { - * lid_accel: lid-accel { - * compatible = "cros-ec,bma255"; - * status = "okay"; - * : - * : - * }; - * - * base_accel: base-accel { - * compatible = "cros-ec,bmi260"; - * status = "okay"; - * : - * : - * }; - * }; - */ -#ifdef CONFIG_LID_ANGLE -#define CONFIG_LID_ANGLE_SENSOR_LID SENSOR_ID(DT_NODELABEL(lid_accel)) -#define CONFIG_LID_ANGLE_SENSOR_BASE SENSOR_ID(DT_NODELABEL(base_accel)) -#endif - -/* - * Get the sensors running in force mode from DT and create a bit mask for it. - * - * e.g) lid accel and als_clear are in accel_force_mode. The macro below finds - * the corresponding bit for each sensor in bit mask and set it. - * motionsense-sensor-info { - * compatible = "cros-ec,motionsense-sensor-info"; - * - * // list of sensors in force mode - * accel-force-mode-sensors = <&lid_accel &als_clear>; - * }; - */ -#if DT_NODE_HAS_PROP(SENSOR_INFO_NODE, accel_force_mode_sensors) -#define SENSOR_IN_FORCE_MODE(i, id) \ - | BIT(SENSOR_ID(DT_PHANDLE_BY_IDX(id, accel_force_mode_sensors, i))) -#define CONFIG_ACCEL_FORCE_MODE_MASK \ - (0 UTIL_LISTIFY(DT_PROP_LEN(SENSOR_INFO_NODE, \ - accel_force_mode_sensors), SENSOR_IN_FORCE_MODE, \ - SENSOR_INFO_NODE)) -#endif - -#endif /* __CROS_EC_MOTIONSENSE_SENSORS_H */ diff --git a/zephyr/shim/include/mpu.h b/zephyr/shim/include/mpu.h deleted file mode 100644 index 3555ef0db1..0000000000 --- a/zephyr/shim/include/mpu.h +++ /dev/null @@ -1,35 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_MPU_H -#define __CROS_EC_MPU_H - -/* This matches up with core/cortex-m/include/mpu.h */ - -/* Location of iram.text */ -extern char __iram_text_start; -extern char __iram_text_end; - -/** Enable MPU */ -void mpu_enable(void); - -/** - * Returns the value of MPU type register - * - * @returns 0 for now (always) - */ -uint32_t mpu_get_type(void); - -/** Protect RAM from code execution */ -int mpu_protect_data_ram(void); - -/** Protect code RAM from being overwritten */ -int mpu_protect_code_ram(void); - -/** Protect internal mapped flash memory from code execution */ -int mpu_lock_ro_flash(void); -int mpu_lock_rw_flash(void); - -#endif /* __CROS_EC_CPU_H */ diff --git a/zephyr/shim/include/pwm/pwm.h b/zephyr/shim/include/pwm/pwm.h deleted file mode 100644 index 1bf4685837..0000000000 --- a/zephyr/shim/include/pwm/pwm.h +++ /dev/null @@ -1,26 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef ZEPHYR_SHIM_INCLUDE_PWM_PWM_H_ -#define ZEPHYR_SHIM_INCLUDE_PWM_PWM_H_ - -#include <device.h> -#include <devicetree.h> - -#if DT_NODE_EXISTS(DT_PATH(named_pwms)) - -#define PWM_CHANNEL(id) DT_CAT(PWM_, id) -#define PWM_CHANNEL_WITH_COMMA(id) PWM_CHANNEL(id), - -enum pwm_channel { - DT_FOREACH_CHILD(DT_PATH(named_pwms), PWM_CHANNEL_WITH_COMMA) - PWM_CH_COUNT, -}; - -#define NAMED_PWM(name) PWM_CHANNEL(DT_PATH(named_pwms, name)) - -#endif /* named_pwms */ - -#endif /* ZEPHYR_SHIM_INCLUDE_PWM_PWM_H_ */ diff --git a/zephyr/shim/include/registers.h b/zephyr/shim/include/registers.h deleted file mode 100644 index b693733a21..0000000000 --- a/zephyr/shim/include/registers.h +++ /dev/null @@ -1,16 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_REGISTERS_H -#define __CROS_EC_REGISTERS_H - -/* - * This file is left intentionally blank. It is required since many of the - * shimmed files from platform/ec/common include it. Normally, this file - * would define chip specific registers and would reside under - * platform/ec/chip/... - */ - -#endif /* __CROS_EC_REGISTERS_H */ diff --git a/zephyr/shim/include/shimmed_task_id.h b/zephyr/shim/include/shimmed_task_id.h deleted file mode 100644 index f56edf0806..0000000000 --- a/zephyr/shim/include/shimmed_task_id.h +++ /dev/null @@ -1,119 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_SHIMMED_TASK_ID_H -#define __CROS_EC_SHIMMED_TASK_ID_H - -#include "common.h" - -/* Task identifier (8 bits) */ -typedef uint8_t task_id_t; - -/* - * Highest priority on bottom -- same as in platform/ec. List of CROS_EC_TASK - * items. See CONFIG_TASK_LIST in platform/ec's config.h for more information. - * For tests that want their own custom tasks, use CONFIG_HAS_TEST_TASKS and not - * CONFIG_SHIMMED_TASKS. - */ -#ifdef CONFIG_SHIMMED_TASKS -#define CROS_EC_TASK_LIST \ - COND_CODE_1(HAS_TASK_HOOKS, \ - (CROS_EC_TASK(HOOKS, hook_task, 0, \ - CONFIG_TASK_HOOKS_STACK_SIZE)), ()) \ - COND_CODE_1(HAS_TASK_CHG_RAMP, \ - (CROS_EC_TASK(CHG_RAMP, chg_ramp_task, 0, \ - CONFIG_TASK_CHG_RAMP_STACK_SIZE)), ()) \ - COND_CODE_1(HAS_TASK_USB_CHG_P0, \ - (CROS_EC_TASK(USB_CHG_P0, usb_charger_task, 0, \ - CONFIG_TASK_USB_CHG_STACK_SIZE)), ()) \ - COND_CODE_1(HAS_TASK_USB_CHG_P1, \ - (CROS_EC_TASK(USB_CHG_P1, usb_charger_task, 0, \ - CONFIG_TASK_USB_CHG_STACK_SIZE)), ()) \ - COND_CODE_1(HAS_TASK_USB_CHG_P2, \ - (CROS_EC_TASK(USB_CHG_P2, usb_charger_task, 0, \ - CONFIG_TASK_USB_CHG_STACK_SIZE)), ()) \ - COND_CODE_1(HAS_TASK_CHARGER, \ - (CROS_EC_TASK(CHARGER, charger_task, 0, \ - CONFIG_TASK_CHARGER_STACK_SIZE)), ()) \ - COND_CODE_1(HAS_TASK_CHIPSET, \ - (CROS_EC_TASK(CHIPSET, chipset_task, 0, \ - CONFIG_TASK_CHIPSET_STACK_SIZE)), ()) \ - COND_CODE_1(HAS_TASK_MOTIONSENSE, \ - (CROS_EC_TASK(MOTIONSENSE, motion_sense_task, 0, \ - CONFIG_TASK_MOTIONSENSE_STACK_SIZE)), ()) \ - COND_CODE_1(HAS_TASK_HOSTCMD, \ - (CROS_EC_TASK(HOSTCMD, host_command_task, 0, \ - CONFIG_TASK_HOSTCMD_STACK_SIZE)), ()) \ - COND_CODE_1(HAS_TASK_KEYPROTO, \ - (CROS_EC_TASK(KEYPROTO, keyboard_protocol_task, 0, \ - CONFIG_TASK_KEYPROTO_STACK_SIZE)), ()) \ - COND_CODE_1(HAS_TASK_POWERBTN, \ - (CROS_EC_TASK(POWERBTN, power_button_task, 0, \ - CONFIG_TASK_POWERBTN_STACK_SIZE)), ()) \ - COND_CODE_1(HAS_TASK_KEYSCAN, \ - (CROS_EC_TASK(KEYSCAN, keyboard_scan_task, 0, \ - CONFIG_TASK_KEYSCAN_STACK_SIZE)), ()) \ - COND_CODE_1(HAS_TASK_PD_C0, \ - (CROS_EC_TASK(PD_C0, pd_task, 0, \ - CONFIG_TASK_PD_STACK_SIZE)), ()) \ - COND_CODE_1(HAS_TASK_PD_C1, \ - (CROS_EC_TASK(PD_C1, pd_task, 0, \ - CONFIG_TASK_PD_STACK_SIZE)), ()) \ - COND_CODE_1(HAS_TASK_PD_C2, \ - (CROS_EC_TASK(PD_C2, pd_task, 0, \ - CONFIG_TASK_PD_STACK_SIZE)), ()) \ - COND_CODE_1(HAS_TASK_PD_C3, \ - (CROS_EC_TASK(PD_C3, pd_task, 0, \ - CONFIG_TASK_PD_STACK_SIZE)), ()) \ - COND_CODE_1(HAS_TASK_PD_INT_C0, \ - (CROS_EC_TASK(PD_INT_C0, pd_interrupt_handler_task, 0, \ - CONFIG_TASK_PD_INT_STACK_SIZE)), ()) \ - COND_CODE_1(HAS_TASK_PD_INT_C1, \ - (CROS_EC_TASK(PD_INT_C1, pd_interrupt_handler_task, 1, \ - CONFIG_TASK_PD_INT_STACK_SIZE)), ()) \ - COND_CODE_1(HAS_TASK_PD_INT_C2, \ - (CROS_EC_TASK(PD_INT_C2, pd_interrupt_handler_task, 2, \ - CONFIG_TASK_PD_INT_STACK_SIZE)), ()) \ - COND_CODE_1(HAS_TASK_PD_INT_C3, \ - (CROS_EC_TASK(PD_INT_C3, pd_interrupt_handler_task, 3, \ - CONFIG_TASK_PD_INT_STACK_SIZE)), ()) -#elif defined(CONFIG_HAS_TEST_TASKS) -#include "shimmed_test_tasks.h" -/* - * There are two different ways to define a task list (because historical - * reasons). Applications use CROS_EC_TASK_LIST to define their tasks, while - * unit tests that need additional tasks use CONFIG_TEST_TASK_LIST. For - * shimming a unit test, define CROS_EC_TASk_LIST as whatever - * CONFIG_TEST_TASK_LIST expands to. - */ -#if defined(CONFIG_TEST_TASK_LIST) && !defined(CROS_EC_TASK_LIST) -#define CROS_EC_TASK_LIST CONFIG_TEST_TASK_LIST -#endif /* CONFIG_TEST_TASK_LIST && !CROS_EC_TASK_LIST */ -#endif /* !CONFIG_ZTEST */ - -#ifndef CROS_EC_TASK_LIST -#define CROS_EC_TASK_LIST -#endif /* CROS_EC_TASK_LIST */ - -/* - * Define the task_ids globally for all shimmed platform/ec code to use. - * Note that unit test task lists use TASK_TEST, which we can just alias - * into a regular CROS_EC_TASK. - */ -#define CROS_EC_TASK(name, ...) TASK_ID_##name, -#define TASK_TEST(name, ...) CROS_EC_TASK(name) -enum { - TASK_ID_IDLE = -1, /* We don't shim the idle task */ - CROS_EC_TASK_LIST -#ifdef TEST_BUILD - TASK_ID_TEST_RUNNER, -#endif - TASK_ID_COUNT, - TASK_ID_INVALID = 0xff, /* Unable to find the task */ -}; -#undef CROS_EC_TASK -#undef TASK_TEST - -#endif /* __CROS_EC_SHIMMED_TASK_ID_H */ diff --git a/zephyr/shim/include/shimmed_tasks.h b/zephyr/shim/include/shimmed_tasks.h deleted file mode 100644 index 631b3fcb16..0000000000 --- a/zephyr/shim/include/shimmed_tasks.h +++ /dev/null @@ -1,90 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_SHIMMED_TASKS_H -#define __CROS_EC_SHIMMED_TASKS_H - -#ifdef CONFIG_HAS_TASK_CHARGER -#define HAS_TASK_CHARGER 1 -#endif /* CONFIG_HAS_TASK_CHARGER */ - -#ifdef CONFIG_HAS_TASK_CHG_RAMP -#define HAS_TASK_CHG_RAMP 1 -#endif /* CONFIG_HAS_TASK_CHG_RAMP */ - -#ifdef CONFIG_HAS_TASK_CHIPSET -#define HAS_TASK_CHIPSET 1 -#endif /* CONFIG_HAS_TASK_CHIPSET */ - -#ifdef CONFIG_HAS_TASK_HOOKS -#define HAS_TASK_HOOKS 1 -#endif /* CONFIG_HAS_TASK_HOOKS */ - -#ifdef CONFIG_HAS_TASK_HOSTCMD -#define HAS_TASK_HOSTCMD 1 -#define CONFIG_HOSTCMD_EVENTS -#endif /* CONFIG_HAS_TASK_HOSTCMD */ - -#ifdef CONFIG_HAS_TASK_KEYSCAN -#define HAS_TASK_KEYSCAN 1 -#endif /* CONFIG_HAS_TASK_KEYSCAN */ - -#ifdef CONFIG_HAS_TASK_KEYPROTO -#define HAS_TASK_KEYPROTO 1 -#endif /* CONFIG_HAS_TASK_KEYPROTO */ - -#ifdef CONFIG_HAS_TASK_MOTIONSENSE -#define HAS_TASK_MOTIONSENSE 1 -#endif /* CONFIG_HAS_TASK_MOTIONSENSE */ - -#ifdef CONFIG_HAS_TASK_PD_C0 -#define HAS_TASK_PD_C0 1 -#endif /* CONFIG_HAS_TASK_PD_C0 */ - -#ifdef CONFIG_HAS_TASK_PD_C1 -#define HAS_TASK_PD_C1 1 -#endif /* CONFIG_HAS_TASK_PD_C1 */ - -#ifdef CONFIG_HAS_TASK_PD_C2 -#define HAS_TASK_PD_C2 1 -#endif /* CONFIG_HAS_TASK_PD_C2 */ - -#ifdef CONFIG_HAS_TASK_PD_C3 -#define HAS_TASK_PD_C3 1 -#endif /* CONFIG_HAS_TASK_PD_C3 */ - -#ifdef CONFIG_HAS_TASK_PD_INT_C0 -#define HAS_TASK_PD_INT_C0 1 -#endif /* CONFIG_HAS_TASK_PD_INT_C0 */ - -#ifdef CONFIG_HAS_TASK_PD_INT_C1 -#define HAS_TASK_PD_INT_C1 1 -#endif /* CONFIG_HAS_TASK_PD_INT_C1 */ - -#ifdef CONFIG_HAS_TASK_PD_INT_C2 -#define HAS_TASK_PD_INT_C2 1 -#endif /* CONFIG_HAS_TASK_PD_INT_C2 */ - -#ifdef CONFIG_HAS_TASK_PD_INT_C3 -#define HAS_TASK_PD_INT_C3 1 -#endif /* CONFIG_HAS_TASK_PD_INT_C3 */ - -#ifdef CONFIG_HAS_TASK_POWERBTN -#define HAS_TASK_POWERBTN 1 -#endif /* CONFIG_HAS_TASK_POWERBTN */ - -#ifdef CONFIG_HAS_TASK_USB_CHG_P0 -#define HAS_TASK_USB_CHG_P0 1 -#endif /* CONFIG_HAS_TASK_USB_CHG_P0 */ - -#ifdef CONFIG_HAS_TASK_USB_CHG_P1 -#define HAS_TASK_USB_CHG_P1 1 -#endif /* CONFIG_HAS_TASK_USB_CHG_P1 */ - -#ifdef CONFIG_HAS_TASK_USB_CHG_P2 -#define HAS_TASK_USB_CHG_P2 1 -#endif /* CONFIG_HAS_TASK_USB_CHG_P2 */ - -#endif /* __CROS_EC_SHIMMED_TASKS_H */ diff --git a/zephyr/shim/include/temp_sensor/temp_sensor.h b/zephyr/shim/include/temp_sensor/temp_sensor.h deleted file mode 100644 index b0cadd4303..0000000000 --- a/zephyr/shim/include/temp_sensor/temp_sensor.h +++ /dev/null @@ -1,28 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef ZEPHYR_SHIM_INCLUDE_TEMP_SENSOR_TEMP_SENSOR_H_ -#define ZEPHYR_SHIM_INCLUDE_TEMP_SENSOR_TEMP_SENSOR_H_ - -#include <devicetree.h> - -#ifdef CONFIG_PLATFORM_EC_TEMP_SENSOR - -#define ZSHIM_TEMP_SENSOR_ID(node_id) DT_STRING_UPPER_TOKEN(node_id, enum_name) -#define TEMP_SENSOR_ID_WITH_COMMA(node_id) ZSHIM_TEMP_SENSOR_ID(node_id), - -enum temp_sensor_id { -#if DT_NODE_EXISTS(DT_PATH(named_temp_sensors)) - DT_FOREACH_CHILD(DT_PATH(named_temp_sensors), - TEMP_SENSOR_ID_WITH_COMMA) -#endif /* named_temp_sensors */ - TEMP_SENSOR_COUNT -}; - -#undef TEMP_SENSOR_ID_WITH_COMMA - -#endif /* CONFIG_PLATFORM_EC_TEMP_SENSOR */ - -#endif /* ZEPHYR_SHIM_INCLUDE_TEMP_SENSOR_TEMP_SENSOR_H_ */ diff --git a/zephyr/shim/include/zephyr_adc.h b/zephyr/shim/include/zephyr_adc.h deleted file mode 100644 index 7c0f3f3232..0000000000 --- a/zephyr/shim/include/zephyr_adc.h +++ /dev/null @@ -1,41 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_ZEPHYR_ADC_H -#define __CROS_EC_ZEPHYR_ADC_H - -#include <drivers/adc.h> - -#ifdef CONFIG_PLATFORM_EC_ADC - -#define ZSHIM_ADC_ID(node_id) DT_STRING_UPPER_TOKEN(node_id, enum_name) -#define ADC_ID_WITH_COMMA(node_id) ZSHIM_ADC_ID(node_id), - -enum adc_channel { -#if DT_NODE_EXISTS(DT_INST(0, named_adc_channels)) - DT_FOREACH_CHILD(DT_INST(0, named_adc_channels), ADC_ID_WITH_COMMA) -#endif /* named_adc_channels */ - ADC_CH_COUNT -}; - -#undef ADC_ID_WITH_COMMA - -struct adc_t { - const char *name; - uint8_t input_ch; - int factor_mul; - int factor_div; - struct adc_channel_cfg channel_cfg; -}; - -extern const struct adc_t adc_channels[]; -#else -/* Empty declaration to avoid warnings if adc.h is included */ -enum adc_channel { - ADC_CH_COUNT -}; -#endif /* CONFIG_PLATFORM_EC_ADC */ - -#endif /* __CROS_EC_ZEPHYR_ADC_H */ diff --git a/zephyr/shim/include/zephyr_console_shim.h b/zephyr/shim/include/zephyr_console_shim.h deleted file mode 100644 index b3c1f23922..0000000000 --- a/zephyr/shim/include/zephyr_console_shim.h +++ /dev/null @@ -1,85 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_ZEPHYR_CONSOLE_SHIM_H -#define __CROS_EC_ZEPHYR_CONSOLE_SHIM_H - -#include <shell/shell.h> - -struct zephyr_console_command { - /* Handler for the command. argv[0] will be the command name. */ - int (*handler)(int argc, char **argv); -#ifdef CONFIG_SHELL_HELP - /* Description of args */ - const char *argdesc; - /* Short help for command */ - const char *help; -#endif -}; - -#ifdef CONFIG_SHELL_HELP -#define _HELP_ARGS(A, H) \ - .argdesc = A, \ - .help = H, -#else -#define _HELP_ARGS(A, H) -#endif - -/** - * zshim_run_ec_console_command() - Dispatch a CrOS EC console command - * using Zephyr's shell - * - * @command: Pointer to a struct zephyr_console_command - * @argc: The number of command line arguments. - * @argv: The NULL-terminated list of arguments. - * - * Return: the return value from the handler. - */ -int zshim_run_ec_console_command(const struct zephyr_console_command *command, - size_t argc, char **argv); - -/* Internal wrappers for DECLARE_CONSOLE_COMMAND_* macros. */ -#define _ZEPHYR_SHELL_COMMAND_SHIM_2(NAME, ROUTINE_ID, ARGDESC, HELP, \ - WRAPPER_ID, ENTRY_ID) \ - static const struct zephyr_console_command ENTRY_ID = { \ - .handler = ROUTINE_ID, \ - _HELP_ARGS(ARGDESC, HELP) \ - }; \ - static int WRAPPER_ID(const struct shell *shell, size_t argc, \ - char **argv) \ - { \ - return zshim_run_ec_console_command(&ENTRY_ID, argc, argv); \ - } \ - SHELL_CMD_ARG_REGISTER(NAME, NULL, HELP, WRAPPER_ID, 0, \ - SHELL_OPT_ARG_MAX) - -#define _ZEPHYR_SHELL_COMMAND_SHIM(NAME, ROUTINE_ID, ARGDESC, HELP) \ - _ZEPHYR_SHELL_COMMAND_SHIM_2(NAME, ROUTINE_ID, ARGDESC, HELP, \ - UTIL_CAT(zshim_wrapper_, ROUTINE_ID), \ - UTIL_CAT(zshim_entry_, ROUTINE_ID)) - -/* These macros mirror the macros provided by the CrOS EC. */ -#define DECLARE_CONSOLE_COMMAND(NAME, ROUTINE, ARGDESC, HELP) \ - _ZEPHYR_SHELL_COMMAND_SHIM(NAME, ROUTINE, ARGDESC, HELP) - -/* - * TODO(jrosenth): implement flags and restricted commands? We just - * discard this in the shim layer for now. - */ -#define DECLARE_CONSOLE_COMMAND_FLAGS(NAME, ROUTINE, ARGDESC, HELP, FLAGS) \ - _ZEPHYR_SHELL_COMMAND_SHIM(NAME, ROUTINE, ARGDESC, HELP) -#define DECLARE_SAFE_CONSOLE_COMMAND(NAME, ROUTINE, ARGDESC, HELP) \ - _ZEPHYR_SHELL_COMMAND_SHIM(NAME, ROUTINE, ARGDESC, HELP) - -/** - * console_buf_notify_chars() - Notify the console host command buffer - * of bytes on the console. - * - * @s: The pointer to the string. - * @len: The size of the string. - */ -void console_buf_notify_chars(const char *s, size_t len); - -#endif /* __CROS_EC_ZEPHYR_CONSOLE_SHIM_H */ diff --git a/zephyr/shim/include/zephyr_espi_shim.h b/zephyr/shim/include/zephyr_espi_shim.h deleted file mode 100644 index a7b151cec8..0000000000 --- a/zephyr/shim/include/zephyr_espi_shim.h +++ /dev/null @@ -1,67 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_ZEPHYR_ESPI_SHIM_H -#define __CROS_EC_ZEPHYR_ESPI_SHIM_H - -#include <stdbool.h> -#include <stdint.h> - -/** - * zephyr_shim_setup_espi() - initialize eSPI device - * - * Return: 0 upon success, or <0 upon failure. - */ -int zephyr_shim_setup_espi(void); - -/** - * Check if the message is an ACPI command. - * - * @param data The full ACPI event data. - * @return True if the message is a command. - */ -bool is_acpi_command(uint32_t data); - -/** - * Get the value component of the ACPI message. - * - * @param data The full ACPI event data. - * @return The value component of the ACPI message. - */ -uint32_t get_acpi_value(uint32_t data); - -/** - * Check if the 8042 event data contains an input-buffer-full (IBF) event. - * - * @param data The full 8042 event data. - * @return True if the data contains an IBF event. - */ -bool is_8042_ibf(uint32_t data); - -/** - * Check if the 8042 event data contains an output-buffer-empty (OBE) event. - * - * @param data The full 8042 event data. - * @return True if the data contains an OBE event. - */ -bool is_8042_obe(uint32_t data); - -/** - * Get the type of 8042 message. - * - * @param data The full 8042 event data. - * @return The type component of the message. - */ -uint32_t get_8042_type(uint32_t data); - -/** - * Get the data from an 8042 message. - * - * @param data The full 8042 event data. - * @return The data component of the message. - */ -uint32_t get_8042_data(uint32_t data); - -#endif /* __CROS_EC_ZEPHYR_ESPI_SHIM_H */ diff --git a/zephyr/shim/include/zephyr_gpio_signal.h b/zephyr/shim/include/zephyr_gpio_signal.h deleted file mode 100644 index 6c90db81f4..0000000000 --- a/zephyr/shim/include/zephyr_gpio_signal.h +++ /dev/null @@ -1,57 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#if !defined(__CROS_EC_GPIO_SIGNAL_H) || defined(__CROS_EC_ZEPHYR_GPIO_SIGNAL_H) -#error "This file must only be included from gpio_signal.h. Include gpio_signal.h directly." -#endif -#define __CROS_EC_ZEPHYR_GPIO_SIGNAL_H - -#include <devicetree.h> -#include <toolchain.h> - -#define GPIO_SIGNAL(id) DT_STRING_UPPER_TOKEN(id, enum_name) -#define GPIO_SIGNAL_WITH_COMMA(id) \ - COND_CODE_1(DT_NODE_HAS_PROP(id, enum_name), (GPIO_SIGNAL(id), ), ()) -enum gpio_signal { - GPIO_UNIMPLEMENTED = -1, -#if DT_NODE_EXISTS(DT_PATH(named_gpios)) - DT_FOREACH_CHILD(DT_PATH(named_gpios), GPIO_SIGNAL_WITH_COMMA) -#endif - GPIO_COUNT, - GPIO_LIMIT = 0x0FFF, -}; -#undef GPIO_SIGNAL_WITH_COMMA -BUILD_ASSERT(GPIO_COUNT < GPIO_LIMIT); - -/** @brief Converts a node identifier under named gpios to enum - * - * Converts the specified node identifier name, which should be nested under - * the named_gpios node, into the correct enum gpio_signal that can be used - * with platform/ec gpio API - */ -#define NAMED_GPIO(name) GPIO_SIGNAL(DT_PATH(named_gpios, name)) - -/** @brief Obtain a named gpio enum from a label and property - * - * Obtains a valid enum gpio_signal that can be used with platform/ec gpio API - * from the property of a labeled node. The property has to point to a - * named_gpios node. - */ -#define NAMED_GPIO_NODELABEL(label, prop) \ - GPIO_SIGNAL(DT_PHANDLE(DT_NODELABEL(label), prop)) - -/* - * While we don't support IO expanders at the moment, multiple - * platform/ec headers (e.g., espi.h) require some of these constants - * to be defined. Define them as a compatibility measure. - */ -enum ioex_signal { - IOEX_SIGNAL_START = GPIO_LIMIT + 1, - IOEX_SIGNAL_END = IOEX_SIGNAL_START, - IOEX_LIMIT = 0x1FFF, -}; -BUILD_ASSERT(IOEX_SIGNAL_END < IOEX_LIMIT); - -#define IOEX_COUNT (IOEX_SIGNAL_END - IOEX_SIGNAL_START) diff --git a/zephyr/shim/include/zephyr_hooks_shim.h b/zephyr/shim/include/zephyr_hooks_shim.h deleted file mode 100644 index 96dcf9d8f4..0000000000 --- a/zephyr/shim/include/zephyr_hooks_shim.h +++ /dev/null @@ -1,56 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#if !defined(__CROS_EC_HOOKS_H) || defined(__CROS_EC_ZEPHYR_HOOKS_SHIM_H) -#error "This file must only be included from hooks.h. Include hooks.h directly." -#endif -#define __CROS_EC_ZEPHYR_HOOKS_SHIM_H - -#include <init.h> -#include <kernel.h> -#include <zephyr.h> - -#include "common.h" -#include "cros_version.h" - -/** - * The internal data structure stored for a deferred function. - */ -struct deferred_data { - struct k_work_delayable *work; -}; - -/** - * See include/hooks.h for documentation. - */ -int hook_call_deferred(const struct deferred_data *data, int us); - -#define DECLARE_DEFERRED(routine) \ - K_WORK_DELAYABLE_DEFINE(routine##_work_data, \ - (void (*)(struct k_work *))routine); \ - __maybe_unused const struct deferred_data routine##_data = { \ - .work = &routine##_work_data, \ - } - -/** - * Internal linked-list structure used to store hook lists. - */ -struct zephyr_shim_hook_list { - void (*routine)(void); - uint16_t priority; /* HOOK_PRIO_LAST = 9999 */ - enum hook_type type; - struct zephyr_shim_hook_list *next; -}; - -/** - * See include/hooks.h for documentation. - */ -#define DECLARE_HOOK(_hooktype, _routine, _priority) \ - STRUCT_SECTION_ITERABLE(zephyr_shim_hook_list, \ - _cros_hook_##_hooktype##_##_routine) = { \ - .type = _hooktype, \ - .routine = _routine, \ - .priority = _priority, \ - } diff --git a/zephyr/shim/include/zephyr_host_command.h b/zephyr/shim/include/zephyr_host_command.h deleted file mode 100644 index ae8e1f9ee3..0000000000 --- a/zephyr/shim/include/zephyr_host_command.h +++ /dev/null @@ -1,34 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#if !defined(__CROS_EC_HOST_COMMAND_H) || \ - defined(__CROS_EC_ZEPHYR_HOST_COMMAND_H) -#error "This file must only be included from host_command.h. " \ - "Include host_command.h directly" -#endif -#define __CROS_EC_ZEPHYR_HOST_COMMAND_H - -#include <init.h> - -#ifdef CONFIG_PLATFORM_EC_HOSTCMD - -/** - * See include/host_command.h for documentation. - */ -#define DECLARE_HOST_COMMAND(_command, _routine, _version_mask) \ - STRUCT_SECTION_ITERABLE(host_command, _cros_hcmd_##_command) = { \ - .command = _command, \ - .handler = _routine, \ - .version_mask = _version_mask, \ - } -#else /* !CONFIG_PLATFORM_EC_HOSTCMD */ -#ifdef __clang__ -#define DECLARE_HOST_COMMAND(command, routine, version_mask) -#else -#define DECLARE_HOST_COMMAND(command, routine, version_mask) \ - enum ec_status (routine)(struct host_cmd_handler_args *args) \ - __attribute__((unused)) -#endif /* __clang__ */ -#endif /* CONFIG_PLATFORM_EC_HOSTCMD */ diff --git a/zephyr/shim/include/zephyr_mkbp_event.h b/zephyr/shim/include/zephyr_mkbp_event.h deleted file mode 100644 index 159aebc8e1..0000000000 --- a/zephyr/shim/include/zephyr_mkbp_event.h +++ /dev/null @@ -1,23 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#if !defined(__CROS_EC_MKBP_EVENT_H) || \ - defined(__CROS_EC_ZEPHYR_MKBP_EVENT_H) -#error "This file must only be included from mkbp_event.h. " \ - "Include mkbp_event.h directly" -#endif -#define __CROS_EC_ZEPHYR_MKBP_EVENT_H - -const struct mkbp_event_source *zephyr_find_mkbp_event_source( - uint8_t event_type); - -/** - * See include/mkbp_event.h for documentation. - */ -#define DECLARE_EVENT_SOURCE(_type, _func) \ - STRUCT_SECTION_ITERABLE(mkbp_event_source, _cros_evtsrc_##_func) = { \ - .event_type = _type, \ - .get_data = _func, \ - } diff --git a/zephyr/shim/src/CMakeLists.txt b/zephyr/shim/src/CMakeLists.txt deleted file mode 100644 index e30671c6d6..0000000000 --- a/zephyr/shim/src/CMakeLists.txt +++ /dev/null @@ -1,48 +0,0 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -zephyr_library_sources(console.c) -zephyr_library_sources(crc.c) -zephyr_library_sources(gpio.c) -zephyr_library_sources(gpio_id.c) - -if (DEFINED CONFIG_ARCH_POSIX) - zephyr_library_sources(ztest_system.c) -else() - zephyr_library_sources(system.c) - zephyr_library_sources("${PLATFORM_EC}/common/system.c") -endif() -zephyr_library_sources_ifdef(no_libgcc libgcc_${ARCH}.S) - -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_ADC adc.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_BATTERY_FUEL_GAUGE - battery.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CBI_EEPROM cbi.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CBI_GPIO cbi.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_ESPI espi.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_FAN fan.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_FLASH_CROS flash.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_HOOKS hooks.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_HOSTCMD host_command.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_HOSTCMD_CONSOLE - console_buffer.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_KEYBOARD keyboard_raw.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_KEYBOARD keyscan.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_MKBP_EVENT mkbp_event.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_MOTIONSENSE - motionsense_sensors.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_PANIC panic.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_PWM pwm.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_LED_COMMON pwm_led.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_RTC rtc.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_SWITCHCAP_GPIO - switchcap_gpio.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_SWITCHCAP_LN9310 - switchcap_ln9310.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_TEMP_SENSOR temp_sensors.c - thermal.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_TIMER hwtimer.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_I2C i2c.c) -zephyr_library_sources_ifdef(CONFIG_SHIMMED_TASKS tasks.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_WATCHDOG watchdog.c) diff --git a/zephyr/shim/src/adc.c b/zephyr/shim/src/adc.c deleted file mode 100644 index 4f66774466..0000000000 --- a/zephyr/shim/src/adc.c +++ /dev/null @@ -1,83 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <drivers/adc.h> -#include <logging/log.h> -#include "adc.h" -#include "zephyr_adc.h" - -LOG_MODULE_REGISTER(shim_adc, LOG_LEVEL_ERR); - -#define ADC_NODE DT_NODELABEL(adc0) -const struct device *adc_dev; - -#define HAS_NAMED_ADC_CHANNELS DT_NODE_EXISTS(DT_INST(0, named_adc_channels)) - -#if HAS_NAMED_ADC_CHANNELS -#define ADC_CHANNEL_COMMA(node_id) \ - [ZSHIM_ADC_ID(node_id)] = { \ - .name = DT_LABEL(node_id), \ - .input_ch = DT_PROP(node_id, channel), \ - .factor_mul = DT_PROP(node_id, mul), \ - .factor_div = DT_PROP(node_id, div), \ - .channel_cfg = { \ - .channel_id = DT_PROP(node_id, channel), \ - .gain = DT_STRING_TOKEN(node_id, gain), \ - .reference = DT_STRING_TOKEN(node_id, reference), \ - .acquisition_time = \ - DT_PROP(node_id, acquisition_time), \ - .differential = DT_PROP(node_id, differential), \ - }, \ - }, -#ifdef CONFIG_ADC_CHANNELS_RUNTIME_CONFIG -struct adc_t adc_channels[] = { DT_FOREACH_CHILD( - DT_INST(0, named_adc_channels), ADC_CHANNEL_COMMA) }; -#else -const struct adc_t adc_channels[] = { DT_FOREACH_CHILD( - DT_INST(0, named_adc_channels), ADC_CHANNEL_COMMA) }; -#endif -#endif /* named_adc_channels */ - -static int init_device_bindings(const struct device *device) -{ - ARG_UNUSED(device); - adc_dev = DEVICE_DT_GET(ADC_NODE); - - if (!device_is_ready(adc_dev)) { - LOG_ERR("Error: device %s is not ready", adc_dev->name); - return -1; - } - -#if HAS_NAMED_ADC_CHANNELS - for (int i = 0; i < ARRAY_SIZE(adc_channels); i++) - adc_channel_setup(adc_dev, &adc_channels[i].channel_cfg); -#endif - - return 0; -} -SYS_INIT(init_device_bindings, POST_KERNEL, 51); - -int adc_read_channel(enum adc_channel ch) -{ - int ret = 0, rv; - struct adc_sequence seq = { - .options = NULL, - .channels = BIT(adc_channels[ch].input_ch), - .buffer = &ret, - .buffer_size = sizeof(ret), - .resolution = CONFIG_PLATFORM_EC_ADC_RESOLUTION, - .oversampling = CONFIG_PLATFORM_EC_ADC_OVERSAMPLING, - .calibrate = false, - }; - - rv = adc_read(adc_dev, &seq); - if (rv) - return rv; - - adc_raw_to_millivolts(adc_ref_internal(adc_dev), ADC_GAIN_1, - CONFIG_PLATFORM_EC_ADC_RESOLUTION, &ret); - ret = (ret * adc_channels[ch].factor_mul) / adc_channels[ch].factor_div; - return ret; -} diff --git a/zephyr/shim/src/battery.c b/zephyr/shim/src/battery.c deleted file mode 100644 index 6c4f211eda..0000000000 --- a/zephyr/shim/src/battery.c +++ /dev/null @@ -1,69 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include<devicetree.h> -#include"battery_fuel_gauge.h" - -#if DT_NODE_EXISTS(DT_PATH(batteries)) - -#define NODE_FUEL_GAUGE(node) \ -{ \ - .manuf_name = DT_PROP(node, manuf_name), \ - .device_name = DT_PROP(node, device_name), \ - .ship_mode = { \ - .wb_support = DT_PROP_OR(node, ship_mode_wb_support, 0), \ - .reg_addr = DT_PROP(node, ship_mode_reg_addr), \ - .reg_data = DT_PROP(node, ship_mode_reg_data), \ - }, \ - .sleep_mode = { \ - .sleep_supported = DT_PROP_OR(node, sleep_mode_supported, 0), \ - .reg_addr = DT_PROP_OR(node, sleep_mode_reg_addr, 0), \ - .reg_data = DT_PROP_OR(node, sleep_mode_reg_data, 0), \ - }, \ - .fet = { \ - .mfgacc_support = DT_PROP_OR(node, fet_mgfacc_support, 0), \ - .reg_addr = DT_PROP_OR(node, fet_reg_addr, 0), \ - .reg_mask = DT_PROP(node, fet_reg_mask), \ - .disconnect_val = DT_PROP(node, fet_disconnect_val), \ - .cfet_mask = DT_PROP_OR(node, fet_cfet_mask, 0), \ - .cfet_off_val = DT_PROP_OR(node, fet_cfet_off_val, 0), \ - }, \ - COND_CODE_1(UTIL_AND(IS_ENABLED(CONFIG_BATTERY_MEASURE_IMBALANCE), \ - DT_NODE_HAS_PROP(node, imbalance_mv)), \ - (.imbalance_mv = DT_STRING_TOKEN(node, imbalance_mv),), ()) \ -}, - -#define NODE_BATT_INFO(node) \ -{ \ - .voltage_max = DT_PROP(node, voltage_max), \ - .voltage_normal = DT_PROP(node, voltage_normal), \ - .voltage_min = DT_PROP(node, voltage_min), \ - .precharge_voltage = DT_PROP_OR(node, precharge_voltage, 0), \ - .precharge_current = DT_PROP_OR(node, precharge_current, 0), \ - .start_charging_min_c = DT_PROP(node, start_charging_min_c), \ - .start_charging_max_c = DT_PROP(node, start_charging_max_c), \ - .charging_min_c = DT_PROP(node, charging_min_c), \ - .charging_max_c = DT_PROP(node, charging_max_c), \ - .discharging_min_c = DT_PROP(node, discharging_min_c), \ - .discharging_max_c = DT_PROP(node, discharging_max_c), \ -}, - -#define NODE_BATT_PARAMS(node) \ -{ \ - .fuel_gauge = NODE_FUEL_GAUGE(node) \ - .batt_info = NODE_BATT_INFO(node) \ -}, - -const struct board_batt_params board_battery_info[] = { - DT_FOREACH_CHILD(DT_PATH(batteries), NODE_BATT_PARAMS) -}; - -#if DT_NODE_EXISTS(DT_NODELABEL(default_battery)) -#define BAT_ENUM(node) DT_CAT(BATTERY_, node) -const enum battery_type DEFAULT_BATTERY_TYPE = - BATTERY_TYPE(DT_NODELABEL(default_battery)); -#endif - -#endif /* DT_NODE_EXISTS(DT_PATH(batteries)) */ diff --git a/zephyr/shim/src/cbi.c b/zephyr/shim/src/cbi.c deleted file mode 100644 index e9d85b6088..0000000000 --- a/zephyr/shim/src/cbi.c +++ /dev/null @@ -1,22 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <drivers/cros_cbi.h> -#include <logging/log.h> -#include "hooks.h" - -LOG_MODULE_REGISTER(shim_cbi, LOG_LEVEL_ERR); - -static void cbi_dev_init(void) -{ - const struct device *dev = device_get_binding(CROS_CBI_LABEL); - - if (!dev) - LOG_ERR("Fail to find %s", CROS_CBI_LABEL); - - cros_cbi_init(dev); -} - -DECLARE_HOOK(HOOK_INIT, cbi_dev_init, HOOK_PRIO_FIRST); diff --git a/zephyr/shim/src/console.c b/zephyr/shim/src/console.c deleted file mode 100644 index 3fc3896ec2..0000000000 --- a/zephyr/shim/src/console.c +++ /dev/null @@ -1,353 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <device.h> -#include <drivers/uart.h> -#include <shell/shell.h> -#include <shell/shell_uart.h> -#include <stdbool.h> -#include <string.h> -#include <sys/printk.h> -#include <sys/ring_buffer.h> -#include <zephyr.h> -#include <logging/log.h> - -#include "console.h" -#include "printf.h" -#include "uart.h" -#include "usb_console.h" -#include "zephyr_console_shim.h" - -LOG_MODULE_REGISTER(shim_console, LOG_LEVEL_ERR); - -static const struct device *uart_shell_dev = - DEVICE_DT_GET(DT_CHOSEN(zephyr_shell_uart)); -static const struct shell *shell_zephyr; -static struct k_poll_signal shell_uninit_signal; -static struct k_poll_signal shell_init_signal; -RING_BUF_DECLARE(rx_buffer, CONFIG_UART_RX_BUF_SIZE); - -static void uart_rx_handle(const struct device *dev) -{ - static uint8_t scratch; - static uint8_t *data; - static uint32_t len, rd_len; - - do { - /* Get some bytes on the ring buffer */ - len = ring_buf_put_claim(&rx_buffer, &data, rx_buffer.size); - if (len > 0) { - /* Read from the FIFO up to `len` bytes */ - rd_len = uart_fifo_read(dev, data, len); - - /* Put `rd_len` bytes on the ring buffer */ - ring_buf_put_finish(&rx_buffer, rd_len); - } else { - /* - * There's no room on the ring buffer, throw away 1 - * byte. - */ - rd_len = uart_fifo_read(dev, &scratch, 1); - } - } while (rd_len != 0 && rd_len == len); -} - -static void uart_callback(const struct device *dev, void *user_data) -{ - uart_irq_update(dev); - - if (uart_irq_rx_ready(dev)) - uart_rx_handle(dev); -} - -static void shell_uninit_callback(const struct shell *shell, int res) -{ - if (!res) { - /* Set the new callback */ - uart_irq_callback_user_data_set(uart_shell_dev, uart_callback, - NULL); - - /* - * Disable TX interrupts. We don't actually use TX but for some - * reason none of this works without this line. - */ - uart_irq_tx_disable(uart_shell_dev); - - /* Enable RX interrupts */ - uart_irq_rx_enable(uart_shell_dev); - } - - /* Notify the uninit signal that we finished */ - k_poll_signal_raise(&shell_uninit_signal, res); -} - -int uart_shell_stop(void) -{ - struct k_poll_event event = K_POLL_EVENT_INITIALIZER( - K_POLL_TYPE_SIGNAL, K_POLL_MODE_NOTIFY_ONLY, - &shell_uninit_signal); - - /* Clear all pending input */ - uart_clear_input(); - - /* Disable RX and TX interrupts */ - uart_irq_rx_disable(uart_shell_dev); - uart_irq_tx_disable(uart_shell_dev); - - /* Initialize the uninit signal */ - k_poll_signal_init(&shell_uninit_signal); - - /* Stop the shell */ - shell_uninit(shell_backend_uart_get_ptr(), shell_uninit_callback); - - /* Wait for the shell to be turned off, the signal will wake us */ - k_poll(&event, 1, K_FOREVER); - - /* Event was signaled, return the result */ - return event.signal->result; -} - -static void shell_init_from_work(struct k_work *work) -{ - bool log_backend = CONFIG_SHELL_BACKEND_SERIAL_LOG_LEVEL > 0; - uint32_t level; - ARG_UNUSED(work); - - if (CONFIG_SHELL_BACKEND_SERIAL_LOG_LEVEL > LOG_LEVEL_DBG) { - level = CONFIG_LOG_MAX_LEVEL; - } else { - level = CONFIG_SHELL_BACKEND_SERIAL_LOG_LEVEL; - } - - /* Initialize the shell and re-enable both RX and TX */ - shell_init(shell_backend_uart_get_ptr(), uart_shell_dev, false, - log_backend, level); - uart_irq_rx_enable(uart_shell_dev); - uart_irq_tx_enable(uart_shell_dev); - - /* Notify the init signal that initialization is complete */ - k_poll_signal_raise(&shell_init_signal, 0); -} - -void uart_shell_start(void) -{ - static struct k_work shell_init_work; - struct k_poll_event event = K_POLL_EVENT_INITIALIZER( - K_POLL_TYPE_SIGNAL, K_POLL_MODE_NOTIFY_ONLY, - &shell_init_signal); - - /* Disable RX and TX interrupts */ - uart_irq_rx_disable(uart_shell_dev); - uart_irq_tx_disable(uart_shell_dev); - - /* Initialize k_work to call shell init (this makes it thread safe) */ - k_work_init(&shell_init_work, shell_init_from_work); - - /* Initialize the init signal to make sure we're read to listen */ - k_poll_signal_init(&shell_init_signal); - - /* Submit the work to be run by the kernel */ - k_work_submit(&shell_init_work); - - /* Wait for initialization to be run, the signal will wake us */ - k_poll(&event, 1, K_FOREVER); -} - -int zshim_run_ec_console_command(const struct zephyr_console_command *command, - size_t argc, char **argv) -{ - /* - * The Zephyr shell only displays the help string and not - * the argument descriptor when passing "-h" or "--help". Mimic the - * cros-ec behavior by displaying both the user types "<command> help", - */ -#ifdef CONFIG_SHELL_HELP - for (int i = 1; i < argc; i++) { - if (!command->help && !command->argdesc) - break; - if (!strcmp(argv[i], "help")) { - if (command->help) - printk("%s\n", command->help); - if (command->argdesc) - printk("Usage: %s\n", command->argdesc); - return 0; - } - } -#endif - - return command->handler(argc, argv); -} - -#if defined(CONFIG_CONSOLE_CHANNEL) && DT_NODE_EXISTS(DT_PATH(ec_console)) -#define EC_CONSOLE DT_PATH(ec_console) - -static const char * const disabled_channels[] = DT_PROP(EC_CONSOLE, disabled); -static const size_t disabled_channel_count = DT_PROP_LEN(EC_CONSOLE, disabled); -static int init_ec_console(const struct device *unused) -{ - for (size_t i = 0; i < disabled_channel_count; i++) - console_channel_disable(disabled_channels[i]); - - return 0; -} SYS_INIT(init_ec_console, PRE_KERNEL_1, 50); -#endif /* CONFIG_CONSOLE_CHANNEL && DT_NODE_EXISTS(DT_PATH(ec_console)) */ - -static int init_ec_shell(const struct device *unused) -{ - shell_zephyr = shell_backend_uart_get_ptr(); - return 0; -} SYS_INIT(init_ec_shell, PRE_KERNEL_1, 50); - -void uart_tx_start(void) -{ -} - -int uart_tx_ready(void) -{ - return 1; -} - -int uart_tx_char_raw(void *context, int c) -{ - uart_write_char(c); - return 0; -} - -void uart_write_char(char c) -{ - printk("%c", c); - - if (IS_ENABLED(CONFIG_PLATFORM_EC_HOSTCMD_CONSOLE)) - console_buf_notify_chars(&c, 1); -} - -void uart_flush_output(void) -{ - shell_process(shell_zephyr); - uart_tx_flush(); -} - -void uart_tx_flush(void) -{ - while (!uart_irq_tx_complete(uart_shell_dev)) - ; -} - -int uart_getc(void) -{ - uint8_t c; - - if (ring_buf_get(&rx_buffer, &c, 1)) { - return c; - } - return -1; -} - -void uart_clear_input(void) -{ - /* Clear any remaining shell processing. */ - shell_process(shell_zephyr); - ring_buf_reset(&rx_buffer); -} - -static void handle_sprintf_rv(int rv, size_t *len) -{ - if (rv < 0) { - LOG_ERR("Print buffer is too small"); - *len = CONFIG_SHELL_PRINTF_BUFF_SIZE; - } else { - *len += rv; - } -} - -static void zephyr_print(const char *buff, size_t size) -{ - /* - * shell_* functions can not be used in ISRs so use printk instead. - * Also, console_buf_notify_chars uses a mutex, which may not be - * locked in ISRs. - */ - if (k_is_in_isr() || shell_zephyr->ctx->state != SHELL_STATE_ACTIVE) { - printk("%s", buff); - } else { - /* - * On some platforms, shell_* functions are not as fast - * as printk and they need the added speed to avoid - * timeouts. - */ - if (IS_ENABLED(CONFIG_PLATFORM_EC_CONSOLE_USES_PRINTK)) - printk("%s", buff); - else - shell_fprintf(shell_zephyr, SHELL_NORMAL, "%s", buff); - if (IS_ENABLED(CONFIG_PLATFORM_EC_HOSTCMD_CONSOLE)) - console_buf_notify_chars(buff, size); - } -} - -#if defined(CONFIG_USB_CONSOLE) || defined(CONFIG_USB_CONSOLE_STREAM) -BUILD_ASSERT(0, "USB console is not supported with Zephyr"); -#endif /* defined(CONFIG_USB_CONSOLE) || defined(CONFIG_USB_CONSOLE_STREAM) */ - -int cputs(enum console_channel channel, const char *outstr) -{ - /* Filter out inactive channels */ - if (console_channel_is_disabled(channel)) - return EC_SUCCESS; - - zephyr_print(outstr, strlen(outstr)); - - return 0; -} - -int cprintf(enum console_channel channel, const char *format, ...) -{ - int rv; - va_list args; - size_t len = 0; - char buff[CONFIG_SHELL_PRINTF_BUFF_SIZE]; - - /* Filter out inactive channels */ - if (console_channel_is_disabled(channel)) - return EC_SUCCESS; - - va_start(args, format); - rv = crec_vsnprintf(buff, CONFIG_SHELL_PRINTF_BUFF_SIZE, format, args); - va_end(args); - handle_sprintf_rv(rv, &len); - - zephyr_print(buff, len); - - return rv > 0 ? EC_SUCCESS : rv; -} - -int cprints(enum console_channel channel, const char *format, ...) -{ - int rv; - va_list args; - char buff[CONFIG_SHELL_PRINTF_BUFF_SIZE]; - size_t len = 0; - - /* Filter out inactive channels */ - if (console_channel_is_disabled(channel)) - return EC_SUCCESS; - - rv = crec_snprintf(buff, CONFIG_SHELL_PRINTF_BUFF_SIZE, "[%pT ", - PRINTF_TIMESTAMP_NOW); - handle_sprintf_rv(rv, &len); - - va_start(args, format); - rv = crec_vsnprintf(buff + len, CONFIG_SHELL_PRINTF_BUFF_SIZE - len, - format, args); - va_end(args); - handle_sprintf_rv(rv, &len); - - rv = crec_snprintf(buff + len, CONFIG_SHELL_PRINTF_BUFF_SIZE - len, - "]\n"); - handle_sprintf_rv(rv, &len); - - zephyr_print(buff, len); - - return rv > 0 ? EC_SUCCESS : rv; -} diff --git a/zephyr/shim/src/console_buffer.c b/zephyr/shim/src/console_buffer.c deleted file mode 100644 index 427ae47768..0000000000 --- a/zephyr/shim/src/console_buffer.c +++ /dev/null @@ -1,128 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <kernel.h> -#include <zephyr.h> - -#include "common.h" -#include "console.h" -#include "ec_commands.h" - -static char console_buf[CONFIG_PLATFORM_EC_HOSTCMD_CONSOLE_BUF_SIZE]; -static uint32_t previous_snapshot_idx; -static uint32_t current_snapshot_idx; -static uint32_t tail_idx; - -static inline uint32_t next_idx(uint32_t cur_idx) -{ - return (cur_idx + 1) % ARRAY_SIZE(console_buf); -} - -K_MUTEX_DEFINE(console_write_lock); - -void console_buf_notify_chars(const char *s, size_t len) -{ - /* - * This is just notifying of console characters for debugging - * output, so if we are unable to lock the mutex immediately, - * then just drop the string. - */ - if (k_mutex_lock(&console_write_lock, K_NO_WAIT)) - return; - /* We got the mutex. */ - while (len--) { - /* Don't copy null byte into buffer */ - if (!(*s)) - continue; - - uint32_t new_tail = next_idx(tail_idx); - - /* Check if we are starting to overwrite our snapshot - * heads - */ - if (new_tail == previous_snapshot_idx) - previous_snapshot_idx = - next_idx(previous_snapshot_idx); - if (new_tail == current_snapshot_idx) - current_snapshot_idx = - next_idx(current_snapshot_idx); - - console_buf[new_tail] = *s++; - tail_idx = new_tail; - } - k_mutex_unlock(&console_write_lock); -} - -enum ec_status uart_console_read_buffer_init(void) -{ - if (k_mutex_lock(&console_write_lock, K_MSEC(100))) - /* Failed to acquire console buffer mutex */ - return EC_RES_TIMEOUT; - - previous_snapshot_idx = current_snapshot_idx; - current_snapshot_idx = tail_idx; - - k_mutex_unlock(&console_write_lock); - - return EC_RES_SUCCESS; -} - -int uart_console_read_buffer(uint8_t type, char *dest, uint16_t dest_size, - uint16_t *write_count_out) -{ - uint32_t *head; - uint16_t write_count = 0; - - switch (type) { - case CONSOLE_READ_NEXT: - /* Start from beginning of latest snapshot */ - head = ¤t_snapshot_idx; - break; - case CONSOLE_READ_RECENT: - /* Start from end of previous snapshot */ - head = &previous_snapshot_idx; - break; - default: - return EC_RES_INVALID_PARAM; - } - - /* We need to make sure we have room for at least the null byte */ - if (dest_size == 0) - return EC_RES_INVALID_PARAM; - - if (k_mutex_lock(&console_write_lock, K_MSEC(100))) - /* Failed to acquire console buffer mutex */ - return EC_RES_TIMEOUT; - - if (*head == tail_idx) { - /* No new data, return empty response */ - k_mutex_unlock(&console_write_lock); - return EC_RES_SUCCESS; - } - - do { - if (write_count >= dest_size - 1) - /* Buffer is full, minus the space for a null byte */ - break; - - dest[write_count] = console_buf[*head]; - write_count++; - *head = next_idx(*head); - } while (*head != tail_idx); - - dest[write_count] = '\0'; - write_count++; - - *write_count_out = write_count; - k_mutex_unlock(&console_write_lock); - - return EC_RES_SUCCESS; -} - -/* ECOS uart buffer, putc is blocking instead. */ -int uart_buffer_full(void) -{ - return false; -} diff --git a/zephyr/shim/src/crc.c b/zephyr/shim/src/crc.c deleted file mode 100644 index 5c726619ee..0000000000 --- a/zephyr/shim/src/crc.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <sys/crc.h> - -#include "crc8.h" - -/* Polynomial representation for x^8 + x^2 + x + 1 is 0x07 */ -#define SMBUS_POLYNOMIAL 0x07 - -inline uint8_t cros_crc8(const uint8_t *data, int len) -{ - return crc8(data, len, SMBUS_POLYNOMIAL, 0, false); -} - -uint8_t cros_crc8_arg(const uint8_t *data, int len, uint8_t previous_crc) -{ - return crc8(data, len, SMBUS_POLYNOMIAL, previous_crc, false); -} diff --git a/zephyr/shim/src/espi.c b/zephyr/shim/src/espi.c deleted file mode 100644 index c064bd6157..0000000000 --- a/zephyr/shim/src/espi.c +++ /dev/null @@ -1,563 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <atomic.h> -#include <device.h> -#include <drivers/espi.h> -#include <logging/log.h> -#include <kernel.h> -#include <stdint.h> -#include <zephyr.h> - -#include "acpi.h" -#include "chipset.h" -#include "common.h" -#include "espi.h" -#include "gpio.h" -#include "hooks.h" -#include "i8042_protocol.h" -#include "keyboard_protocol.h" -#include "lpc.h" -#include "port80.h" -#include "power.h" -#include "task.h" -#include "timer.h" -#include "zephyr_espi_shim.h" - -#define VWIRE_PULSE_TRIGGER_TIME 65 - -LOG_MODULE_REGISTER(espi_shim, CONFIG_ESPI_LOG_LEVEL); - -/* host command packet handler structure */ -static struct host_packet lpc_packet; -/* - * For the eSPI host command, request & response use the same share memory. - * This is for input request temp buffer. - */ -static uint8_t params_copy[EC_LPC_HOST_PACKET_SIZE] __aligned(4); -static bool init_done; - -/* - * A mapping of platform/ec signals to Zephyr virtual wires. - * - * This should be a macro which takes a parameter M, and does a - * functional application of M to 2-tuples of (platform/ec signal, - * zephyr vwire). - */ -#define VW_SIGNAL_TRANSLATION_LIST(M) \ - M(VW_SLP_S3_L, ESPI_VWIRE_SIGNAL_SLP_S3) \ - M(VW_SLP_S4_L, ESPI_VWIRE_SIGNAL_SLP_S4) \ - M(VW_SLP_S5_L, ESPI_VWIRE_SIGNAL_SLP_S5) \ - M(VW_SUS_STAT_L, ESPI_VWIRE_SIGNAL_SUS_STAT) \ - M(VW_PLTRST_L, ESPI_VWIRE_SIGNAL_PLTRST) \ - M(VW_OOB_RST_WARN, ESPI_VWIRE_SIGNAL_OOB_RST_WARN) \ - M(VW_OOB_RST_ACK, ESPI_VWIRE_SIGNAL_OOB_RST_ACK) \ - M(VW_WAKE_L, ESPI_VWIRE_SIGNAL_WAKE) \ - M(VW_PME_L, ESPI_VWIRE_SIGNAL_PME) \ - M(VW_ERROR_FATAL, ESPI_VWIRE_SIGNAL_ERR_FATAL) \ - M(VW_ERROR_NON_FATAL, ESPI_VWIRE_SIGNAL_ERR_NON_FATAL) \ - M(VW_PERIPHERAL_BTLD_STATUS_DONE, ESPI_VWIRE_SIGNAL_SLV_BOOT_DONE) \ - M(VW_SCI_L, ESPI_VWIRE_SIGNAL_SCI) \ - M(VW_SMI_L, ESPI_VWIRE_SIGNAL_SMI) \ - M(VW_HOST_RST_ACK, ESPI_VWIRE_SIGNAL_HOST_RST_ACK) \ - M(VW_HOST_RST_WARN, ESPI_VWIRE_SIGNAL_HOST_RST_WARN) \ - M(VW_SUS_ACK, ESPI_VWIRE_SIGNAL_SUS_ACK) \ - M(VW_SUS_WARN_L, ESPI_VWIRE_SIGNAL_SUS_WARN) \ - M(VW_SUS_PWRDN_ACK_L, ESPI_VWIRE_SIGNAL_SUS_PWRDN_ACK) \ - M(VW_SLP_A_L, ESPI_VWIRE_SIGNAL_SLP_A) \ - M(VW_SLP_LAN, ESPI_VWIRE_SIGNAL_SLP_LAN) \ - M(VW_SLP_WLAN, ESPI_VWIRE_SIGNAL_SLP_WLAN) - -/* - * These two macros are intended to be used as as the M parameter to - * the list above, generating case statements returning the - * translation for the first parameter to the second, and the second - * to the first, respectively. - */ -#define CASE_CROS_TO_ZEPHYR(A, B) \ - case A: \ - return B; -#define CASE_ZEPHYR_TO_CROS(A, B) CASE_CROS_TO_ZEPHYR(B, A) - -/* Translate a platform/ec signal to a Zephyr signal */ -static enum espi_vwire_signal signal_to_zephyr_vwire(enum espi_vw_signal signal) -{ - switch (signal) { - VW_SIGNAL_TRANSLATION_LIST(CASE_CROS_TO_ZEPHYR); - default: - LOG_ERR("Invalid virtual wire signal (%d)", signal); - return -1; - } -} - -/* Translate a Zephyr vwire to a platform/ec signal */ -static enum espi_vw_signal zephyr_vwire_to_signal(enum espi_vwire_signal vwire) -{ - switch (vwire) { - VW_SIGNAL_TRANSLATION_LIST(CASE_ZEPHYR_TO_CROS); - default: - LOG_ERR("Invalid zephyr vwire (%d)", vwire); - return -1; - } -} - -/* - * Bit field for each signal which can have an interrupt enabled. - * Note the interrupt is always enabled, it just depends whether we - * route it to the power_signal_interrupt handler or not. - */ -static atomic_t signal_interrupt_enabled; - -/* To be used with VW_SIGNAL_TRASLATION_LIST */ -#define CASE_CROS_TO_BIT(A, _) CASE_CROS_TO_ZEPHYR(A, BIT(A - VW_SIGNAL_START)) - -/* Convert from an EC signal to the corresponding interrupt enabled bit. */ -static uint32_t signal_to_interrupt_bit(enum espi_vw_signal signal) -{ - switch (signal) { - VW_SIGNAL_TRANSLATION_LIST(CASE_CROS_TO_BIT); - default: - return 0; - } -} - -/* Callback for vwire received */ -static void espi_vwire_handler(const struct device *dev, - struct espi_callback *cb, - struct espi_event event) -{ - int ec_signal = zephyr_vwire_to_signal(event.evt_details); - - if (IS_ENABLED(CONFIG_PLATFORM_EC_POWERSEQ) && - (signal_interrupt_enabled & signal_to_interrupt_bit(ec_signal))) { - power_signal_interrupt(ec_signal); - } -} - -#ifdef CONFIG_PLATFORM_EC_CHIPSET_RESET_HOOK -static void espi_chipset_reset(void) -{ - hook_notify(HOOK_CHIPSET_RESET); -} -DECLARE_DEFERRED(espi_chipset_reset); - -/* Callback for reset */ -static void espi_reset_handler(const struct device *dev, - struct espi_callback *cb, - struct espi_event event) -{ - hook_call_deferred(&espi_chipset_reset_data, MSEC); - -} -#endif /* CONFIG_PLATFORM_EC_CHIPSET_RESET_HOOK */ - -#define ESPI_NODE DT_NODELABEL(espi0) -static const struct device *espi_dev; - - -int espi_vw_set_wire(enum espi_vw_signal signal, uint8_t level) -{ - int ret = espi_send_vwire(espi_dev, signal_to_zephyr_vwire(signal), - level); - - if (ret != 0) - LOG_ERR("Encountered error sending virtual wire signal"); - - return ret; -} - -int espi_vw_get_wire(enum espi_vw_signal signal) -{ - uint8_t level; - - if (espi_receive_vwire(espi_dev, signal_to_zephyr_vwire(signal), - &level) < 0) { - LOG_ERR("Encountered error receiving virtual wire signal"); - return 0; - } - - return level; -} - -int espi_vw_enable_wire_int(enum espi_vw_signal signal) -{ - atomic_or(&signal_interrupt_enabled, signal_to_interrupt_bit(signal)); - return 0; -} - -int espi_vw_disable_wire_int(enum espi_vw_signal signal) -{ - atomic_and(&signal_interrupt_enabled, ~signal_to_interrupt_bit(signal)); - return 0; -} - -uint8_t *lpc_get_memmap_range(void) -{ - uint32_t lpc_memmap = 0; - int result = espi_read_lpc_request(espi_dev, EACPI_GET_SHARED_MEMORY, - &lpc_memmap); - - if (result != EC_SUCCESS) - LOG_ERR("Get lpc_memmap failed (%d)!\n", result); - - return (uint8_t *)lpc_memmap; -} - -/** - * Update the level-sensitive wake signal to the AP. - * - * @param wake_events Currently asserted wake events - */ -static void lpc_update_wake(host_event_t wake_events) -{ - /* - * Mask off power button event, since the AP gets that through a - * separate dedicated GPIO. - */ - wake_events &= ~EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON); - - /* Signal is asserted low when wake events is non-zero */ - gpio_set_level(GPIO_EC_PCH_WAKE_ODL, !wake_events); -} - -static void lpc_generate_smi(void) -{ - /* Enforce signal-high for long enough to debounce high */ - espi_vw_set_wire(VW_SMI_L, 1); - udelay(VWIRE_PULSE_TRIGGER_TIME); - espi_vw_set_wire(VW_SMI_L, 0); - udelay(VWIRE_PULSE_TRIGGER_TIME); - espi_vw_set_wire(VW_SMI_L, 1); -} - -static void lpc_generate_sci(void) -{ - /* Enforce signal-high for long enough to debounce high */ - espi_vw_set_wire(VW_SCI_L, 1); - udelay(VWIRE_PULSE_TRIGGER_TIME); - espi_vw_set_wire(VW_SCI_L, 0); - udelay(VWIRE_PULSE_TRIGGER_TIME); - espi_vw_set_wire(VW_SCI_L, 1); -} - -void lpc_update_host_event_status(void) -{ - uint32_t enable; - uint32_t status; - int need_sci = 0; - int need_smi = 0; - - if (!init_done) - return; - - /* Disable PMC1 interrupt while updating status register */ - enable = 0; - espi_write_lpc_request(espi_dev, ECUSTOM_HOST_SUBS_INTERRUPT_EN, - &enable); - - espi_read_lpc_request(espi_dev, EACPI_READ_STS, &status); - if (lpc_get_host_events_by_type(LPC_HOST_EVENT_SMI)) { - /* Only generate SMI for first event */ - if (!(status & EC_LPC_STATUS_SMI_PENDING)) - need_smi = 1; - - status |= EC_LPC_STATUS_SMI_PENDING; - espi_write_lpc_request(espi_dev, EACPI_WRITE_STS, &status); - } else { - status &= ~EC_LPC_STATUS_SMI_PENDING; - espi_write_lpc_request(espi_dev, EACPI_WRITE_STS, &status); - } - - espi_read_lpc_request(espi_dev, EACPI_READ_STS, &status); - if (lpc_get_host_events_by_type(LPC_HOST_EVENT_SCI)) { - /* Generate SCI for every event */ - need_sci = 1; - - status |= EC_LPC_STATUS_SCI_PENDING; - espi_write_lpc_request(espi_dev, EACPI_WRITE_STS, &status); - } else { - status &= ~EC_LPC_STATUS_SCI_PENDING; - espi_write_lpc_request(espi_dev, EACPI_WRITE_STS, &status); - } - - *(host_event_t *)host_get_memmap(EC_MEMMAP_HOST_EVENTS) = - lpc_get_host_events(); - - enable = 1; - espi_write_lpc_request(espi_dev, ECUSTOM_HOST_SUBS_INTERRUPT_EN, - &enable); - - /* Process the wake events. */ - lpc_update_wake(lpc_get_host_events_by_type(LPC_HOST_EVENT_WAKE)); - - /* Send pulse on SMI signal if needed */ - if (need_smi) - lpc_generate_smi(); - - /* ACPI 5.0-12.6.1: Generate SCI for SCI_EVT=1. */ - if (need_sci) - lpc_generate_sci(); -} - -static void host_command_init(void) -{ - /* We support LPC args and version 3 protocol */ - *(lpc_get_memmap_range() + EC_MEMMAP_HOST_CMD_FLAGS) = - EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED | - EC_HOST_CMD_FLAG_VERSION_3; - - /* Sufficiently initialized */ - init_done = 1; - - lpc_update_host_event_status(); -} - -DECLARE_HOOK(HOOK_INIT, host_command_init, HOOK_PRIO_INIT_LPC); - -static void handle_acpi_write(uint32_t data) -{ - uint8_t value, result; - uint8_t is_cmd = is_acpi_command(data); - uint32_t status; - - value = get_acpi_value(data); - - /* Handle whatever this was. */ - if (acpi_ap_to_ec(is_cmd, value, &result)) { - data = result; - espi_write_lpc_request(espi_dev, EACPI_WRITE_CHAR, &data); - } - - /* Clear processing flag */ - espi_read_lpc_request(espi_dev, EACPI_READ_STS, &status); - status &= ~EC_LPC_STATUS_PROCESSING; - espi_write_lpc_request(espi_dev, EACPI_WRITE_STS, &status); - - /* - * ACPI 5.0-12.6.1: Generate SCI for Input Buffer Empty / Output Buffer - * Full condition on the kernel channel. - */ - lpc_generate_sci(); -} - -static void lpc_send_response_packet(struct host_packet *pkt) -{ - uint32_t data; - - /* TODO(b/176523211): check whether add EC_RES_IN_PROGRESS handle */ - - /* Write result to the data byte. This sets the TOH status bit. */ - data = pkt->driver_result; - espi_write_lpc_request(espi_dev, ECUSTOM_HOST_CMD_SEND_RESULT, &data); -} - -static void handle_host_write(uint32_t data) -{ - uint32_t shm_mem_host_cmd; - - if (EC_COMMAND_PROTOCOL_3 != (data & 0xff)) { - LOG_ERR("Don't support this version of the host command"); - /* TODO:(b/175217186): error response for other versions */ - return; - } - - espi_read_lpc_request(espi_dev, ECUSTOM_HOST_CMD_GET_PARAM_MEMORY, - &shm_mem_host_cmd); - - lpc_packet.send_response = lpc_send_response_packet; - - lpc_packet.request = (const void *)shm_mem_host_cmd; - lpc_packet.request_temp = params_copy; - lpc_packet.request_max = sizeof(params_copy); - /* Don't know the request size so pass in the entire buffer */ - lpc_packet.request_size = EC_LPC_HOST_PACKET_SIZE; - - lpc_packet.response = (void *)shm_mem_host_cmd; - lpc_packet.response_max = EC_LPC_HOST_PACKET_SIZE; - lpc_packet.response_size = 0; - - lpc_packet.driver_result = EC_RES_SUCCESS; - - host_packet_receive(&lpc_packet); - return; -} - -void lpc_set_acpi_status_mask(uint8_t mask) -{ - uint32_t status; - espi_read_lpc_request(espi_dev, EACPI_READ_STS, &status); - status |= mask; - espi_write_lpc_request(espi_dev, EACPI_WRITE_STS, &status); -} - -void lpc_clear_acpi_status_mask(uint8_t mask) -{ - uint32_t status; - espi_read_lpc_request(espi_dev, EACPI_READ_STS, &status); - status &= ~mask; - espi_write_lpc_request(espi_dev, EACPI_WRITE_STS, &status); -} - -/* Get protocol information */ -static enum ec_status lpc_get_protocol_info(struct host_cmd_handler_args *args) -{ - struct ec_response_get_protocol_info *r = args->response; - - memset(r, 0, sizeof(*r)); - r->protocol_versions = BIT(3); - r->max_request_packet_size = EC_LPC_HOST_PACKET_SIZE; - r->max_response_packet_size = EC_LPC_HOST_PACKET_SIZE; - r->flags = 0; - - args->response_size = sizeof(*r); - - return EC_RES_SUCCESS; -} -DECLARE_HOST_COMMAND(EC_CMD_GET_PROTOCOL_INFO, lpc_get_protocol_info, - EC_VER_MASK(0)); - -/* - * This function is needed only for the obsolete platform which uses the GPIO - * for KBC's IRQ. - */ -void lpc_keyboard_resume_irq(void) {} - -void lpc_keyboard_clear_buffer(void) -{ - /* Clear OBF flag in host STATUS and HIKMST regs */ - espi_write_lpc_request(espi_dev, E8042_CLEAR_OBF, 0); -} -int lpc_keyboard_has_char(void) -{ - uint32_t status; - - /* if OBF bit is '1', that mean still have a data in DBBOUT */ - espi_read_lpc_request(espi_dev, E8042_OBF_HAS_CHAR, &status); - return status; -} - -void lpc_keyboard_put_char(uint8_t chr, int send_irq) -{ - uint32_t kb_char = chr; - - espi_write_lpc_request(espi_dev, E8042_WRITE_KB_CHAR, &kb_char); - LOG_INF("KB put %02x", kb_char); -} - -/* Put an aux char to host buffer by HIMDO and assert status bit 5. */ -void lpc_aux_put_char(uint8_t chr, int send_irq) -{ - uint32_t kb_char = chr; - uint32_t status = I8042_AUX_DATA; - - espi_write_lpc_request(espi_dev, E8042_SET_FLAG, &status); - espi_write_lpc_request(espi_dev, E8042_WRITE_KB_CHAR, &kb_char); - LOG_INF("AUX put %02x", kb_char); -} - -static void kbc_ibf_obe_handler(uint32_t data) -{ -#ifdef HAS_TASK_KEYPROTO - uint8_t is_ibf = is_8042_ibf(data); - uint32_t status = I8042_AUX_DATA; - - if (is_ibf) { - keyboard_host_write(get_8042_data(data), - get_8042_type(data)); - } else if (IS_ENABLED(CONFIG_8042_AUX)) { - espi_write_lpc_request(espi_dev, E8042_CLEAR_FLAG, &status); - } - task_wake(TASK_ID_KEYPROTO); -#endif -} - -int lpc_keyboard_input_pending(void) -{ - uint32_t status; - - /* if IBF bit is '1', that mean still have a data in DBBIN */ - espi_read_lpc_request(espi_dev, E8042_IBF_HAS_CHAR, &status); - return status; -} - -static void espi_peripheral_handler(const struct device *dev, - struct espi_callback *cb, - struct espi_event event) -{ - uint16_t event_type = event.evt_details; - - if (IS_ENABLED(CONFIG_PLATFORM_EC_PORT80) && - event_type == ESPI_PERIPHERAL_DEBUG_PORT80) { - port_80_write(event.evt_data); - } - - if (IS_ENABLED(CONFIG_PLATFORM_EC_ACPI) && - event_type == ESPI_PERIPHERAL_HOST_IO) { - handle_acpi_write(event.evt_data); - } - - if (IS_ENABLED(CONFIG_PLATFORM_EC_HOSTCMD) && - event_type == ESPI_PERIPHERAL_EC_HOST_CMD) { - handle_host_write(event.evt_data); - } - - if (IS_ENABLED(CONFIG_ESPI_PERIPHERAL_8042_KBC) && - IS_ENABLED(HAS_TASK_KEYPROTO) && - event_type == ESPI_PERIPHERAL_8042_KBC) { - kbc_ibf_obe_handler(event.evt_data); - } -} - -int zephyr_shim_setup_espi(void) -{ - static struct { - struct espi_callback cb; - espi_callback_handler_t handler; - enum espi_bus_event event_type; - } callbacks[] = { - { - .handler = espi_vwire_handler, - .event_type = ESPI_BUS_EVENT_VWIRE_RECEIVED, - }, - { - .handler = espi_peripheral_handler, - .event_type = ESPI_BUS_PERIPHERAL_NOTIFICATION, - }, -#ifdef CONFIG_PLATFORM_EC_CHIPSET_RESET_HOOK - { - .handler = espi_reset_handler, - .event_type = ESPI_BUS_RESET, - }, -#endif - }; - - struct espi_cfg cfg = { - .io_caps = ESPI_IO_MODE_SINGLE_LINE, - .channel_caps = ESPI_CHANNEL_VWIRE | ESPI_CHANNEL_PERIPHERAL | - ESPI_CHANNEL_OOB, - .max_freq = 20, - }; - - espi_dev = DEVICE_DT_GET(ESPI_NODE); - if (!device_is_ready(espi_dev)) { - LOG_ERR("Error: device %s is not ready", espi_dev->name); - return -1; - } - - /* Configure eSPI */ - if (espi_config(espi_dev, &cfg)) { - LOG_ERR("Failed to configure eSPI device"); - return -1; - } - - /* Setup callbacks */ - for (size_t i = 0; i < ARRAY_SIZE(callbacks); i++) { - espi_init_callback(&callbacks[i].cb, callbacks[i].handler, - callbacks[i].event_type); - espi_add_callback(espi_dev, &callbacks[i].cb); - } - - return 0; -} diff --git a/zephyr/shim/src/fan.c b/zephyr/shim/src/fan.c deleted file mode 100644 index 932688fc9c..0000000000 --- a/zephyr/shim/src/fan.c +++ /dev/null @@ -1,380 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "fan.h" -#include "pwm.h" -#include "pwm/pwm.h" -#include "system.h" -#include "math_util.h" -#include "hooks.h" -#include "gpio_signal.h" -#include "gpio.h" -#include <logging/log.h> -#include <sys/util_macro.h> -#include <drivers/sensor.h> - -LOG_MODULE_REGISTER(fan_shim, LOG_LEVEL_ERR); - -#define FAN_CONFIGS(node_id) \ - const struct fan_conf node_id##_conf = { \ - .flags = (COND_CODE_1(DT_PROP(node_id, not_use_rpm_mode), \ - (0), (FAN_USE_RPM_MODE))) | \ - (COND_CODE_1(DT_PROP(node_id, use_fast_start), \ - (FAN_USE_FAST_START), (0))), \ - .ch = node_id, \ - .pgood_gpio = COND_CODE_1( \ - DT_NODE_HAS_PROP(node_id, pgood_gpio), \ - (GPIO_SIGNAL(DT_PHANDLE(node_id, pgood_gpio))), \ - (GPIO_UNIMPLEMENTED)), \ - .enable_gpio = COND_CODE_1( \ - DT_NODE_HAS_PROP(node_id, enable_gpio), \ - (GPIO_SIGNAL(DT_PHANDLE(node_id, enable_gpio))), \ - (GPIO_UNIMPLEMENTED)), \ - }; \ - const struct fan_rpm node_id##_rpm = { \ - .rpm_min = DT_PROP(node_id, rpm_min), \ - .rpm_start = DT_PROP(node_id, rpm_start), \ - .rpm_max = DT_PROP(node_id, rpm_max), \ - }; - -#define FAN_INST(node_id) \ - [node_id] = { \ - .conf = &node_id##_conf, \ - .rpm = &node_id##_rpm, \ - }, - -#define FAN_CONTROL_INST(node_id) \ - [node_id] = { \ - .pwm_id = PWM_CHANNEL(DT_PHANDLE(node_id, pwm)), \ - }, - -#if DT_NODE_EXISTS(DT_INST(0, named_fans)) -DT_FOREACH_CHILD(DT_INST(0, named_fans), FAN_CONFIGS) -#endif /* named_fan */ - -const struct fan_t fans[] = { -#if DT_NODE_EXISTS(DT_INST(0, named_fans)) - DT_FOREACH_CHILD(DT_INST(0, named_fans), FAN_INST) -#endif /* named_fan */ -}; - -#define TACHO_DEV_INIT(node_id) { \ - fan_control[node_id].tach = \ - DEVICE_DT_GET(DT_PHANDLE(node_id, tach)); \ - } - -/* Rpm deviation (Unit:percent) */ -#ifndef RPM_DEVIATION -#define RPM_DEVIATION 7 -#endif - -/* Margin of target rpm */ -#define RPM_MARGIN(rpm_target) (((rpm_target)*RPM_DEVIATION) / 100) - -/* Fan mode */ -enum fan_mode { - /* FAN rpm mode */ - FAN_RPM = 0, - /* FAN duty mode */ - FAN_DUTY, -}; - -/* Fan status data structure */ -struct fan_status_t { - /* Fan mode */ - enum fan_mode current_fan_mode; - /* Actual rpm */ - int rpm_actual; - /* Target rpm */ - int rpm_target; - /* Fan config flags */ - unsigned int flags; - /* Automatic fan status */ - enum fan_status auto_status; -}; - -/* Data structure to define tachometer. */ -struct fan_control_t { - const struct device *tach; - enum pwm_channel pwm_id; -}; - -static struct fan_status_t fan_status[FAN_CH_COUNT]; -static int rpm_pre[FAN_CH_COUNT]; -static struct fan_control_t fan_control[] = { -#if DT_NODE_EXISTS(DT_INST(0, named_fans)) - DT_FOREACH_CHILD(DT_INST(0, named_fans), FAN_CONTROL_INST) -#endif /* named_fan */ -}; - -/** - * Get fan rpm value - * - * @param ch operation channel - * @return Actual rpm - */ -static int fan_rpm(int ch) -{ - struct sensor_value val = { 0 }; - - sensor_sample_fetch_chan(fan_control[ch].tach, SENSOR_CHAN_RPM); - sensor_channel_get(fan_control[ch].tach, SENSOR_CHAN_RPM, &val); - return (int)val.val1; -} - -/** - * Check all fans are stopped - * - * @return 1: all fans are stopped. 0: else. - */ -static int fan_all_disabled(void) -{ - int ch; - - for (ch = 0; ch < fan_get_count(); ch++) - if (fan_status[ch].auto_status != FAN_STATUS_STOPPED) - return 0; - return 1; -} - -/** - * Adjust fan duty by difference between target and actual rpm - * - * @param ch operation channel - * @param rpm_diff difference between target and actual rpm - * @param duty current fan duty - */ -static void fan_adjust_duty(int ch, int rpm_diff, int duty) -{ - int duty_step = 0; - - /* Find suitable duty step */ - if (ABS(rpm_diff) >= 2000) - duty_step = 20; - else if (ABS(rpm_diff) >= 1000) - duty_step = 10; - else if (ABS(rpm_diff) >= 500) - duty_step = 5; - else if (ABS(rpm_diff) >= 250) - duty_step = 3; - else - duty_step = 1; - - /* Adjust fan duty step by step */ - if (rpm_diff > 0) - duty = MIN(duty + duty_step, 100); - else - duty = MAX(duty - duty_step, 1); - - fan_set_duty(ch, duty); - - LOG_DBG("fan%d: duty %d, rpm_diff %d", ch, duty, rpm_diff); -} - -/** - * Smart fan control function. - * - * The function sets the pwm duty to reach the target rpm - * - * @param ch operation channel - * @param rpm_actual actual operation rpm value - * @param rpm_target target operation rpm value - * @return current fan control status - */ -enum fan_status fan_smart_control(int ch, int rpm_actual, int rpm_target) -{ - int duty, rpm_diff; - - /* wait rpm is stable */ - if (ABS(rpm_actual - rpm_pre[ch]) > RPM_MARGIN(rpm_actual)) { - rpm_pre[ch] = rpm_actual; - return FAN_STATUS_CHANGING; - } - - /* Record previous rpm */ - rpm_pre[ch] = rpm_actual; - - /* Adjust PWM duty */ - rpm_diff = rpm_target - rpm_actual; - duty = fan_get_duty(ch); - if (duty == 0 && rpm_target == 0) - return FAN_STATUS_STOPPED; - - /* Increase PWM duty */ - if (rpm_diff > RPM_MARGIN(rpm_target)) { - if (duty == 100) - return FAN_STATUS_FRUSTRATED; - - fan_adjust_duty(ch, rpm_diff, duty); - return FAN_STATUS_CHANGING; - /* Decrease PWM duty */ - } else if (rpm_diff < -RPM_MARGIN(rpm_target)) { - if (duty == 1 && rpm_target != 0) - return FAN_STATUS_FRUSTRATED; - - fan_adjust_duty(ch, rpm_diff, duty); - return FAN_STATUS_CHANGING; - } - - return FAN_STATUS_LOCKED; -} - -void fan_tick_func(void) -{ - int ch; - - for (ch = 0; ch < FAN_CH_COUNT; ch++) { - volatile struct fan_status_t *p_status = fan_status + ch; - /* Make sure rpm mode is enabled */ - if (p_status->current_fan_mode != FAN_RPM) { - /* Fan in duty mode still want rpm_actual being updated. - */ - if (p_status->flags & FAN_USE_RPM_MODE) { - p_status->rpm_actual = fan_rpm(ch); - if (p_status->rpm_actual > 0) - p_status->auto_status = - FAN_STATUS_LOCKED; - else - p_status->auto_status = - FAN_STATUS_STOPPED; - continue; - } else { - if (fan_get_duty(ch) > 0) - p_status->auto_status = - FAN_STATUS_LOCKED; - else - p_status->auto_status = - FAN_STATUS_STOPPED; - } - continue; - } - if (!fan_get_enabled(ch)) - continue; - /* Get actual rpm */ - p_status->rpm_actual = fan_rpm(ch); - /* Do smart fan stuff */ - p_status->auto_status = fan_smart_control( - ch, p_status->rpm_actual, p_status->rpm_target); - } -} -DECLARE_HOOK(HOOK_TICK, fan_tick_func, HOOK_PRIO_DEFAULT); - -int fan_get_duty(int ch) -{ - enum pwm_channel pwm_id = fan_control[ch].pwm_id; - - /* Return percent */ - return pwm_get_duty(pwm_id); -} - -int fan_get_rpm_mode(int ch) -{ - return fan_status[ch].current_fan_mode == FAN_RPM ? 1 : 0; -} - -void fan_set_rpm_mode(int ch, int rpm_mode) -{ - if (rpm_mode && (fan_status[ch].flags & FAN_USE_RPM_MODE)) - fan_status[ch].current_fan_mode = FAN_RPM; - else - fan_status[ch].current_fan_mode = FAN_DUTY; -} - -int fan_get_rpm_actual(int ch) -{ - /* Check PWM is enabled first */ - if (fan_get_duty(ch) == 0) - return 0; - - LOG_DBG("fan %d: get actual rpm = %d", ch, fan_status[ch].rpm_actual); - return fan_status[ch].rpm_actual; -} - -int fan_get_enabled(int ch) -{ - enum pwm_channel pwm_id = fan_control[ch].pwm_id; - - return pwm_get_enabled(pwm_id); -} - -void fan_set_enabled(int ch, int enabled) -{ - enum pwm_channel pwm_id = fan_control[ch].pwm_id; - - if (!enabled) - fan_status[ch].auto_status = FAN_STATUS_STOPPED; - pwm_enable(pwm_id, enabled); -} - -void fan_channel_setup(int ch, unsigned int flags) -{ - volatile struct fan_status_t *p_status = fan_status + ch; - - if (flags & FAN_USE_RPM_MODE) { - DT_FOREACH_CHILD(DT_INST(0, named_fans), TACHO_DEV_INIT) - } - - p_status->flags = flags; - /* Set default fan states */ - p_status->current_fan_mode = FAN_DUTY; - p_status->auto_status = FAN_STATUS_STOPPED; -} - -void fan_set_duty(int ch, int percent) -{ - enum pwm_channel pwm_id = fan_control[ch].pwm_id; - - /* duty is zero */ - if (!percent) { - fan_status[ch].auto_status = FAN_STATUS_STOPPED; - if (fan_all_disabled()) - enable_sleep(SLEEP_MASK_FAN); - } else - disable_sleep(SLEEP_MASK_FAN); - - /* Set the duty cycle of PWM */ - pwm_set_duty(pwm_id, percent); -} - -int fan_get_rpm_target(int ch) -{ - return fan_status[ch].rpm_target; -} - -enum fan_status fan_get_status(int ch) -{ - return fan_status[ch].auto_status; -} - -void fan_set_rpm_target(int ch, int rpm) -{ - if (rpm == 0) { - /* If rpm = 0, disable PWM immediately. Why?*/ - fan_set_duty(ch, 0); - } else { - /* This is the counterpart of disabling PWM above. */ - if (!fan_get_enabled(ch)) - fan_set_enabled(ch, 1); - if (rpm > fans[ch].rpm->rpm_max) - rpm = fans[ch].rpm->rpm_max; - else if (rpm < fans[ch].rpm->rpm_min) - rpm = fans[ch].rpm->rpm_min; - } - - /* Set target rpm */ - fan_status[ch].rpm_target = rpm; - LOG_DBG("fan %d: set target rpm = %d", ch, fan_status[ch].rpm_target); -} - -int fan_is_stalled(int ch) -{ - int is_pgood = 1; - - if (gpio_is_implemented(fans[ch].conf->enable_gpio)) - is_pgood = gpio_get_level(fans[ch].conf->enable_gpio); - - return fan_get_enabled(ch) && fan_get_duty(ch) && - !fan_get_rpm_actual(ch) && is_pgood; -} diff --git a/zephyr/shim/src/flash.c b/zephyr/shim/src/flash.c deleted file mode 100644 index b72d7b5763..0000000000 --- a/zephyr/shim/src/flash.c +++ /dev/null @@ -1,150 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <flash.h> -#include <kernel.h> -#include <logging/log.h> - -#include "console.h" -#include "drivers/cros_flash.h" -#include "registers.h" -#include "task.h" -#include "util.h" - -LOG_MODULE_REGISTER(shim_flash, LOG_LEVEL_ERR); - -#define CROS_FLASH_DEV DT_LABEL(DT_NODELABEL(fiu0)) -static const struct device *cros_flash_dev; - -K_MUTEX_DEFINE(flash_lock); - -/* TODO(b/174873770): Add calls to Zephyr code here */ -#ifdef CONFIG_EXTERNAL_STORAGE -void crec_flash_lock_mapped_storage(int lock) -{ - if (lock) - mutex_lock(&flash_lock); - else - mutex_unlock(&flash_lock); -} -#endif - -int crec_flash_physical_write(int offset, int size, const char *data) -{ - int rv; - - /* Fail if offset, size, and data aren't at least word-aligned */ - if ((offset | size | (uint32_t)(uintptr_t)data) & - (CONFIG_FLASH_WRITE_SIZE - 1)) - return EC_ERROR_INVAL; - - /* Lock physical flash operations */ - crec_flash_lock_mapped_storage(1); - - rv = cros_flash_physical_write(cros_flash_dev, offset, size, data); - - /* Unlock physical flash operations */ - crec_flash_lock_mapped_storage(0); - - return rv; -} - -int crec_flash_physical_erase(int offset, int size) -{ - int rv; - - /* Lock physical flash operations */ - crec_flash_lock_mapped_storage(1); - - rv = cros_flash_physical_erase(cros_flash_dev, offset, size); - - /* Unlock physical flash operations */ - crec_flash_lock_mapped_storage(0); - - return rv; -} - -int crec_flash_physical_get_protect(int bank) -{ - return cros_flash_physical_get_protect(cros_flash_dev, bank); -} - -uint32_t crec_flash_physical_get_protect_flags(void) -{ - return cros_flash_physical_get_protect_flags(cros_flash_dev); -} - -int crec_flash_physical_protect_at_boot(uint32_t new_flags) -{ - return cros_flash_physical_protect_at_boot(cros_flash_dev, new_flags); -} - -int crec_flash_physical_protect_now(int all) -{ - return cros_flash_physical_protect_now(cros_flash_dev, all); -} - -int crec_flash_physical_read(int offset, int size, char *data) -{ - int rv; - - /* Lock physical flash operations */ - crec_flash_lock_mapped_storage(1); - rv = cros_flash_physical_read(cros_flash_dev, offset, size, data); - - /* Unlock physical flash operations */ - crec_flash_lock_mapped_storage(0); - - return rv; -} - -static int flash_dev_init(const struct device *unused) -{ - ARG_UNUSED(unused); - - cros_flash_dev = device_get_binding(CROS_FLASH_DEV); - if (!cros_flash_dev) { - LOG_ERR("Fail to find %s", CROS_FLASH_DEV); - return -ENODEV; - } - cros_flash_init(cros_flash_dev); - - return 0; -} - -uint32_t crec_flash_physical_get_valid_flags(void) -{ - return EC_FLASH_PROTECT_RO_AT_BOOT | EC_FLASH_PROTECT_RO_NOW | - EC_FLASH_PROTECT_ALL_NOW; -} - -uint32_t crec_flash_physical_get_writable_flags(uint32_t cur_flags) -{ - uint32_t ret = 0; - - /* If RO protection isn't enabled, its at-boot state can be changed. */ - if (!(cur_flags & EC_FLASH_PROTECT_RO_NOW)) - ret |= EC_FLASH_PROTECT_RO_AT_BOOT; - - /* - * If entire flash isn't protected at this boot, it can be enabled if - * the WP GPIO is asserted. - */ - if (!(cur_flags & EC_FLASH_PROTECT_ALL_NOW) && - (cur_flags & EC_FLASH_PROTECT_GPIO_ASSERTED)) - ret |= EC_FLASH_PROTECT_ALL_NOW; - - return ret; -} - -/* - * The priority flash_dev_init should be lower than GPIO initialization because - * it calls gpio_get_level function. - */ -#if CONFIG_PLATFORM_EC_FLASH_INIT_PRIORITY <= \ - CONFIG_PLATFORM_EC_GPIO_INIT_PRIORITY -#error "Flash must be initialized after GPIOs" -#endif -SYS_INIT(flash_dev_init, POST_KERNEL, CONFIG_PLATFORM_EC_FLASH_INIT_PRIORITY); diff --git a/zephyr/shim/src/gpio.c b/zephyr/shim/src/gpio.c deleted file mode 100644 index 2bae272361..0000000000 --- a/zephyr/shim/src/gpio.c +++ /dev/null @@ -1,441 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <device.h> -#include <init.h> -#include <kernel.h> -#include <logging/log.h> - -#include "gpio.h" -#include "gpio/gpio.h" -#include "sysjump.h" -#include "cros_version.h" - -LOG_MODULE_REGISTER(gpio_shim, LOG_LEVEL_ERR); - -/* - * Static information about each GPIO that is configured in the named_gpios - * device tree node. - */ -struct gpio_config { - /* GPIO net name */ - const char *name; - /* Set at build time for lookup */ - const struct device *dev; - /* Bit number of pin within device */ - gpio_pin_t pin; - /* From DTS, excludes interrupts flags */ - gpio_flags_t init_flags; -}; - -#define GPIO_CONFIG(id) \ - COND_CODE_1( \ - DT_NODE_HAS_PROP(id, enum_name), \ - ( \ - { \ - .name = DT_LABEL(id), \ - .dev = DEVICE_DT_GET(DT_PHANDLE(id, gpios)), \ - .pin = DT_GPIO_PIN(id, gpios), \ - .init_flags = DT_GPIO_FLAGS(id, gpios), \ - }, ), \ - ()) -static const struct gpio_config configs[] = { -#if DT_NODE_EXISTS(DT_PATH(named_gpios)) - DT_FOREACH_CHILD(DT_PATH(named_gpios), GPIO_CONFIG) -#endif -}; - -/* Runtime information for each GPIO that is configured in named_gpios */ -struct gpio_data { - /* Runtime device for gpio port. Set during in init function */ - const struct device *dev; -}; - -#define GPIO_DATA(id) COND_CODE_1(DT_NODE_HAS_PROP(id, enum_name), ({}, ), ()) -static struct gpio_data data[] = { -#if DT_NODE_EXISTS(DT_PATH(named_gpios)) - DT_FOREACH_CHILD(DT_PATH(named_gpios), GPIO_DATA) -#endif -}; - -/* Maps platform/ec gpio callback information */ -struct gpio_signal_callback { - /* The platform/ec gpio_signal */ - const enum gpio_signal signal; - /* IRQ handler from platform/ec code */ - void (*const irq_handler)(enum gpio_signal signal); - /* Interrupt-related gpio flags */ - const gpio_flags_t flags; -}; - -/* - * Each zephyr project should define EC_CROS_GPIO_INTERRUPTS in their gpio_map.h - * file if there are any interrupts that should be registered. The - * corresponding handler will be declared here, which will prevent - * needing to include headers with complex dependencies in gpio_map.h. - * - * EC_CROS_GPIO_INTERRUPTS is a space-separated list of GPIO_INT items. - */ - -/* - * Validate interrupt flags are valid for the Zephyr GPIO driver. - */ -#define IS_GPIO_INTERRUPT_FLAG(flag, mask) ((flag & mask) == mask) -#define VALID_GPIO_INTERRUPT_FLAG(flag) \ - (IS_GPIO_INTERRUPT_FLAG(flag, GPIO_INT_EDGE_RISING) || \ - IS_GPIO_INTERRUPT_FLAG(flag, GPIO_INT_EDGE_FALLING) || \ - IS_GPIO_INTERRUPT_FLAG(flag, GPIO_INT_EDGE_BOTH) || \ - IS_GPIO_INTERRUPT_FLAG(flag, GPIO_INT_LEVEL_LOW) || \ - IS_GPIO_INTERRUPT_FLAG(flag, GPIO_INT_LEVEL_HIGH) || \ - IS_GPIO_INTERRUPT_FLAG(flag, GPIO_INT_EDGE_TO_INACTIVE) || \ - IS_GPIO_INTERRUPT_FLAG(flag, GPIO_INT_EDGE_TO_ACTIVE) || \ - IS_GPIO_INTERRUPT_FLAG(flag, GPIO_INT_LEVEL_INACTIVE) || \ - IS_GPIO_INTERRUPT_FLAG(flag, GPIO_INT_LEVEL_ACTIVE)) - -#define GPIO_INT(sig, f, cb) \ - BUILD_ASSERT(VALID_GPIO_INTERRUPT_FLAG(f), \ - STRINGIFY(sig) " is not using Zephyr interrupt flags"); -#ifdef EC_CROS_GPIO_INTERRUPTS -EC_CROS_GPIO_INTERRUPTS -#endif -#undef GPIO_INT - -/* - * Create unique enum values for each GPIO_INT entry, which also sets - * the ZEPHYR_GPIO_INT_COUNT value. - */ -#define ZEPHYR_GPIO_INT_ID(sig) INT_##sig -#define GPIO_INT(sig, f, cb) ZEPHYR_GPIO_INT_ID(sig), -enum zephyr_gpio_int_id { -#ifdef EC_CROS_GPIO_INTERRUPTS - EC_CROS_GPIO_INTERRUPTS -#endif - ZEPHYR_GPIO_INT_COUNT, -}; -#undef GPIO_INT - -/* Create prototypes for each GPIO IRQ handler */ -#define GPIO_INT(sig, f, cb) void cb(enum gpio_signal signal); -#ifdef EC_CROS_GPIO_INTERRUPTS -EC_CROS_GPIO_INTERRUPTS -#endif -#undef GPIO_INT - -/* - * The Zephyr gpio_callback data needs to be updated at runtime, so allocate - * into uninitialized data (BSS). The constant data pulled from - * EC_CROS_GPIO_INTERRUPTS is stored separately in the gpio_interrupts[] array. - */ -static struct gpio_callback zephyr_gpio_callbacks[ZEPHYR_GPIO_INT_COUNT]; - -#define ZEPHYR_GPIO_CALLBACK_TO_INDEX(cb) \ - (int)(((int)(cb) - (int)&zephyr_gpio_callbacks) / \ - sizeof(struct gpio_callback)) - -#define GPIO_INT(sig, f, cb) \ - { \ - .signal = sig, \ - .flags = f, \ - .irq_handler = cb, \ - }, -const static struct gpio_signal_callback - gpio_interrupts[ZEPHYR_GPIO_INT_COUNT] = { -#ifdef EC_CROS_GPIO_INTERRUPTS - EC_CROS_GPIO_INTERRUPTS -#endif -#undef GPIO_INT - }; - -/* The single zephyr gpio handler that routes to appropriate platform/ec cb */ -static void gpio_handler_shim(const struct device *port, - struct gpio_callback *cb, gpio_port_pins_t pins) -{ - int callback_index = ZEPHYR_GPIO_CALLBACK_TO_INDEX(cb); - const struct gpio_signal_callback *const gpio = - &gpio_interrupts[callback_index]; - - /* Call the platform/ec gpio interrupt handler */ - gpio->irq_handler(gpio->signal); -} - -/** - * get_interrupt_from_signal() - Translate a gpio_signal to the - * corresponding gpio_signal_callback - * - * @signal The signal to convert. - * - * Return: A pointer to the corresponding entry in gpio_interrupts, or - * NULL if one does not exist. - */ -const static struct gpio_signal_callback * -get_interrupt_from_signal(enum gpio_signal signal) -{ - if (!gpio_is_implemented(signal)) - return NULL; - - for (size_t i = 0; i < ARRAY_SIZE(gpio_interrupts); i++) { - if (gpio_interrupts[i].signal == signal) - return &gpio_interrupts[i]; - } - - LOG_ERR("No interrupt defined for GPIO %s", configs[signal].name); - return NULL; -} - -int gpio_is_implemented(enum gpio_signal signal) -{ - return signal >= 0 && signal < ARRAY_SIZE(configs); -} - -int gpio_get_level(enum gpio_signal signal) -{ - if (!gpio_is_implemented(signal)) - return 0; - - const int l = gpio_pin_get_raw(data[signal].dev, configs[signal].pin); - - if (l < 0) { - LOG_ERR("Cannot read %s (%d)", configs[signal].name, l); - return 0; - } - return l; -} - -int gpio_get_ternary(enum gpio_signal signal) -{ - int pd, pu; - int flags = gpio_get_default_flags(signal); - - /* Read GPIO with internal pull-down */ - gpio_set_flags(signal, GPIO_INPUT | GPIO_PULL_DOWN); - pd = gpio_get_level(signal); - udelay(100); - - /* Read GPIO with internal pull-up */ - gpio_set_flags(signal, GPIO_INPUT | GPIO_PULL_UP); - pu = gpio_get_level(signal); - udelay(100); - - /* Reset GPIO flags */ - gpio_set_flags(signal, flags); - - /* Check PU and PD readings to determine tristate */ - return pu && !pd ? 2 : pd; -} - -const char *gpio_get_name(enum gpio_signal signal) -{ - if (!gpio_is_implemented(signal)) - return "UNIMPLEMENTED"; - - return configs[signal].name; -} - -void gpio_set_level(enum gpio_signal signal, int value) -{ - if (!gpio_is_implemented(signal)) - return; - - int rv = gpio_pin_set_raw(data[signal].dev, configs[signal].pin, value); - - if (rv < 0) { - LOG_ERR("Cannot write %s (%d)", configs[signal].name, rv); - } -} - -void gpio_set_level_verbose(enum console_channel channel, - enum gpio_signal signal, int value) -{ - cprints(channel, "Set %s: %d", gpio_get_name(signal), value); - gpio_set_level(signal, value); -} - -/* GPIO flags which are the same in Zephyr and this codebase */ -#define GPIO_CONVERSION_SAME_BITS \ - (GPIO_OPEN_DRAIN | GPIO_PULL_UP | GPIO_PULL_DOWN | GPIO_INPUT | \ - GPIO_OUTPUT) - -static int convert_from_zephyr_flags(const gpio_flags_t zephyr) -{ - /* Start out with the bits that are the same. */ - int ec_flags = zephyr & GPIO_CONVERSION_SAME_BITS; - gpio_flags_t unhandled_flags = zephyr & ~GPIO_CONVERSION_SAME_BITS; - - /* TODO(b/173789980): handle conversion of more bits? */ - if (unhandled_flags) { - LOG_WRN("Unhandled GPIO bits in zephyr->ec conversion: 0x%08X", - unhandled_flags); - } - - return ec_flags; -} - -static gpio_flags_t convert_to_zephyr_flags(int ec_flags) -{ - /* Start out with the bits that are the same. */ - gpio_flags_t zephyr_flags = ec_flags & GPIO_CONVERSION_SAME_BITS; - int unhandled_flags = ec_flags & ~GPIO_CONVERSION_SAME_BITS; - - /* TODO(b/173789980): handle conversion of more bits? */ - if (unhandled_flags) { - LOG_WRN("Unhandled GPIO bits in ec->zephyr conversion: 0x%08X", - unhandled_flags); - } - - return zephyr_flags; -} - -int gpio_get_default_flags(enum gpio_signal signal) -{ - if (!gpio_is_implemented(signal)) - return 0; - - return convert_from_zephyr_flags(configs[signal].init_flags); -} - -static int init_gpios(const struct device *unused) -{ - gpio_flags_t flags; - struct jump_data *jdata; - bool is_sys_jumped; - - ARG_UNUSED(unused); - - jdata = get_jump_data(); - - if (jdata && jdata->magic == JUMP_DATA_MAGIC) - is_sys_jumped = true; - else - is_sys_jumped = false; - - /* Loop through all GPIOs in device tree to set initial configuration */ - for (size_t i = 0; i < ARRAY_SIZE(configs); ++i) { - data[i].dev = configs[i].dev; - int rv; - - if (!device_is_ready(data[i].dev)) - LOG_ERR("Not found (%s)", configs[i].name); - - /* - * The configs[i].init_flags variable is read-only, so the - * following assignment is needed because the flags need - * adjusting on a warm reboot. - */ - flags = configs[i].init_flags; - - if (is_sys_jumped) { - flags &= - ~(GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH); - } - - rv = gpio_pin_configure(data[i].dev, configs[i].pin, flags); - if (rv < 0) { - LOG_ERR("Config failed %s (%d)", configs[i].name, rv); - } - } - - /* - * Loop through all interrupt pins and set their callback. - */ - for (size_t i = 0; i < ARRAY_SIZE(gpio_interrupts); ++i) { - const enum gpio_signal signal = gpio_interrupts[i].signal; - int rv; - - if (signal == GPIO_UNIMPLEMENTED) - continue; - - gpio_init_callback(&zephyr_gpio_callbacks[i], gpio_handler_shim, - BIT(configs[signal].pin)); - rv = gpio_add_callback(data[signal].dev, - &zephyr_gpio_callbacks[i]); - - if (rv < 0) { - LOG_ERR("Callback reg failed %s (%d)", - configs[signal].name, rv); - continue; - } - } - - /* Configure unused pins in chip driver for better power consumption */ - if (gpio_config_unused_pins) { - int rv; - - rv = gpio_config_unused_pins(); - if (rv < 0) { - return rv; - } - } - - return 0; -} -#if CONFIG_PLATFORM_EC_GPIO_INIT_PRIORITY <= CONFIG_KERNEL_INIT_PRIORITY_DEFAULT -#error "GPIOs must initialize after the kernel default initialization" -#endif -SYS_INIT(init_gpios, POST_KERNEL, CONFIG_PLATFORM_EC_GPIO_INIT_PRIORITY); - -int gpio_enable_interrupt(enum gpio_signal signal) -{ - int rv; - const struct gpio_signal_callback *interrupt; - - interrupt = get_interrupt_from_signal(signal); - - if (!interrupt) - return -1; - - /* - * Config interrupt flags (e.g. INT_EDGE_BOTH) & enable interrupt - * together. - */ - rv = gpio_pin_interrupt_configure(data[signal].dev, configs[signal].pin, - (interrupt->flags | GPIO_INT_ENABLE) & - ~GPIO_INT_DISABLE); - if (rv < 0) { - LOG_ERR("Failed to enable interrupt on %s (%d)", - configs[signal].name, rv); - } - - return rv; -} - -int gpio_disable_interrupt(enum gpio_signal signal) -{ - int rv; - - if (!gpio_is_implemented(signal)) - return -1; - - rv = gpio_pin_interrupt_configure(data[signal].dev, configs[signal].pin, - GPIO_INT_DISABLE); - if (rv < 0) { - LOG_ERR("Failed to disable interrupt on %s (%d)", - configs[signal].name, rv); - } - - return rv; -} - -void gpio_reset(enum gpio_signal signal) -{ - if (!gpio_is_implemented(signal)) - return; - - gpio_pin_configure(data[signal].dev, configs[signal].pin, - configs[signal].init_flags); -} - -void gpio_set_flags(enum gpio_signal signal, int flags) -{ - if (!gpio_is_implemented(signal)) - return; - - gpio_pin_configure(data[signal].dev, configs[signal].pin, - convert_to_zephyr_flags(flags)); -} - -int signal_is_gpio(int signal) -{ - return true; -} diff --git a/zephyr/shim/src/gpio_id.c b/zephyr/shim/src/gpio_id.c deleted file mode 100644 index 1dddac2c88..0000000000 --- a/zephyr/shim/src/gpio_id.c +++ /dev/null @@ -1,73 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <devicetree.h> -#include "gpio.h" -#include "util.h" - -#define IS_BOARD_COMPATIBLE \ - DT_NODE_HAS_COMPAT(DT_PATH(board), cros_ec_gpio_id) -#define IS_SKU_COMPATIBLE \ - DT_NODE_HAS_COMPAT(DT_PATH(sku), cros_ec_gpio_id) - -#define CONVERT_NUMERAL_SYSTEM_EVAL(system, bits, nbits) \ - system##_from_bits(bits, nbits) -#define CONVERT_NUMERAL_SYSTEM(system, bits, nbits) \ - CONVERT_NUMERAL_SYSTEM_EVAL(system, bits, nbits) - -#define READ_PIN_FROM_PHANDLE(node_id, prop, idx) \ - gpio_get_ternary(GPIO_SIGNAL(DT_PHANDLE_BY_IDX(node_id, prop, idx))), - -#if DT_NODE_EXISTS(DT_PATH(sku)) && IS_SKU_COMPATIBLE - -__override uint32_t board_get_sku_id(void) -{ - static uint32_t sku_id = (uint32_t)-1; - - if (sku_id == (uint32_t)-1) { - int bits[] = { - DT_FOREACH_PROP_ELEM(DT_PATH(sku), - bits, - READ_PIN_FROM_PHANDLE) - }; - - if (sizeof(bits) == 0) - return (uint32_t)-1; - - sku_id = CONVERT_NUMERAL_SYSTEM(DT_STRING_TOKEN(DT_PATH(sku), - system), - bits, ARRAY_SIZE(bits)); - } - - return sku_id; -} - -#endif - -#if DT_NODE_EXISTS(DT_PATH(board)) && IS_BOARD_COMPATIBLE - -__override int board_get_version(void) -{ - static int board_version = -1; - - if (board_version == -1) { - int bits[] = { - DT_FOREACH_PROP_ELEM(DT_PATH(board), - bits, - READ_PIN_FROM_PHANDLE) - }; - - if (sizeof(bits) == 0) - return -1; - - board_version = CONVERT_NUMERAL_SYSTEM( - DT_STRING_TOKEN(DT_PATH(board), system), bits, - ARRAY_SIZE(bits)); - } - - return board_version; -} - -#endif diff --git a/zephyr/shim/src/hooks.c b/zephyr/shim/src/hooks.c deleted file mode 100644 index 79a611812f..0000000000 --- a/zephyr/shim/src/hooks.c +++ /dev/null @@ -1,122 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <kernel.h> -#include <zephyr.h> - -#include "common.h" -#include "console.h" -#include "ec_tasks.h" -#include "hooks.h" -#include "task.h" -#include "timer.h" - -int hook_call_deferred(const struct deferred_data *data, int us) -{ - struct k_work_delayable *work = data->work; - int rv = 0; - - if (us == -1) { - k_work_cancel_delayable(work); - } else if (us >= 0) { - rv = k_work_reschedule(work, K_USEC(us)); - if (rv == -EINVAL) { - /* Already processing or completed. */ - return 0; - } else if (rv < 0) { - cprints(CC_HOOK, - "Warning: deferred call not submitted, " - "deferred_data=0x%pP, err=%d", - data, rv); - } - } else { - return EC_ERROR_PARAM2; - } - - return rv; -} - -static struct zephyr_shim_hook_list *hook_registry[HOOK_TYPE_COUNT]; - -static int zephyr_shim_setup_hooks(const struct device *unused) -{ - STRUCT_SECTION_FOREACH(zephyr_shim_hook_list, entry) { - struct zephyr_shim_hook_list **loc = &hook_registry[entry->type]; - - /* Find the correct place to put the entry in the registry. */ - while (*loc && (*loc)->priority < entry->priority) - loc = &((*loc)->next); - - entry->next = *loc; - - /* Insert the entry. */ - *loc = entry; - } - - return 0; -} - -SYS_INIT(zephyr_shim_setup_hooks, APPLICATION, 1); - -void hook_notify(enum hook_type type) -{ - struct zephyr_shim_hook_list *p; - - for (p = hook_registry[type]; p; p = p->next) - p->routine(); -} - -static void check_hook_task_priority(k_tid_t thread) -{ - /* - * Numerically lower priorities take precedence, so verify the hook - * related threads cannot preempt any of the shimmed tasks. - */ - if (k_thread_priority_get(thread) < (TASK_ID_COUNT - 1)) - cprintf(CC_HOOK, - "ERROR: %s has priority %d but must be >= %d\n", - k_thread_name_get(thread), - k_thread_priority_get(thread), (TASK_ID_COUNT - 1)); -} - -void hook_task(void *u) -{ - /* Periodic hooks will be called first time through the loop */ - static uint64_t last_second = -SECOND; - static uint64_t last_tick = -HOOK_TICK_INTERVAL; - - /* - * Verify deferred routines are run at the lowest priority. - */ - check_hook_task_priority(&k_sys_work_q.thread); - check_hook_task_priority(k_current_get()); - - while (1) { - uint64_t t = get_time().val; - int next = 0; - - if (t - last_tick >= HOOK_TICK_INTERVAL) { - hook_notify(HOOK_TICK); - last_tick = t; - } - - if (t - last_second >= SECOND) { - hook_notify(HOOK_SECOND); - last_second = t; - } - - /* Calculate when next tick needs to occur */ - t = get_time().val; - if (last_tick + HOOK_TICK_INTERVAL > t) - next = last_tick + HOOK_TICK_INTERVAL - t; - - /* - * Sleep until next tick, unless we've already exceeded - * HOOK_TICK_INTERVAL. - */ - if (next > 0) - task_wait_event(next); - } -} diff --git a/zephyr/shim/src/host_command.c b/zephyr/shim/src/host_command.c deleted file mode 100644 index bf863b48de..0000000000 --- a/zephyr/shim/src/host_command.c +++ /dev/null @@ -1,16 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "host_command.h" - -struct host_command *zephyr_find_host_command(int command) -{ - STRUCT_SECTION_FOREACH(host_command, cmd) { - if (cmd->command == command) - return cmd; - } - - return NULL; -} diff --git a/zephyr/shim/src/hwtimer.c b/zephyr/shim/src/hwtimer.c deleted file mode 100644 index 85c72c5c59..0000000000 --- a/zephyr/shim/src/hwtimer.c +++ /dev/null @@ -1,29 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <kernel.h> -#include <stdint.h> -#include <zephyr.h> - -#include "hwtimer.h" - -uint64_t __hw_clock_source_read64(void) -{ - return k_ticks_to_us_floor64(k_uptime_ticks()); -} - -uint32_t __hw_clock_event_get(void) -{ - /* - * CrOS EC event deadlines don't quite make sense in Zephyr - * terms. Evaluate what to do about this later... - */ - return 0; -} - -void udelay(unsigned us) -{ - k_busy_wait(us); -} diff --git a/zephyr/shim/src/i2c.c b/zephyr/shim/src/i2c.c deleted file mode 100644 index 3dba7cde38..0000000000 --- a/zephyr/shim/src/i2c.c +++ /dev/null @@ -1,135 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <sys/util.h> - -#include "console.h" -#include "i2c.h" -#include "i2c/i2c.h" - -/* - * The named-i2c-ports node is required by the I2C shim - */ -#if !DT_NODE_EXISTS(DT_PATH(named_i2c_ports)) -#error I2C shim requires the named-i2c-ports node to be defined. -#endif - -/* - * Initialize device bindings in i2c_devices. - * This macro should be called from within DT_FOREACH_CHILD. - */ -#define INIT_DEV_BINDING(id) \ - [I2C_PORT(id)] = DEVICE_DT_GET(DT_PHANDLE(id, i2c_port)), - -#define INIT_REMOTE_PORTS(id) \ - [I2C_PORT(id)] = DT_PROP_OR(id, remote_port, -1), - -#define I2C_PORT_INIT(id) \ - { \ - .name = DT_LABEL(id), \ - .port = I2C_PORT(id), \ - }, -/* - * Long term we will not need these, for now they're needed to get things to - * build since these extern symbols are usually defined in - * board/${BOARD}/board.c. - * - * Since all the ports will eventually be handled by device tree. This will - * be removed at that point. - */ -const struct i2c_port_t i2c_ports[] = { - DT_FOREACH_CHILD(DT_PATH(named_i2c_ports), I2C_PORT_INIT) -}; -const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); -static const int i2c_remote_ports[I2C_PORT_COUNT] = { - DT_FOREACH_CHILD(DT_PATH(named_i2c_ports), INIT_REMOTE_PORTS) -}; -static int i2c_physical_ports[I2C_PORT_COUNT]; - -static const struct device *i2c_devices[I2C_PORT_COUNT] = { - DT_FOREACH_CHILD(DT_PATH(named_i2c_ports), INIT_DEV_BINDING) -}; - -static int init_device_bindings(const struct device *device) -{ - ARG_UNUSED(device); - - /* - * The EC application may lock the I2C bus for more than a single - * I2C transaction. Initialize the i2c_physical_ports[] array to map - * each named-i2c-ports child to the physical bus assignment. - * - * TODO(b/199918263): zephyr: Optimize I2C mutexes - * Modify the port_mutex[] array defined by i2c_controller.c - * so that only mutexes for unique physical ports are created to - * save space. - */ - i2c_physical_ports[0] = 0; - for (int child = 1; child < I2C_PORT_COUNT; child++) { - for (int phys_port = 0; phys_port < I2C_PORT_COUNT; - phys_port++) { - if (i2c_devices[child] == i2c_devices[phys_port]) { - i2c_physical_ports[child] = phys_port; - break; - } - } - } - return 0; -} -SYS_INIT(init_device_bindings, POST_KERNEL, 51); - -const struct device *i2c_get_device_for_port(const int port) -{ - if (port < 0 || port >= I2C_PORT_COUNT) - return NULL; - return i2c_devices[port]; -} - -int i2c_get_port_from_remote_port(int remote_port) -{ - for (int port = 0; port < I2C_PORT_COUNT; port++) { - if (i2c_remote_ports[port] == remote_port) - return port; - } - - /* - * Remote port is not defined, return 1:1 mapping to support TCPC - * firmware updates, which always query the EC for the correct I2C - * port number. - */ - return remote_port; -} - -int i2c_get_physical_port(int enum_port) -{ - int i2c_port = i2c_physical_ports[enum_port]; - - /* - * Return -1 for caller if physical port is not defined or the - * port number is out of port_mutex space. - * Please ensure the caller won't change anything if -1 received. - */ - return (i2c_port < I2C_PORT_COUNT) ? i2c_port : -1; -} - -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_I2C_PORTMAP -static int command_i2c_portmap(int argc, char **argv) -{ - int i; - - ccprintf("Zephyr physical I2C ports (%d):\n", I2C_PORT_COUNT); - for (i = 0; i < I2C_PORT_COUNT; i++) { - ccprintf(" %d : %d\n", i, i2c_physical_ports[i]); - } - ccprintf("Zephyr remote I2C ports (%d):\n", I2C_PORT_COUNT); - for (i = 0; i < I2C_PORT_COUNT; i++) { - ccprintf(" %d : %d\n", i, i2c_remote_ports[i]); - } - - return EC_RES_SUCCESS; -} -DECLARE_CONSOLE_COMMAND(i2c_portmap, command_i2c_portmap, NULL, - "Show I2C port mapping"); -#endif /* CONFIG_PLATFORM_EC_CONSOLE_CMD_I2C_PORTMAP */ diff --git a/zephyr/shim/src/keyboard_raw.c b/zephyr/shim/src/keyboard_raw.c deleted file mode 100644 index 8de585a78f..0000000000 --- a/zephyr/shim/src/keyboard_raw.c +++ /dev/null @@ -1,77 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Functions needed by keyboard scanner module for Chrome EC */ - -#include <device.h> -#include <logging/log.h> -#include <soc.h> -#include <zephyr.h> - -#include "drivers/cros_kb_raw.h" -#include "keyboard_raw.h" - -LOG_MODULE_REGISTER(shim_cros_kb_raw, LOG_LEVEL_ERR); - -#define CROS_KB_RAW_NODE DT_NODELABEL(cros_kb_raw) -static const struct device *cros_kb_raw_dev; - -/** - * Initialize the raw keyboard interface. - */ -void keyboard_raw_init(void) -{ - cros_kb_raw_dev = DEVICE_DT_GET(CROS_KB_RAW_NODE); - if (!device_is_ready(cros_kb_raw_dev)) { - LOG_ERR("Error: device %s is not ready", cros_kb_raw_dev->name); - return; - } - - LOG_INF("%s", __func__); - cros_kb_raw_init(cros_kb_raw_dev); -} - -/** - * Finish initialization after task scheduling has started. - */ -void keyboard_raw_task_start(void) -{ - keyboard_raw_enable_interrupt(1); -} - -/** - * Drive the specified column low. - */ -test_mockable void keyboard_raw_drive_column(int col) -{ - if (cros_kb_raw_dev) - cros_kb_raw_drive_column(cros_kb_raw_dev, col); - else - LOG_ERR("%s: no cros_kb_raw device!", __func__); -} - -/** - * Read raw row state. - * Bits are 1 if signal is present, 0 if not present. - */ -test_mockable int keyboard_raw_read_rows(void) -{ - if (cros_kb_raw_dev) - return cros_kb_raw_read_rows(cros_kb_raw_dev); - - LOG_ERR("%s: no cros_kb_raw device!", __func__); - return -EIO; -} - -/** - * Enable or disable keyboard interrupts. - */ -void keyboard_raw_enable_interrupt(int enable) -{ - if (cros_kb_raw_dev) - cros_kb_raw_enable_interrupt(cros_kb_raw_dev, enable); - else - LOG_ERR("%s: no cros_kb_raw device!", __func__); -} diff --git a/zephyr/shim/src/keyscan.c b/zephyr/shim/src/keyscan.c deleted file mode 100644 index fa8fb11dd2..0000000000 --- a/zephyr/shim/src/keyscan.c +++ /dev/null @@ -1,34 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#define DT_DRV_COMPAT cros_keyscan - -#include <assert.h> -#include <kernel.h> -#include <soc.h> - -#include "keyboard_scan.h" - -#if DT_NODE_EXISTS(DT_INST(0, cros_keyscan)) - -/* The keyboard matrix should have at least enough columns for the - * standard keyboard with no keypad. - */ -BUILD_ASSERT(DT_INST_PROP_LEN(0, actual_key_mask) >= KEYBOARD_COLS_NO_KEYPAD); - -/* - * Override the default keyscan_config if the board defines a - * cros-kb-raw-keyscan node. - */ -__override struct keyboard_scan_config keyscan_config = { - .output_settle_us = DT_INST_PROP(0, output_settle), - .debounce_down_us = DT_INST_PROP(0, debounce_down), - .debounce_up_us = DT_INST_PROP(0, debounce_up), - .scan_period_us = DT_INST_PROP(0, scan_period), - .min_post_scan_delay_us = DT_INST_PROP(0, min_post_scan_delay), - .poll_timeout_us = DT_INST_PROP(0, poll_timeout), - .actual_key_mask = DT_INST_PROP(0, actual_key_mask), -}; -#endif diff --git a/zephyr/shim/src/libgcc_arm.S b/zephyr/shim/src/libgcc_arm.S deleted file mode 100644 index ffdbefc675..0000000000 --- a/zephyr/shim/src/libgcc_arm.S +++ /dev/null @@ -1,11 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "../../third_party/libaeabi-cortexm0/core/cortex-m/ldivmod.S" -#include "../../third_party/libaeabi-cortexm0/core/cortex-m/uldivmod.S" - -exception_panic: - mov r0, #3 @ K_ERR_KERNEL_OOPS - b z_fatal_error diff --git a/zephyr/shim/src/mkbp_event.c b/zephyr/shim/src/mkbp_event.c deleted file mode 100644 index 39bcb001b8..0000000000 --- a/zephyr/shim/src/mkbp_event.c +++ /dev/null @@ -1,16 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "mkbp_event.h" - -const struct mkbp_event_source *zephyr_find_mkbp_event_source(uint8_t type) -{ - STRUCT_SECTION_FOREACH(mkbp_event_source, evtsrc) { - if (evtsrc->event_type == type) - return evtsrc; - } - - return NULL; -} diff --git a/zephyr/shim/src/motionsense_driver/bma255-drvinfo.inc b/zephyr/shim/src/motionsense_driver/bma255-drvinfo.inc deleted file mode 100644 index 7db46811ad..0000000000 --- a/zephyr/shim/src/motionsense_driver/bma255-drvinfo.inc +++ /dev/null @@ -1,44 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "driver/accel_bma2x2_public.h" - -/* - * CREATE_SENSOR_DATA which is defined in motionsense_sensors.c is - * the helper to create sensor driver specific data. - * - * CREATE_SENSOR_DATA gets two arguments. One is the compatible - * property value specified in device tree and the other one is the macro - * that actually creates sensor driver specific data. The macro gets - * node id and the name to be used for the sensor driver data. - */ - -/* - * Create driver data for each BMI260 drvinfo instance in device tree. - * (compatible = "cros-ec,drvdata-bma255") - */ -/* Declare BMA255 driver data */ -#define CREATE_SENSOR_DATA_BMA255(id, drvdata_name) \ - static struct accelgyro_saved_data_t drvdata_name; - -CREATE_SENSOR_DATA(cros_ec_drvdata_bma255, CREATE_SENSOR_DATA_BMA255) - -/* - * CREATE_MOTION_SENSOR which is defined in motionsense_sensors.c is - * the macro to create an entry in motion_sensors array. - * The macro gets value of compatible property of - * the sensor in device tree and sensor specific values like chip ID, - * type of sensor, name of driver, default min/max frequency. - * Then using the values, it creates the corresponding motion_sense_t entry - * in motion_sensors array. - */ - -/* - * Create a motion_sensor_t entry for each BMA255 - * instance(compatible = "cros-ec,bma255") in device tree. - */ -CREATE_MOTION_SENSOR(cros_ec_bma255, MOTIONSENSE_CHIP_BMA255, \ - MOTIONSENSE_TYPE_ACCEL, bma2x2_accel_drv, \ - BMA255_ACCEL_MIN_FREQ, BMA255_ACCEL_MAX_FREQ) diff --git a/zephyr/shim/src/motionsense_driver/bmi160-drvinfo.inc b/zephyr/shim/src/motionsense_driver/bmi160-drvinfo.inc deleted file mode 100644 index dd7b21641b..0000000000 --- a/zephyr/shim/src/motionsense_driver/bmi160-drvinfo.inc +++ /dev/null @@ -1,57 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "driver/accelgyro_bmi_common_public.h" -#include "driver/accelgyro_bmi160_public.h" - -/* - * CREATE_SENSOR_DATA which is defined in motionsense_sensros.c is - * the helper to create sensor driver specific data. - * - * CREATE_SENSOR_DATA gets two arguments. One is the compatible - * property value specified in device tree and the other one is the macro - * that actually creates sensor driver specific data. The macro gets - * node id and the name to be used for the sensor driver data. - */ - -/* - * Create driver data. It can be shared among the entries in - * motion_sensors array which are using the same bmi160 driver. - */ -#define CREATE_SENSOR_DATA_BMI160(id, drvdata_name) \ - static struct bmi_drv_data_t drvdata_name; - -/* - * Create driver data for each BMI160 drvinfo instance in device tree. - * (compatible = "cros-ec,drvdata-bmi160") - */ -CREATE_SENSOR_DATA(cros_ec_drvdata_bmi160, CREATE_SENSOR_DATA_BMI160) -/* - * CREATE_MOTION_SENSOR which is defined in motionsense_sensors.c is - * the macro to create an entry in motion_sensors array. - * The macro gets value of compatible property of - * the sensor in device tree and sensor specific values like chip ID, - * type of sensor, name of driver, default min/max frequency. - * Then using the values, it creates the corresponding motion_sense_t entry - * in motion_sensors array. - */ - -/* - * Here, we call CREATE_MOTION_SENSOR to create a motion_sensor_t entry - * for each BMI160_accel instance(compatible = "cros-ec,bmi160-accel") - * in device tree. - */ -CREATE_MOTION_SENSOR(cros_ec_bmi160_accel, MOTIONSENSE_CHIP_BMI160, \ - MOTIONSENSE_TYPE_ACCEL, bmi160_drv, \ - BMI_ACCEL_MIN_FREQ, BMI_ACCEL_MAX_FREQ) - -/* - * Here, we call CREATE_MOTION_SENSOR to create a motion_sensor_t entry - * for each BMI260_gyro instance (compatible = "cros-ec,bmi160-gyro") - * in device tree. - */ -CREATE_MOTION_SENSOR(cros_ec_bmi160_gyro, MOTIONSENSE_CHIP_BMI160, \ - MOTIONSENSE_TYPE_GYRO, bmi160_drv, \ - BMI_GYRO_MIN_FREQ, BMI_GYRO_MAX_FREQ) diff --git a/zephyr/shim/src/motionsense_driver/bmi260-drvinfo.inc b/zephyr/shim/src/motionsense_driver/bmi260-drvinfo.inc deleted file mode 100644 index 2457fca31a..0000000000 --- a/zephyr/shim/src/motionsense_driver/bmi260-drvinfo.inc +++ /dev/null @@ -1,57 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "driver/accelgyro_bmi_common_public.h" -#include "driver/accelgyro_bmi260_public.h" - -/* - * CREATE_SENSOR_DATA which is defined in motionsense_sensros.c is - * the helper to create sensor driver specific data. - * - * CREATE_SENSOR_DATA gets two arguments. One is the compatible - * property value specified in device tree and the other one is the macro - * that actually creates sensor driver specific data. The macro gets - * node id and the name to be used for the sensor driver data. - */ - -/* - * Create driver data. It can be shared among the entries in - * motion_sensors array which are using the same bmi260 driver. - */ -#define CREATE_SENSOR_DATA_BMI260(id, drvdata_name) \ - static struct bmi_drv_data_t drvdata_name; - -/* - * Create driver data for each BMI260 drvinfo instance in device tree. - * (compatible = "cros-ec,drvdata-bmi260") - */ -CREATE_SENSOR_DATA(cros_ec_drvdata_bmi260, CREATE_SENSOR_DATA_BMI260) -/* - * CREATE_MOTION_SENSOR which is defined in motionsense_sensros.c is - * the macro to create an entry in motion_sensors array. - * The macro gets value of compatible property of - * the sensor in device tree and sensor specific values like chip ID, - * type of sensor, name of driver, default min/max frequency. - * Then using the values, it creates the corresponding motion_sense_t entry - * in motion_sensors array. - */ - -/* - * Here, we call CREATE_MOTION_SENSOR to create a motion_sensor_t entry - * for each BMI260_accel instance(compatible = "cros-ec,bmi260-accel") - * in device tree. - */ -CREATE_MOTION_SENSOR(cros_ec_bmi260_accel, MOTIONSENSE_CHIP_BMI260, \ - MOTIONSENSE_TYPE_ACCEL, bmi260_drv, \ - BMI_ACCEL_MIN_FREQ, BMI_ACCEL_MAX_FREQ) - -/* - * Here, we call CREATE_MOTION_SENSOR to create a motion_sensor_t entry - * for each BMI260_gyro instance (compatible = "cros-ec,bmi260-gyro") - * in device tree. - */ -CREATE_MOTION_SENSOR(cros_ec_bmi260_gyro, MOTIONSENSE_CHIP_BMI260, \ - MOTIONSENSE_TYPE_GYRO, bmi260_drv, \ - BMI_GYRO_MIN_FREQ, BMI_GYRO_MAX_FREQ) diff --git a/zephyr/shim/src/motionsense_driver/drvdata-accelgyro.h b/zephyr/shim/src/motionsense_driver/drvdata-accelgyro.h deleted file mode 100644 index 069587f90f..0000000000 --- a/zephyr/shim/src/motionsense_driver/drvdata-accelgyro.h +++ /dev/null @@ -1,127 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * Macros are to help creating driver data. A driver data that uses - * any data structures defined in accelgyro.h should use the macros here - * to utilize the information in device tree. - * - */ -#ifndef __ZEPHYR_SHIM_SRC_MOTIONSENSE_DRIVER_DRVDATA_ACCELGYRO_H -#define __ZEPHYR_SHIM_SRC_MOTIONSENSE_DRIVER_DRVDATA_ACCELGYRO_H - -/* - * compatible = "cros-ec,accelgyro-als-channel-scale" - * als_channel_scale_t in accelgyro.h - * - * e.g) The following is the example in DT for als_channel_scale_t - * als-channel-scale { - * compatible = "cros-ec,accelgyro-als-channel-scale"; - * k-channel-scale = <1>; - * cover-scale = <1>; - * }; - */ -#define ACCELGYRO_ALS_CHANNEL_SCALE(id) \ - { \ - .k_channel_scale = \ - ALS_CHANNEL_SCALE(DT_PROP(id, k_channel_scale)),\ - .cover_scale = \ - ALS_CHANNEL_SCALE(DT_PROP(id, cover_scale)), \ - } - -#define ALS_CALIBRATION_CHANNEL_SCALE(id) \ - .als_cal.channel_scale = ACCELGYRO_ALS_CHANNEL_SCALE(id), - -#define ALS_CALIBRATION_SET(id) \ - .als_cal.scale = DT_PROP(id, scale), \ - .als_cal.uscale = DT_PROP(id, uscale), \ - .als_cal.offset = DT_PROP(id, offset), \ - ALS_CALIBRATION_CHANNEL_SCALE(DT_CHILD(id, als_channel_scale)) - -/* - * compatible = "cros-ec,accelgyro-als-drv-data" - * als_drv_data_t in accelgyro.h - * - * e.g) The following is the example in DT for als_drv_data_t - * als-drv-data { - * compatible = "cros-ec,accelgyro-als-drv-data"; - * als-cal { - * scale = <1>; - * uscale = <0>; - * offset = <0>; - * als-channel-scale { - * compatible = "cros-ec,accelgyro-als-channel-scale"; - * k-channel-scale = <1>; - * cover-scale = <1>; - * }; - * }; - * }; - */ -#define ACCELGYRO_ALS_DRV_DATA(id) \ - { \ - ALS_CALIBRATION_SET(DT_CHILD(id, als_cal)) \ - } - -#define RGB_CAL_RGB_SET_SCALE(id) \ - .scale = ACCELGYRO_ALS_CHANNEL_SCALE(id), - -#define RGB_CAL_RGB_SET_ONE(id, suffix) \ - .rgb_cal[suffix] = { \ - .offset = DT_PROP(id, offset), \ - .coeff[0] = FLOAT_TO_FP(DT_PROP_BY_IDX(id, coeff, 0)), \ - .coeff[1] = FLOAT_TO_FP(DT_PROP_BY_IDX(id, coeff, 1)), \ - .coeff[2] = FLOAT_TO_FP(DT_PROP_BY_IDX(id, coeff, 2)), \ - .coeff[3] = FLOAT_TO_FP(DT_PROP_BY_IDX(id, coeff, 3)), \ - RGB_CAL_RGB_SET_SCALE(DT_CHILD(id, als_channel_scale)) \ - }, - -/* - * compatible = "cros-ec,accelgyro-rgb-calibration" - * rgb_calibration_t in accelgyro.h - * - * e.g) The following is the example in DT for rgb_calibration_t - * rgb_calibration { - * compatible = "cros-ec,accelgyro-rgb-calibration"; - * - * irt = <1>; - * - * rgb-cal-x { - * offset = <0>; - * coeff = <0 0 0 0>; - * als-channel-scale { - * compatible = "cros-ec,accelgyro-als-channel-scale"; - * k-channel-scale = <1>; - * cover-scale = <1>; - * }; - * }; - * rgb-cal-y { - * offset = <0>; - * coeff = <0 0 0 0>; - * als-channel-scale { - * compatible = "cros-ec,accelgyro-als-channel-scale"; - * k-channel-scale = <1>; - * cover-scale = <1>; - * }; - * }; - * rgb-cal-z { - * offset = <0>; - * coeff = <0 0 0 0>; - * als-channel-scale { - * compatible = "cros-ec,accelgyro-als-channel-scale"; - * k-channel-scale = <1>; - * cover-scale = <1>; - * }; - * }; - * }; - */ -#define ACCELGYRO_RGB_CALIBRATION(id) \ - { \ - RGB_CAL_RGB_SET_ONE(DT_CHILD(id, rgb_cal_x), X) \ - RGB_CAL_RGB_SET_ONE(DT_CHILD(id, rgb_cal_y), Y) \ - RGB_CAL_RGB_SET_ONE(DT_CHILD(id, rgb_cal_z), Z) \ - .irt = INT_TO_FP(DT_PROP(id, irt)), \ - } - -#endif /* __ZEPHYR_SHIM_SRC_MOTIONSENSE_DRIVER_DRVDATA_ACCELGYRO_H */ diff --git a/zephyr/shim/src/motionsense_driver/kx022-drvinfo.inc b/zephyr/shim/src/motionsense_driver/kx022-drvinfo.inc deleted file mode 100644 index 800a9a1543..0000000000 --- a/zephyr/shim/src/motionsense_driver/kx022-drvinfo.inc +++ /dev/null @@ -1,44 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "driver/accel_kionix.h" - -/* - * CREATE_SENSOR_DATA which is defined in motionsense_sensors.c is - * the helper to create sensor driver specific data. - * - * CREATE_SENSOR_DATA gets two arguments. One is the compatible - * property value specified in device tree and the other one is the macro - * that actually creates sensor driver specific data. The macro gets - * node id and the name to be used for the sensor driver data. - */ - -/* - * Create driver data for each Kionix drvinfo instance in device tree. - * (compatible = "cros-ec,drvdata-kionix") - */ -/* Declare Kionix driver data */ -#define CREATE_SENSOR_DATA_KIONIX(id, drvdata_name) \ - static struct kionix_accel_data drvdata_name; - -CREATE_SENSOR_DATA(cros_ec_drvdata_kionix, CREATE_SENSOR_DATA_KIONIX) - -/* - * CREATE_MOTION_SENSOR which is defined in motionsense_sensors.c is - * the macro to create an entry in motion_sensors array. - * The macro gets value of compatible property of - * the sensor in device tree and sensor specific values like chip ID, - * type of sensor, name of driver, default min/max frequency. - * Then using the values, it creates the corresponding motion_sense_t entry - * in motion_sensors array. - */ - -/* - * Create a motion_sensor_t entry for each KX022 - * instance(compatible = "cros-ec,kx022") in device tree. - */ -CREATE_MOTION_SENSOR(cros_ec_kx022, MOTIONSENSE_CHIP_KX022, \ - MOTIONSENSE_TYPE_ACCEL, kionix_accel_drv, \ - KX022_ACCEL_MIN_FREQ, KX022_ACCEL_MAX_FREQ) diff --git a/zephyr/shim/src/motionsense_driver/lis2dw12-drvinfo.inc b/zephyr/shim/src/motionsense_driver/lis2dw12-drvinfo.inc deleted file mode 100644 index 433a9d4192..0000000000 --- a/zephyr/shim/src/motionsense_driver/lis2dw12-drvinfo.inc +++ /dev/null @@ -1,44 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "accel_lis2dw12_public.h" - -/* - * CREATE_SENSOR_DATA which is defined in motionsense_sensors.c is - * the helper to create sensor driver specific data. - * - * CREATE_SENSOR_DATA gets two arguments. One is the compatible - * property value specified in device tree and the other one is the macro - * that actually creates sensor driver specific data. The macro gets - * node id and the name to be used for the sensor driver data. - */ - -/* - * Create driver data for each Kionix drvinfo instance in device tree. - * (compatible = "cros-ec,drvdata-lis2dw12") - */ -/* Declare LIS2DW12 driver data */ -#define CREATE_SENSOR_DATA_LIS2DW12(id, drvdata_name) \ - static struct motion_sensor_t drvdata_name; - -CREATE_SENSOR_DATA(cros_ec_drvdata_lis2dw12, CREATE_SENSOR_DATA_LIS2DW12) - -/* - * CREATE_MOTION_SENSOR which is defined in motionsense_sensors.c is - * the macro to create an entry in motion_sensors array. - * The macro gets value of compatible property of - * the sensor in device tree and sensor specific values like chip ID, - * type of sensor, name of driver, default min/max frequency. - * Then using the values, it creates the corresponding motion_sense_t entry - * in motion_sensors array. - */ - -/* - * Create a motion_sensor_t entry for each LIS2DW12 - * instance(compatible = "cros-ec,lis2dw12") in device tree. - */ -CREATE_MOTION_SENSOR(cros_ec_lis2dw12, MOTIONSENSE_CHIP_LIS2DW12, \ - MOTIONSENSE_TYPE_ACCEL, lis2dw12_drv, \ - LIS2DW12_ODR_MIN_VAL, LIS2DW12_ODR_MAX_VAL) diff --git a/zephyr/shim/src/motionsense_driver/sensor_drv_list.inc b/zephyr/shim/src/motionsense_driver/sensor_drv_list.inc deleted file mode 100644 index f8fa4b7e53..0000000000 --- a/zephyr/shim/src/motionsense_driver/sensor_drv_list.inc +++ /dev/null @@ -1,39 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * A driver should create <chip>-drvinfo.inc to create - * driver-specific data and an motion sensor entry in - * motion_sensors array that are used by motion sense task. - * - * This file includes the .inc file and is used by motionsense_sensrs.c to - * create the sensor driver data and the entries in mostion_sensors array. - * - * e.g) bma255-drvinfo.inc is provided for BMA255 chip - * - * #ifdef CONFIG_ACCEL_BMA255 - * #include "bma255-drvinfo.inc" - * #endif - */ - -/* supported sensor driver list */ -#ifdef CONFIG_PLATFORM_EC_ACCEL_BMA255 -#include "bma255-drvinfo.inc" -#endif -#ifdef CONFIG_PLATFORM_EC_ACCEL_KX022 -#include "kx022-drvinfo.inc" -#endif -#ifdef CONFIG_PLATFORM_EC_ACCEL_LIS2DW12 -#include "lis2dw12-drvinfo.inc" -#endif -#ifdef CONFIG_PLATFORM_EC_ACCELGYRO_BMI160 -#include "bmi160-drvinfo.inc" -#endif -#ifdef CONFIG_PLATFORM_EC_ACCELGYRO_BMI260 -#include "bmi260-drvinfo.inc" -#endif -#ifdef CONFIG_PLATFORM_EC_ALS_TCS3400 -#include "tcs3400-drvinfo.inc" -#endif diff --git a/zephyr/shim/src/motionsense_driver/tcs3400-drvinfo.inc b/zephyr/shim/src/motionsense_driver/tcs3400-drvinfo.inc deleted file mode 100644 index 346688d646..0000000000 --- a/zephyr/shim/src/motionsense_driver/tcs3400-drvinfo.inc +++ /dev/null @@ -1,79 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "driver/als_tcs3400_public.h" - -/* - * CREATE_SENSOR_DATA which is defined in motionsense_sensros.c is - * the helper to create sensor driver specific data. - * - * CREATE_SENSOR_DATA gets two arguments. One is the compatible - * property value specified in device tree and the other one is the macro - * that actually creates sensor driver specific data. The macro gets - * node id and the name to be used for the sensor driver data. - */ - -/* include macros for common data strutures from accelgyro.h */ -#include "drvdata-accelgyro.h" - -/* Create driver data for tcs3400 driver. */ -#define CREATE_SENSOR_DATA_TCS3400_CLEAR(id, drvdata_name) \ - static struct als_drv_data_t drvdata_name = \ - ACCELGYRO_ALS_DRV_DATA(DT_CHILD(id, als_drv_data)); - -/* - * Create driver data for each TCS3400-clear drvdata instance in device tree. - * (compatible = "cros-ec,drvdata-tcs3400-clear") - */ -CREATE_SENSOR_DATA(cros_ec_drvdata_tcs3400_clear, \ - CREATE_SENSOR_DATA_TCS3400_CLEAR) - -/* driver data for tcs3400 rgb */ -#define TCS3400_RGB_SATRURATION(id) \ - COND_CODE_1(DT_NODE_HAS_PROP(id, again), \ - (.saturation.again = DT_PROP(id, again),), \ - (.saturation.again = TCS_DEFAULT_AGAIN,)) \ - COND_CODE_1(DT_NODE_HAS_PROP(id, atime), \ - (.saturation.again = DT_PROP(id, atime),), \ - (.saturation.again = TCS_DEFAULT_ATIME,)) - -#define CREATE_SENSOR_DATA_TCS3400_RGB(id, drvdata_name) \ - static struct tcs3400_rgb_drv_data_t drvdata_name = { \ - .calibration = ACCELGYRO_RGB_CALIBRATION( \ - DT_CHILD(id, rgb_calibration)), \ - TCS3400_RGB_SATRURATION(DT_CHILD(id, saturation)) \ - }; - -/* - * Create driver data for each TCS3400-rgb drvdata instance in device tree. - * (compatible = "cros-ec,drvdata-tcs3400-rgb") - */ -CREATE_SENSOR_DATA(cros_ec_drvdata_tcs3400_rgb, CREATE_SENSOR_DATA_TCS3400_RGB) -/* - * CREATE_MOTION_SENSOR which is defined in motionsense_sensros.c is - * the macro to create an entry in motion_sensors array. - * The macro gets value of compatible property of - * the sensor in device tree and sensor specific values like chip ID, - * type of sensor, name of driver, default min/max frequency. - * Then using the values, it creates the corresponding motion_sense_t entry - * in motion_sensors array. - */ - -/* - * Here, we call CREATE_MOTION_SENSOR to create a motion_sensor_t entry - * for each TCS3400 clear instance (compatible = "cros-ec,tcs3400-clear") - * in device tree. - */ -CREATE_MOTION_SENSOR(cros_ec_tcs3400_clear, MOTIONSENSE_CHIP_TCS3400, \ - MOTIONSENSE_TYPE_LIGHT, tcs3400_drv, \ - TCS3400_LIGHT_MIN_FREQ, TCS3400_LIGHT_MAX_FREQ) - -/* - * Here, we call CREATE_MOTION_SENSOR to create a motion_sensor_t entry - * for each TCS3400 RGB instance (compatible = "cros-ec,tcs3400-rgb") - * in device tree. - */ -CREATE_MOTION_SENSOR(cros_ec_tcs3400_rgb, MOTIONSENSE_CHIP_TCS3400, \ - MOTIONSENSE_TYPE_LIGHT_RGB, tcs3400_rgb_drv, 0, 0) diff --git a/zephyr/shim/src/motionsense_sensors.c b/zephyr/shim/src/motionsense_sensors.c deleted file mode 100644 index 0c54160e2e..0000000000 --- a/zephyr/shim/src/motionsense_sensors.c +++ /dev/null @@ -1,403 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "common.h" -#include "accelgyro.h" -#include "hooks.h" -#include "drivers/cros_cbi.h" - -#define SENSOR_MUTEX_NODE DT_PATH(motionsense_mutex) -#define SENSOR_MUTEX_NAME(id) DT_CAT(MUTEX_, id) - -#if DT_NODE_EXISTS(SENSOR_MUTEX_NODE) -#define DECLARE_SENSOR_MUTEX(id) K_MUTEX_DEFINE(SENSOR_MUTEX_NAME(id)); - -/* - * Declare mutex for - * each child node of "/motionsense-mutex" node in DT. - * - * A mutex can be shared among the motion sensors. - */ -DT_FOREACH_CHILD(SENSOR_MUTEX_NODE, DECLARE_SENSOR_MUTEX) -#endif /* DT_NODE_EXISTS(SENSOR_MUTEX_NODE) */ - -#define SENSOR_ROT_REF_NODE DT_PATH(motionsense_rotation_ref) -#define SENSOR_ROT_STD_REF_NAME(id) DT_CAT(ROT_REF_, id) -#define MAT_ITEM(i, id) FLOAT_TO_FP((int32_t)(DT_PROP_BY_IDX(id, mat33, i))) -#define DECLARE_SENSOR_ROT_REF(id) \ - static const mat33_fp_t SENSOR_ROT_STD_REF_NAME(id) = { \ - { \ - FOR_EACH_FIXED_ARG(MAT_ITEM, (,), id, 0, 1, 2) \ - }, \ - { \ - FOR_EACH_FIXED_ARG(MAT_ITEM, (,), id, 3, 4, 5) \ - }, \ - { \ - FOR_EACH_FIXED_ARG(MAT_ITEM, (,), id, 6, 7, 8) \ - }, \ - }; - -/* - * Declare 3x3 rotation matrix for - * each child node of "/motionsense-rotation-ref" node in DT. - * - * A rotation matrix can be shared among the motion sensors. - */ -#if DT_NODE_EXISTS(SENSOR_ROT_REF_NODE) -DT_FOREACH_CHILD(SENSOR_ROT_REF_NODE, DECLARE_SENSOR_ROT_REF) -#endif - -/* - * Declare sensor driver data for - * each child node with status = "okay" of - * "/motionsense-sensor-data" node in DT. - * - * A driver data can be shared among the motion sensors. - */ -#define SENSOR_DATA_NAME(id) DT_CAT(SENSOR_DAT_, id) -#define SENSOR_DATA_NODE DT_PATH(motionsense_sensor_data) - -#define SENSOR_DATA(inst, compat, create_data_macro) \ - create_data_macro(DT_INST(inst, compat), \ - SENSOR_DATA_NAME(DT_INST(inst, compat))) - -/* - * CREATE_SENSOR_DATA is a helper macro that gets - * compat and create_data_macro as parameters. - * - * For each node with compatible = "compat", - * CREATE_SENSOR_DATA expands "create_data_macro" macro with the node id and - * the designated name for the sensor driver data to be created. The - * "create_datda_macro" macro is responsible for creating the sensor driver - * data with the name. - * - * Sensor drivers should provide <chip>-drvinfo.inc file and, in the file, - * it should have the macro that creates its sensor driver data using device - * tree and pass the macro via CREATE_SENSOR_DATA. - * - * e.g) The below is contents of tcs3400-drvinfo.inc file. The file has - * CREATE_SENSOR_DATA_TCS3400_CLEAR that creates the static instance of - * "struct als_drv_data_t" with the given name and initializes it - * with device tree. Then use CREATE_SENSOR_DATA. - * - * ----------- bma255-drvinfo.inc ----------- - * #define CREATE_SENSOR_DATA_TCS3400_CLEAR(id, drvdata_name) \ - * static struct als_drv_data_t drvdata_name = \ - * ACCELGYRO_ALS_DRV_DATA(DT_CHILD(id, als_drv_data)); - * - * CREATE_SENSOR_DATA(cros_ec_drvdata_tcs3400_clear, \ - * CREATE_SENSOR_DATA_TCS3400_CLEAR) - */ -#define CREATE_SENSOR_DATA(compat, create_data_macro) \ - UTIL_LISTIFY(DT_NUM_INST_STATUS_OKAY(compat), SENSOR_DATA, \ - compat, create_data_macro) - -/* - * sensor_drv_list.inc is included three times in this file. This is the first - * time and it is for creating sensor driver-specific data. So we ignore - * CREATE_MOTION_SENSOR() that creates motion sensor at this time. - */ -#define CREATE_MOTION_SENSOR(s_compat, s_chip, s_type, s_drv, \ - s_min_freq, s_max_freq) - -/* - * Here, we declare all sensor driver data. How to create the data is - * defined in <chip>-drvinfo.inc file and ,in turn, the file is included - * in sensor_drv_list.inc. - */ -#if DT_NODE_EXISTS(SENSOR_DATA_NODE) -#include "motionsense_driver/sensor_drv_list.inc" -#endif - -/* - * Get the address of the mutex which is referred by phandle. - * See motionsense-sensor-base.yaml and cros-ec,motionsense-mutex.yaml - * for DT example and details. - */ -#define SENSOR_MUTEX(id) \ - IF_ENABLED(DT_NODE_HAS_PROP(id, mutex), \ - (.mutex = &SENSOR_MUTEX_NAME(DT_PHANDLE(id, mutex)),)) - -/* - * Get I2C port number which is referred by phandle. - * See motionsense-sensor-base.yaml for DT example and details. - */ -#define SENSOR_I2C_PORT(id) \ - IF_ENABLED(DT_NODE_HAS_PROP(id, port), \ - (.port = I2C_PORT(DT_PHANDLE(id, port)),)) - -/* - * Get I2C or SPI address. - * See motionsense-sensor-base.yaml for DT example and details. - */ -#define SENSOR_I2C_SPI_ADDR_FLAGS(id) \ - IF_ENABLED(DT_NODE_HAS_PROP(id, i2c_spi_addr_flags), \ - (.i2c_spi_addr_flags = \ - DT_STRING_TOKEN(id, i2c_spi_addr_flags), )) - -/* - * Get the address of rotation matrix which is referred by phandle. - * See motionsense-sensor-base.yaml and cros-ec,motionsense-rotation-ref.yaml - * for DT example and details. - */ -#define SENSOR_ROT_STD_REF(id) \ - IF_ENABLED(DT_NODE_HAS_PROP(id, rot_standard_ref), \ - (.rot_standard_ref = \ - &SENSOR_ROT_STD_REF_NAME(DT_PHANDLE(id, rot_standard_ref)),)) - -/* - * Get the address of driver-specific data which is referred by phandle. - * See motionsense-sensor-base.yaml for DT example and details. - */ -#define SENSOR_DRV_DATA(id) \ - IF_ENABLED(DT_NODE_HAS_PROP(id, drv_data), \ - (.drv_data = &SENSOR_DATA_NAME(DT_PHANDLE(id, drv_data)),)) - -/* - * Get odr and ec_rate for the motion sensor. - * See motionsense-sensor-base.yaml and cros-ec,motionsense-sensor-config.yaml - * for DT example and details. - */ -#define SET_CONFIG_EC(cfg_id, cfg_suffix) \ - [SENSOR_CONFIG_##cfg_suffix] = { \ - IF_ENABLED(DT_NODE_HAS_PROP(cfg_id, odr), \ - (.odr = DT_PROP(cfg_id, odr),)) \ - IF_ENABLED(DT_NODE_HAS_PROP(cfg_id, ec_rate), \ - (.ec_rate = DT_PROP(cfg_id, ec_rate),)) \ - } - -/* Get configs */ -#define CREATE_SENSOR_CONFIG(cfgs_id) \ - .config = { \ - IF_ENABLED(DT_NODE_EXISTS(DT_CHILD(cfgs_id, ap)), \ - (SET_CONFIG_EC(DT_CHILD(cfgs_id, ap), AP),)) \ - IF_ENABLED(DT_NODE_EXISTS(DT_CHILD(cfgs_id, ec_s0)), \ - (SET_CONFIG_EC(DT_CHILD(cfgs_id, ec_s0), EC_S0),)) \ - IF_ENABLED(DT_NODE_EXISTS(DT_CHILD(cfgs_id, ec_s3)), \ - (SET_CONFIG_EC(DT_CHILD(cfgs_id, ec_s3), EC_S3),)) \ - IF_ENABLED(DT_NODE_EXISTS(DT_CHILD(cfgs_id, ec_s5)), \ - (SET_CONFIG_EC(DT_CHILD(cfgs_id, ec_s5), EC_S5),)) \ - } - -#define SENSOR_CONFIG(id) \ - IF_ENABLED(DT_NODE_EXISTS(DT_CHILD(id, configs)), \ - (CREATE_SENSOR_CONFIG(DT_CHILD(id, configs)),)) - -/* Get and assign the basic information for a motion sensor */ -#define SENSOR_BASIC_INFO(id) \ - .name = DT_LABEL(id), \ - .active_mask = DT_STRING_TOKEN(id, active_mask), \ - .location = DT_STRING_TOKEN(id, location), \ - .default_range = DT_PROP(id, default_range), \ - SENSOR_I2C_SPI_ADDR_FLAGS(id) \ - SENSOR_MUTEX(id) \ - SENSOR_I2C_PORT(id) \ - SENSOR_ROT_STD_REF(id) \ - SENSOR_DRV_DATA(id) \ - SENSOR_CONFIG(id) - -/* Create motion sensor node with node ID */ -#define DO_MK_SENSOR_ENTRY( \ - id, s_chip, s_type, s_drv, s_min_freq, s_max_freq) \ - [SENSOR_ID(id)] = { \ - SENSOR_BASIC_INFO(id) \ - .chip = s_chip, \ - .type = s_type, \ - .drv = &s_drv, \ - .min_frequency = s_min_freq, \ - .max_frequency = s_max_freq \ - }, - -/* Construct an entry iff the alternate_for property is missing. */ -#define MK_SENSOR_ENTRY(inst, s_compat, s_chip, s_type, s_drv, s_min_freq, \ - s_max_freq) \ - COND_CODE_0(DT_NODE_HAS_PROP(DT_INST(inst, s_compat), alternate_for), \ - (DO_MK_SENSOR_ENTRY(DT_INST(inst, s_compat), s_chip, \ - s_type, s_drv, s_min_freq, \ - s_max_freq)), \ - ()) - -/* Construct an entry iff the alternate_for property exists. */ -#define MK_SENSOR_ALT_ENTRY(inst, s_compat, s_chip, s_type, s_drv, s_min_freq, \ - s_max_freq) \ - COND_CODE_1(DT_NODE_HAS_PROP(DT_INST(inst, s_compat), alternate_for), \ - (DO_MK_SENSOR_ENTRY(DT_INST(inst, s_compat), s_chip, \ - s_type, s_drv, s_min_freq, \ - s_max_freq)), \ - ()) - -#undef CREATE_SENSOR_DATA -/* - * Sensor driver-specific data creation stage is already done. So this - * time we ignore CREATE_SENSOR_DATA(). - */ -#define CREATE_SENSOR_DATA(compat, create_data_macro) -#undef CREATE_MOTION_SENSOR - -/* - * CREATE_MOTION_SENSOR is a help macro that read the sensor information from - * device tree and creates an entry in motion_sensors array which is used - * by motion sense task. The help macro gets compatible value of the - * sensor node and several driver specific information like CHIP_ID, - * SENSOR_TYPE, driver instance name, and min/max frequency. - * - * <chip>-drvinfo.inc file which is provided by sensor driver should use - * CREATE_MOTION_SENSOR to provide driver specific information. - * - * e.g) The below is contents of tcs3400-drvinfo.inc file. The file has - * CREATE_MOTION_SENSOR like below to create the sensor entry. The file uses - * the help macro two times since the chip supports two functions - * ALS clear and ALS RGB. - - * ------------- tcs3400-drvinfo.inc ------------- - * // Here, we call CREATE_MOTION_SENSOR to create a motion_sensor_t entry - * // for each TCS3400 clear instance (compatible = "cros-ec,tcs3400-clear") - * // in device tree. - * CREATE_MOTION_SENSOR(cros_ec_tcs3400_clear, MOTIONSENSE_CHIP_TCS3400, \ - * MOTIONSENSE_TYPE_LIGHT, tcs3400_drv, \ - * TCS3400_LIGHT_MIN_FREQ, TCS3400_LIGHT_MAX_FREQ) - - * - * // Here, we call CREATE_MOTION_SENSOR to create a motion_sensor_t entry - * // for each TCS3400 RGB instance (compatible = "cros-ec,tcs3400-rgb") - * // in device tree. - * - * CREATE_MOTION_SENSOR(cros_ec_tcs3400_rgb, MOTIONSENSE_CHIP_TCS3400, \ - * MOTIONSENSE_TYPE_LIGHT_RGB, tcs3400_rgb_drv, 0, 0) - * ----------------------------------------------- - */ -#define CREATE_MOTION_SENSOR(s_compat, s_chip, s_type, s_drv, \ - s_min_freq, s_max_freq) \ - UTIL_LISTIFY(DT_NUM_INST_STATUS_OKAY(s_compat), MK_SENSOR_ENTRY,\ - s_compat, s_chip, s_type, s_drv, s_min_freq, s_max_freq) - -/* - * Here, we include sensor_drv_list.inc AGAIN but this time it only - * uses CREATE_MOTION_SENSOR to create the motion sensor entries. - */ -struct motion_sensor_t motion_sensors[] = { -#if DT_NODE_EXISTS(SENSOR_NODE) -#include "motionsense_driver/sensor_drv_list.inc" -#endif -}; - -/* - * Remap the CREATE_MOTION_SENSOR to call MK_SENSOR_ALT_ENTRY to create a list - * of alternate sensors that will be used at runtime. - */ -#undef CREATE_MOTION_SENSOR -#define CREATE_MOTION_SENSOR(s_compat, s_chip, s_type, s_drv, s_min_freq, \ - s_max_freq) \ - UTIL_LISTIFY(DT_NUM_INST_STATUS_OKAY(s_compat), MK_SENSOR_ALT_ENTRY, \ - s_compat, s_chip, s_type, s_drv, s_min_freq, s_max_freq) - -/* - * The list of alternate motion sensors that may be used at runtime to replace - * an entry in the motion_sensors array. - */ -__maybe_unused struct motion_sensor_t motion_sensors_alt[] = { -#if DT_NODE_EXISTS(SENSOR_ALT_NODE) -#include "motionsense_driver/sensor_drv_list.inc" -#endif -}; - -#ifdef CONFIG_DYNAMIC_MOTION_SENSOR_COUNT -unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors); -#else -const unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors); -#endif - -/* - * Create a list of ALS sensors needed by motion sense - * - * The following example adds tcs3400 als sensor to motion_als_sensors array - * - * motionsense-sensors { - * lid_accel: bma255 { - * : - * }; - * : - * : - * als_clear: tcs3400 { - * : - * }; - * }; - * - * motionsense-sensor-info { - * compatible = "cros-ec,motionsense-sensor-info"; - * - * // list of entries for motion_als_sensors - * als-sensors = <&als_clear>; - * : - * : - * }; - */ -#if DT_NODE_HAS_PROP(SENSOR_INFO_NODE, als_sensors) -#define ALS_SENSOR_ENTRY_WITH_COMMA(i, id) \ - &motion_sensors[SENSOR_ID(DT_PHANDLE_BY_IDX(id, als_sensors, i))], -const struct motion_sensor_t *motion_als_sensors[] = { - UTIL_LISTIFY(DT_PROP_LEN(SENSOR_INFO_NODE, als_sensors), - ALS_SENSOR_ENTRY_WITH_COMMA, SENSOR_INFO_NODE) -}; -BUILD_ASSERT(ARRAY_SIZE(motion_als_sensors) == ALS_COUNT); -#endif - -/* - * Enable interrupts for motion sensors - * - * e.g) list of named-gpio nodes - * motionsense-sensor-info { - * compatible = "cros-ec,motionsense-sensor-info"; - * - * // list of GPIO interrupts that have to - * // be enabled at initial stage - * sensor-irqs = <&gpio_ec_imu_int_l &gpio_ec_als_rgb_int_l>; - * }; - */ -#if DT_NODE_HAS_PROP(SENSOR_INFO_NODE, sensor_irqs) -#define SENSOR_GPIO_ENABLE_INTERRUPT(i, id) \ - gpio_enable_interrupt( \ - GPIO_SIGNAL(DT_PHANDLE_BY_IDX(id, sensor_irqs, i))); -static void sensor_enable_irqs(void) -{ - UTIL_LISTIFY(DT_PROP_LEN(SENSOR_INFO_NODE, sensor_irqs), - SENSOR_GPIO_ENABLE_INTERRUPT, SENSOR_INFO_NODE) -} -DECLARE_HOOK(HOOK_INIT, sensor_enable_irqs, HOOK_PRIO_DEFAULT); -#endif - -/* Handle the alternative motion sensors */ -#define REPLACE_ALT_MOTION_SENSOR(new_id, old_id) \ - motion_sensors[SENSOR_ID(old_id)] = \ - motion_sensors_alt[SENSOR_ID(new_id)]; - -#define CHECK_AND_REPLACE_ALT_MOTION_SENSOR(id) \ - do { \ - if (cros_cbi_ssfc_check_match( \ - dev, CBI_SSFC_VALUE_ID(DT_PHANDLE( \ - id, alternate_indicator)))) { \ - REPLACE_ALT_MOTION_SENSOR( \ - id, DT_PHANDLE(id, alternate_for)) \ - } \ - } while (0); - -#define ALT_MOTION_SENSOR_INIT_ID(id) \ - COND_CODE_1(UTIL_AND(DT_NODE_HAS_PROP(id, alternate_for), \ - DT_NODE_HAS_PROP(id, alternate_indicator)), \ - (CHECK_AND_REPLACE_ALT_MOTION_SENSOR(id)), ()) - -void motion_sensors_init_alt(void) -{ - const struct device *dev = device_get_binding("cros_cbi"); - - if (dev == NULL) - return; - -#if DT_NODE_EXISTS(SENSOR_ALT_NODE) - DT_FOREACH_CHILD(SENSOR_ALT_NODE, ALT_MOTION_SENSOR_INIT_ID) -#endif -} - -DECLARE_HOOK(HOOK_INIT, motion_sensors_init_alt, HOOK_PRIO_INIT_I2C + 1); diff --git a/zephyr/shim/src/panic.c b/zephyr/shim/src/panic.c deleted file mode 100644 index 22322cc4ee..0000000000 --- a/zephyr/shim/src/panic.c +++ /dev/null @@ -1,160 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <arch/cpu.h> -#include <fatal.h> -#include <logging/log.h> -#include <logging/log_ctrl.h> -#include <zephyr.h> - -#include "common.h" -#include "panic.h" - -/* - * Arch-specific configuration - * - * For each architecture, define: - * - PANIC_ARCH, which should be the corresponding arch field of the - * panic_data struct. - * - PANIC_REG_LIST, which is a macro that takes a parameter M, and - * applies M to 3-tuples of: - * - zephyr esf field name - * - panic_data struct field name - * - human readable name - */ - -#if defined(CONFIG_ARM) -#define PANIC_ARCH PANIC_ARCH_CORTEX_M -#define PANIC_REG_LIST(M) \ - M(basic.r0, cm.frame[0], a1) \ - M(basic.r1, cm.frame[1], a2) \ - M(basic.r2, cm.frame[2], a3) \ - M(basic.r3, cm.frame[3], a4) \ - M(basic.r12, cm.frame[4], ip) \ - M(basic.lr, cm.frame[5], lr) \ - M(basic.pc, cm.frame[6], pc) \ - M(basic.xpsr, cm.frame[7], xpsr) -#define PANIC_REG_EXCEPTION(pdata) pdata->cm.regs[1] -#define PANIC_REG_REASON(pdata) pdata->cm.regs[3] -#define PANIC_REG_INFO(pdata) pdata->cm.regs[4] -#elif defined(CONFIG_RISCV) && !defined(CONFIG_64BIT) -#define PANIC_ARCH PANIC_ARCH_RISCV_RV32I -#define PANIC_REG_LIST(M) \ - M(ra, riscv.regs[1], ra) \ - M(tp, riscv.regs[3], tp) \ - M(a0, riscv.regs[4], a0) \ - M(a1, riscv.regs[5], a1) \ - M(a2, riscv.regs[6], a2) \ - M(a3, riscv.regs[7], a3) \ - M(a4, riscv.regs[8], a4) \ - M(a5, riscv.regs[9], a5) \ - M(a6, riscv.regs[10], a6) \ - M(a7, riscv.regs[11], a7) \ - M(t0, riscv.regs[12], t0) \ - M(t1, riscv.regs[13], t1) \ - M(t2, riscv.regs[14], t2) \ - M(t3, riscv.regs[15], t3) \ - M(t4, riscv.regs[16], t4) \ - M(t5, riscv.regs[17], t5) \ - M(t6, riscv.regs[18], t6) \ - M(mepc, riscv.mepc, mepc) \ - M(mstatus, riscv.mcause, mstatus) -#define PANIC_REG_EXCEPTION(pdata) (pdata->riscv.mcause) -#define PANIC_REG_REASON(pdata) (pdata->riscv.regs[11]) -#define PANIC_REG_INFO(pdata) (pdata->riscv.regs[10]) -#else -/* Not implemented for this arch */ -#define PANIC_ARCH 0 -#define PANIC_REG_LIST(M) -#ifdef CONFIG_PLATFORM_EC_SOFTWARE_PANIC -static uint8_t placeholder_exception_reg; -static uint32_t placeholder_reason_reg; -static uint32_t placeholder_info_reg; -#define PANIC_REG_EXCEPTION(unused) placeholder_exception_reg -#define PANIC_REG_REASON(unused) placeholder_reason_reg -#define PANIC_REG_INFO(unused) placeholder_info_reg -#endif /* CONFIG_PLATFORM_EC_SOFTWARE_PANIC */ -#endif - -/* Macros to be applied to PANIC_REG_LIST as M */ -#define PANIC_COPY_REGS(esf_field, pdata_field, human_name) \ - pdata->pdata_field = esf->esf_field; -#define PANIC_PRINT_REGS(esf_field, pdata_field, human_name) \ - panic_printf(" %-8s = 0x%08X\n", #human_name, pdata->pdata_field); - -void panic_data_print(const struct panic_data *pdata) -{ - PANIC_REG_LIST(PANIC_PRINT_REGS); -} - -#ifndef CONFIG_LOG -static void copy_esf_to_panic_data(const z_arch_esf_t *esf, - struct panic_data *pdata) -{ - pdata->arch = PANIC_ARCH; - pdata->struct_version = 2; - pdata->flags = 0; - pdata->reserved = 0; - pdata->struct_size = sizeof(*pdata); - pdata->magic = PANIC_DATA_MAGIC; - - PANIC_REG_LIST(PANIC_COPY_REGS); -} - -void k_sys_fatal_error_handler(unsigned int reason, const z_arch_esf_t *esf) -{ - panic_printf("Fatal error: %u\n", reason); - - if (PANIC_ARCH && esf) { - copy_esf_to_panic_data(esf, get_panic_data_write()); - panic_data_print(panic_get_data()); - } - - LOG_PANIC(); - k_fatal_halt(reason); - CODE_UNREACHABLE; -} -#endif /* CONFIG_LOG */ - -#ifdef CONFIG_PLATFORM_EC_SOFTWARE_PANIC -void panic_set_reason(uint32_t reason, uint32_t info, uint8_t exception) -{ - struct panic_data * const pdata = get_panic_data_write(); - - /* Setup panic data structure */ - memset(pdata, 0, CONFIG_PANIC_DATA_SIZE); - pdata->magic = PANIC_DATA_MAGIC; - pdata->struct_size = CONFIG_PANIC_DATA_SIZE; - pdata->struct_version = 2; - pdata->arch = PANIC_ARCH; - - /* Log panic cause */ - PANIC_REG_EXCEPTION(pdata) = exception; - PANIC_REG_REASON(pdata) = reason; - PANIC_REG_INFO(pdata) = info; - - /* Allow architecture specific logic */ - arch_panic_set_reason(reason, info, exception); -} - -void panic_get_reason(uint32_t *reason, uint32_t *info, uint8_t *exception) -{ - struct panic_data * const pdata = panic_get_data(); - - if (pdata && pdata->struct_version == 2) { - *exception = PANIC_REG_EXCEPTION(pdata); - *reason = PANIC_REG_REASON(pdata); - *info = PANIC_REG_INFO(pdata); - } else { - *exception = *reason = *info = 0; - } -} - -__overridable void arch_panic_set_reason(uint32_t reason, uint32_t info, - uint8_t exception) -{ - /* Default implementation, do nothing. */ -} -#endif /* CONFIG_PLATFORM_EC_SOFTWARE_PANIC */ diff --git a/zephyr/shim/src/pwm.c b/zephyr/shim/src/pwm.c deleted file mode 100644 index 39fd72007e..0000000000 --- a/zephyr/shim/src/pwm.c +++ /dev/null @@ -1,190 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <device.h> -#include <devicetree.h> -#include <drivers/pwm.h> -#include <logging/log.h> - -#include "common.h" -#include "console.h" -#include "ec_commands.h" -#include "pwm.h" -#include "util.h" - -#include "pwm/pwm.h" - -LOG_MODULE_REGISTER(pwm_shim, LOG_LEVEL_ERR); - -#define USECS_PER_SEC 1000000 - -/* - * Initialize the device bindings in pwm_channels. - * This macro is called from within DT_FOREACH_CHILD - */ -#define INIT_DEV_BINDING(id) { \ - pwm_configs[PWM_CHANNEL(id)].name = DT_LABEL(id); \ - pwm_configs[PWM_CHANNEL(id)].dev = DEVICE_DT_GET( \ - DT_PHANDLE(id, pwms)); \ - pwm_configs[PWM_CHANNEL(id)].pin = DT_PWMS_CHANNEL(id); \ - pwm_configs[PWM_CHANNEL(id)].flags = DT_PWMS_FLAGS(id); \ - pwm_configs[PWM_CHANNEL(id)].freq = DT_PROP(id, frequency); \ - } - -struct pwm_config { - /* Name */ - const char *name; - /* PWM pin */ - uint32_t pin; - /* PWM channel flags. See dt-bindings/pwm/pwm.h */ - pwm_flags_t flags; - /* PWM operating frequency. Configured by the devicetree */ - uint32_t freq; - - /* PWM period in microseconds. Automatically set to 1/frequency */ - uint32_t period_us; - /* PWM pulse in microseconds. Set by pwm_set_raw_duty */ - uint32_t pulse_us; - /* Saves whether the PWM channel is currently enabled */ - bool enabled; - - /* Runtime device for PWM */ - const struct device *dev; -}; - -static struct pwm_config pwm_configs[PWM_CH_COUNT]; - -static int init_pwms(const struct device *unused) -{ - struct pwm_config *pwm; - int rv = 0; - - ARG_UNUSED(unused); - - /* Initialize PWM data from the device tree */ - DT_FOREACH_CHILD(DT_PATH(named_pwms), INIT_DEV_BINDING) - - /* Read the PWM operating frequency, set by the chip driver */ - for (size_t i = 0; i < PWM_CH_COUNT; ++i) { - pwm = &pwm_configs[i]; - - if (pwm->dev == NULL) { - LOG_ERR("Not found (%s)", pwm->name); - rv = -ENODEV; - continue; - } - - /* - * TODO - check that devicetree frequency is less than 1/2 - * max frequency from the chip driver. - */ - pwm->period_us = USECS_PER_SEC / pwm->freq; - } - - return rv; -} -#if CONFIG_PLATFORM_EC_PWM_INIT_PRIORITY <= CONFIG_KERNEL_INIT_PRIORITY_DEVICE -#error "PWM init priority must be > KERNEL_INIT_PRIORITY_DEVICE" -#endif -SYS_INIT(init_pwms, PRE_KERNEL_1, CONFIG_PLATFORM_EC_PWM_INIT_PRIORITY); - -static struct pwm_config* pwm_lookup(enum pwm_channel ch) -{ - __ASSERT(ch < ARRAY_SIZE(pwm_configs), "Invalid PWM channel %d", ch); - - return &pwm_configs[ch]; -} - -void pwm_enable(enum pwm_channel ch, int enabled) -{ - struct pwm_config *pwm; - uint32_t pulse_us; - int rv; - - pwm = pwm_lookup(ch); - pwm->enabled = enabled; - - /* - * The Zephyr API doesn't provide explicit enable and disable - * commands. However, setting the pulse width to zero disables - * the PWM. - */ - if (enabled) - pulse_us = pwm->pulse_us; - else - pulse_us = 0; - - rv = pwm_pin_set_usec(pwm->dev, pwm->pin, pwm->period_us, pulse_us, - pwm->flags); - - if (rv) - LOG_ERR("pwm_pin_set_usec() failed %s (%d)", pwm->name, rv); -} - -int pwm_get_enabled(enum pwm_channel ch) -{ - struct pwm_config *pwm; - - pwm = pwm_lookup(ch); - return pwm->enabled; -} - -void pwm_set_raw_duty(enum pwm_channel ch, uint16_t duty) -{ - struct pwm_config *pwm; - int rv; - - pwm = pwm_lookup(ch); - - pwm->pulse_us = - DIV_ROUND_NEAREST(pwm->period_us * duty, EC_PWM_MAX_DUTY); - - LOG_DBG("PWM %s set raw duty (0x%04x), pulse %d", pwm->name, duty, - pwm->pulse_us); - - rv = pwm_pin_set_usec(pwm->dev, pwm->pin, pwm->period_us, pwm->pulse_us, - pwm->flags); - - if (rv) - LOG_ERR("pwm_pin_set_usec() failed %s (%d)", pwm->name, rv); -} - -uint16_t pwm_get_raw_duty(enum pwm_channel ch) -{ - struct pwm_config *pwm; - - pwm = pwm_lookup(ch); - - return DIV_ROUND_NEAREST(pwm->pulse_us * EC_PWM_MAX_DUTY, - pwm->period_us); -} - -void pwm_set_duty(enum pwm_channel ch, int percent) -{ - struct pwm_config *pwm; - int rv; - - pwm = pwm_lookup(ch); - - pwm->pulse_us = DIV_ROUND_NEAREST(pwm->period_us * percent, 100); - - LOG_DBG("PWM %s set percent (%d), pulse %d", pwm->name, percent, - pwm->pulse_us); - - rv = pwm_pin_set_usec(pwm->dev, pwm->pin, pwm->period_us, pwm->pulse_us, - pwm->flags); - - if (rv) - LOG_ERR("pwm_pin_set_usec() failed %s (%d)", pwm->name, rv); -} - -int pwm_get_duty(enum pwm_channel ch) -{ - struct pwm_config *pwm; - - pwm = pwm_lookup(ch); - - return DIV_ROUND_NEAREST(pwm->pulse_us * 100, pwm->period_us); -} diff --git a/zephyr/shim/src/pwm_led.c b/zephyr/shim/src/pwm_led.c deleted file mode 100644 index 48565d2e56..0000000000 --- a/zephyr/shim/src/pwm_led.c +++ /dev/null @@ -1,60 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#define DT_DRV_COMPAT cros_ec_pwm_leds - -#include <string.h> -#include <devicetree.h> - -#if DT_HAS_COMPAT_STATUS_OKAY(DT_DRV_COMPAT) - -#include "led_pwm.h" -#include "pwm.h" - -BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(cros_ec_pwm_leds) <= 1, - "Multiple CrOS EC PWM LED instances defined"); -BUILD_ASSERT(DT_INST_PROP_LEN(0, leds) <= 2, - "Unsupported number of LEDs defined"); - -#define PWM_CHANNEL_BY_IDX(node_id, prop, idx, led_ch) \ - PWM_CHANNEL(DT_PWMS_CTLR_BY_IDX( \ - DT_PHANDLE_BY_IDX(node_id, prop, idx), led_ch)) - -#define PWM_LED_INIT(node_id, prop, idx) \ - [PWM_LED##idx] = { \ - .ch0 = PWM_CHANNEL_BY_IDX(node_id, prop, idx, 0), \ - .ch1 = PWM_CHANNEL_BY_IDX(node_id, prop, idx, 1), \ - .ch2 = PWM_CHANNEL_BY_IDX(node_id, prop, idx, 2), \ - .enable = &pwm_enable, \ - .set_duty = &pwm_set_duty, \ - }, - -struct pwm_led pwm_leds[] = { - DT_INST_FOREACH_PROP_ELEM(0, leds, PWM_LED_INIT) -}; - -struct pwm_led_color_map led_color_map[EC_LED_COLOR_COUNT] = { - [EC_LED_COLOR_RED] = DT_INST_PROP(0, color_map_red), - [EC_LED_COLOR_GREEN] = DT_INST_PROP(0, color_map_green), - [EC_LED_COLOR_BLUE] = DT_INST_PROP(0, color_map_blue), - [EC_LED_COLOR_YELLOW] = DT_INST_PROP(0, color_map_yellow), - [EC_LED_COLOR_WHITE] = DT_INST_PROP(0, color_map_white), - [EC_LED_COLOR_AMBER] = DT_INST_PROP(0, color_map_amber), -}; - -BUILD_ASSERT(DT_INST_PROP_LEN(0, brightness_range) == EC_LED_COLOR_COUNT, - "brightness_range must have exactly EC_LED_COLOR_COUNT values"); - -static const uint8_t dt_brigthness_range[EC_LED_COLOR_COUNT] = DT_INST_PROP( - 0, brightness_range); - -void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) -{ - /* led_id is ignored, same ranges for all LEDs */ - memcpy(brightness_range, dt_brigthness_range, - sizeof(dt_brigthness_range)); -} - -#endif /* DT_HAS_COMPAT_STATUS_OKAY */ diff --git a/zephyr/shim/src/rtc.c b/zephyr/shim/src/rtc.c deleted file mode 100644 index 002e60148d..0000000000 --- a/zephyr/shim/src/rtc.c +++ /dev/null @@ -1,235 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <logging/log.h> -#include <kernel.h> -#include <zephyr.h> - -#include "console.h" -#include "drivers/cros_rtc.h" -#include "hooks.h" -#include "host_command.h" -#include "util.h" - -LOG_MODULE_REGISTER(shim_cros_rtc, LOG_LEVEL_ERR); - -#define CROS_RTC_NODE DT_CHOSEN(cros_rtc) -static const struct device *cros_rtc_dev; - -#ifdef CONFIG_HOSTCMD_EVENTS -static void set_rtc_host_event(void) -{ - host_set_single_event(EC_HOST_EVENT_RTC); -} -DECLARE_DEFERRED(set_rtc_host_event); -#endif - -void rtc_callback(const struct device *dev) -{ - ARG_UNUSED(dev); - - if (IS_ENABLED(CONFIG_HOSTCMD_EVENTS)) { - hook_call_deferred(&set_rtc_host_event_data, 0); - } -} - -/** Initialize the rtc. */ -static int system_init_rtc(const struct device *unused) -{ - ARG_UNUSED(unused); - - cros_rtc_dev = DEVICE_DT_GET(CROS_RTC_NODE); - if (!cros_rtc_dev) { - LOG_ERR("Error: device %s is not ready", cros_rtc_dev->name); - return -ENODEV; - } - - /* set the RTC callback */ - cros_rtc_configure(cros_rtc_dev, rtc_callback); - - return 0; -} -SYS_INIT(system_init_rtc, APPLICATION, 1); - -uint32_t system_get_rtc_sec(void) -{ - uint32_t seconds; - - cros_rtc_get_value(cros_rtc_dev, &seconds); - - return seconds; -} - -void system_set_rtc(uint32_t seconds) -{ - cros_rtc_set_value(cros_rtc_dev, seconds); -} - -void system_reset_rtc_alarm(void) -{ - if (!cros_rtc_dev) { - /* TODO(b/183115086): check the error handler for NULL device */ - LOG_ERR("rtc_dev hasn't initialized."); - return; - } - - cros_rtc_reset_alarm(cros_rtc_dev); -} - -/* - * For NPCX series, The alarm counter only stores wakeup time in seconds. - * Microseconds will be ignored. - */ -void system_set_rtc_alarm(uint32_t seconds, uint32_t microseconds) -{ - if (!cros_rtc_dev) { - LOG_ERR("rtc_dev hasn't initialized."); - return; - } - - /* If time = 0, clear the current alarm */ - if (seconds == EC_RTC_ALARM_CLEAR && microseconds == 0) { - system_reset_rtc_alarm(); - return; - } - - seconds += system_get_rtc_sec(); - - cros_rtc_set_alarm(cros_rtc_dev, seconds, microseconds); -} - -/* - * Return the seconds remaining before the RTC alarm goes off. - * Returns 0 if alarm is not set. - */ -uint32_t system_get_rtc_alarm(void) -{ - uint32_t seconds, microseconds; - - cros_rtc_get_alarm(cros_rtc_dev, &seconds, µseconds); - - /* - * Return 0: - * 1. If alarm is not set to go off, OR - * 2. If alarm is set and has already gone off - */ - if (seconds == 0) { - return 0; - } - - return seconds - system_get_rtc_sec(); -} - -/* Console commands */ -void print_system_rtc(enum console_channel ch) -{ - uint32_t sec = system_get_rtc_sec(); - - cprintf(ch, "RTC: 0x%08x (%d.00 s)\n", sec, sec); -} - -/* - * TODO(b/179055201): This is similar to the same function in some of the - * chip-specific code. We should factor out the common parts. - */ -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_RTC -static int command_system_rtc(int argc, char **argv) -{ - if (argc == 3 && !strcasecmp(argv[1], "set")) { - char *e; - unsigned int t = strtoi(argv[2], &e, 0); - - if (*e) - return EC_ERROR_PARAM2; - - system_set_rtc(t); - } else if (argc > 1) { - return EC_ERROR_INVAL; - } - - print_system_rtc(CC_COMMAND); - - return EC_SUCCESS; -} -DECLARE_CONSOLE_COMMAND(rtc, command_system_rtc, "[set <seconds>]", - "Get/set real-time clock"); - -#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_RTC_ALARM -/** - * Test the RTC alarm by setting an interrupt on RTC match. - */ -static int command_rtc_alarm_test(int argc, char **argv) -{ - int s = 1, us = 0; - char *e; - - if (argc > 1) { - s = strtoi(argv[1], &e, 10); - if (*e) - return EC_ERROR_PARAM1; - } - if (argc > 2) { - us = strtoi(argv[2], &e, 10); - if (*e) - return EC_ERROR_PARAM2; - } - - ccprintf("Setting RTC alarm\n"); - - system_set_rtc_alarm(s, us); - - return EC_SUCCESS; -} -DECLARE_CONSOLE_COMMAND(rtc_alarm, command_rtc_alarm_test, - "[seconds [microseconds]]", "Test alarm"); -#endif /* CONFIG_PLATFORM_EC_CONSOLE_CMD_RTC_ALARM */ -#endif /* CONFIG_PLATFORM_EC_CONSOLE_CMD_RTC */ - -#ifdef CONFIG_PLATFORM_EC_HOSTCMD_RTC -static enum ec_status system_rtc_get_value(struct host_cmd_handler_args *args) -{ - struct ec_response_rtc *r = args->response; - - r->time = system_get_rtc_sec(); - args->response_size = sizeof(*r); - - return EC_RES_SUCCESS; -} -DECLARE_HOST_COMMAND(EC_CMD_RTC_GET_VALUE, system_rtc_get_value, - EC_VER_MASK(0)); - -static enum ec_status system_rtc_set_value(struct host_cmd_handler_args *args) -{ - const struct ec_params_rtc *p = args->params; - - system_set_rtc(p->time); - return EC_RES_SUCCESS; -} -DECLARE_HOST_COMMAND(EC_CMD_RTC_SET_VALUE, system_rtc_set_value, - EC_VER_MASK(0)); - -static enum ec_status system_rtc_set_alarm(struct host_cmd_handler_args *args) -{ - const struct ec_params_rtc *p = args->params; - - system_set_rtc_alarm(p->time, 0); - return EC_RES_SUCCESS; -} -DECLARE_HOST_COMMAND(EC_CMD_RTC_SET_ALARM, system_rtc_set_alarm, - EC_VER_MASK(0)); - -static enum ec_status system_rtc_get_alarm(struct host_cmd_handler_args *args) -{ - struct ec_response_rtc *r = args->response; - - r->time = system_get_rtc_alarm(); - args->response_size = sizeof(*r); - - return EC_RES_SUCCESS; -} -DECLARE_HOST_COMMAND(EC_CMD_RTC_GET_ALARM, system_rtc_get_alarm, - EC_VER_MASK(0)); - -#endif /* CONFIG_PLATFORM_EC_HOSTCMD_RTC */ diff --git a/zephyr/shim/src/switchcap_gpio.c b/zephyr/shim/src/switchcap_gpio.c deleted file mode 100644 index c635978b8b..0000000000 --- a/zephyr/shim/src/switchcap_gpio.c +++ /dev/null @@ -1,47 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <devicetree.h> -#include "common.h" -#include "gpio.h" - -#if DT_NODE_EXISTS(DT_PATH(switchcap)) - -#if !DT_NODE_HAS_COMPAT(DT_PATH(switchcap), switchcap_gpio) -#error "Invalid /switchcap node in device tree" -#endif - -#define SC_PIN_ENABLE_PHANDLE \ - DT_PHANDLE_BY_IDX(DT_PATH(switchcap), enable_pin, 0) -#define SC_PIN_ENABLE \ - GPIO_SIGNAL(SC_PIN_ENABLE_PHANDLE) - -#define SC_PIN_POWER_GOOD_PHANDLE \ - DT_PHANDLE_BY_IDX(DT_PATH(switchcap), power_good_pin, 0) -#define SC_PIN_POWER_GOOD_EXISTS \ - DT_NODE_EXISTS(SC_PIN_POWER_GOOD_PHANDLE) -#define SC_PIN_POWER_GOOD \ - GPIO_SIGNAL(SC_PIN_POWER_GOOD_PHANDLE) - -void board_set_switchcap_power(int enable) -{ - gpio_set_level(SC_PIN_ENABLE, enable); -} - -int board_is_switchcap_enabled(void) -{ - return gpio_get_level(SC_PIN_ENABLE); -} - -int board_is_switchcap_power_good(void) -{ -#if SC_PIN_POWER_GOOD_EXISTS - return gpio_get_level(SC_PIN_POWER_GOOD); -#else - return 1; -#endif -} - -#endif diff --git a/zephyr/shim/src/switchcap_ln9310.c b/zephyr/shim/src/switchcap_ln9310.c deleted file mode 100644 index 0647c2d9ae..0000000000 --- a/zephyr/shim/src/switchcap_ln9310.c +++ /dev/null @@ -1,49 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <devicetree.h> -#include "common.h" -#include "gpio.h" -#include "ln9310.h" - -#if DT_NODE_EXISTS(DT_PATH(switchcap)) - -#if !DT_NODE_HAS_COMPAT(DT_PATH(switchcap), switchcap_ln9310) -#error "Invalid /switchcap node in device tree" -#endif - -#define SC_PIN_ENABLE_L_PHANDLE \ - DT_PHANDLE_BY_IDX(DT_PATH(switchcap), enable_l_pin, 0) -#define SC_PIN_ENABLE_L \ - GPIO_SIGNAL(SC_PIN_ENABLE_L_PHANDLE) - -#define SC_PORT_PHANDLE \ - DT_PHANDLE(DT_PATH(switchcap), port) -#define SC_PORT DT_STRING_UPPER_TOKEN(SC_PORT_PHANDLE, enum_name) - -#define SC_ADDR_FLAGS DT_STRING_UPPER_TOKEN(DT_PATH(switchcap), addr_flags) - -void board_set_switchcap_power(int enable) -{ - gpio_set_level(SC_PIN_ENABLE_L, !enable); - ln9310_software_enable(enable); -} - -int board_is_switchcap_enabled(void) -{ - return !gpio_get_level(SC_PIN_ENABLE_L); -} - -int board_is_switchcap_power_good(void) -{ - return ln9310_power_good(); -} - -const struct ln9310_config_t ln9310_config = { - .i2c_port = SC_PORT, - .i2c_addr_flags = SC_ADDR_FLAGS, -}; - -#endif diff --git a/zephyr/shim/src/system.c b/zephyr/shim/src/system.c deleted file mode 100644 index 8db8ba437a..0000000000 --- a/zephyr/shim/src/system.c +++ /dev/null @@ -1,378 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <device.h> -#include <drivers/bbram.h> -#include <drivers/cros_system.h> -#include <logging/log.h> - -#include "bbram.h" -#include "common.h" -#include "console.h" -#include "cros_version.h" -#include "system.h" -#include "watchdog.h" - -#define BBRAM_REGION_PD0 DT_PATH(named_bbram_regions, pd0) -#define BBRAM_REGION_PD1 DT_PATH(named_bbram_regions, pd1) -#define BBRAM_REGION_PD2 DT_PATH(named_bbram_regions, pd2) -#define BBRAM_REGION_TRY_SLOT DT_PATH(named_bbram_regions, try_slot) - -#define GET_BBRAM_OFFSET(node) \ - DT_PROP(DT_PATH(named_bbram_regions, node), offset) -#define GET_BBRAM_SIZE(node) DT_PROP(DT_PATH(named_bbram_regions, node), size) - -/* 2 second delay for waiting the H1 reset */ -#define WAIT_RESET_TIME \ - (CONFIG_PLATFORM_EC_PREINIT_HW_CYCLES_PER_SEC * 2 / \ - CONFIG_PLATFORM_EC_WAIT_RESET_CYCLES_PER_ITERATION) - -LOG_MODULE_REGISTER(shim_system, LOG_LEVEL_ERR); - -STATIC_IF_NOT(CONFIG_ZTEST) const struct device *bbram_dev; -static const struct device *sys_dev; - -/* Map idx to a bbram offset/size, or return -1 on invalid idx */ -static int bbram_lookup(enum system_bbram_idx idx, int *offset_out, - int *size_out) -{ - switch (idx) { - case SYSTEM_BBRAM_IDX_PD0: - *offset_out = DT_PROP(BBRAM_REGION_PD0, offset); - *size_out = DT_PROP(BBRAM_REGION_PD0, size); - break; - case SYSTEM_BBRAM_IDX_PD1: - *offset_out = DT_PROP(BBRAM_REGION_PD1, offset); - *size_out = DT_PROP(BBRAM_REGION_PD1, size); - break; - case SYSTEM_BBRAM_IDX_PD2: - *offset_out = DT_PROP(BBRAM_REGION_PD2, offset); - *size_out = DT_PROP(BBRAM_REGION_PD2, size); - break; - case SYSTEM_BBRAM_IDX_TRY_SLOT: - *offset_out = DT_PROP(BBRAM_REGION_TRY_SLOT, offset); - *size_out = DT_PROP(BBRAM_REGION_TRY_SLOT, size); - break; - default: - return EC_ERROR_INVAL; - } - return EC_SUCCESS; -} - -int system_get_bbram(enum system_bbram_idx idx, uint8_t *value) -{ - int offset, size, rc; - - if (bbram_dev == NULL) - return EC_ERROR_INVAL; - - rc = bbram_lookup(idx, &offset, &size); - if (rc) - return rc; - - rc = bbram_read(bbram_dev, offset, size, value); - - return rc ? EC_ERROR_INVAL : EC_SUCCESS; -} - -void chip_save_reset_flags(uint32_t flags) -{ - if (bbram_dev == NULL) { - LOG_ERR("bbram_dev doesn't binding"); - return; - } - - bbram_write(bbram_dev, GET_BBRAM_OFFSET(saved_reset_flags), - GET_BBRAM_SIZE(saved_reset_flags), (uint8_t *)&flags); -} - -uint32_t chip_read_reset_flags(void) -{ - uint32_t flags; - - if (bbram_dev == NULL) { - LOG_ERR("bbram_dev doesn't binding"); - return 0; - } - - bbram_read(bbram_dev, GET_BBRAM_OFFSET(saved_reset_flags), - GET_BBRAM_SIZE(saved_reset_flags), (uint8_t *)&flags); - - return flags; -} - -int system_set_scratchpad(uint32_t value) -{ - if (bbram_dev == NULL) { - LOG_ERR("bbram_dev doesn't binding"); - return -EC_ERROR_INVAL; - } - - return bbram_write(bbram_dev, GET_BBRAM_OFFSET(scratchpad), - GET_BBRAM_SIZE(scratchpad), (uint8_t *)&value); -} - -int system_get_scratchpad(uint32_t *value) -{ - if (bbram_dev == NULL) { - LOG_ERR("bbram_dev doesn't binding"); - return -EC_ERROR_INVAL; - } - - if (bbram_read(bbram_dev, GET_BBRAM_OFFSET(scratchpad), - GET_BBRAM_SIZE(scratchpad), (uint8_t *)value)) { - return -EC_ERROR_INVAL; - } - - return 0; -} - -void system_hibernate(uint32_t seconds, uint32_t microseconds) -{ - const struct device *sys_dev = device_get_binding("CROS_SYSTEM"); - int err; - - /* Flush console before hibernating */ - cflush(); - - if (board_hibernate) - board_hibernate(); - - /* Save 'wake-up from hibernate' reset flag */ - chip_save_reset_flags(chip_read_reset_flags() | - EC_RESET_FLAG_HIBERNATE); - - err = cros_system_hibernate(sys_dev, seconds, microseconds); - if (err < 0) { - LOG_ERR("hibernate failed %d", err); - return; - } - - /* should never reach this point */ - while (1) - continue; -} - -#ifdef CONFIG_PM -/** - * Print low power idle statistics - */ -static int command_idle_stats(int argc, char **argv) -{ - const struct device *sys_dev = device_get_binding("CROS_SYSTEM"); - - timestamp_t ts = get_time(); - uint64_t deep_sleep_ticks = cros_system_deep_sleep_ticks(sys_dev); - - ccprintf("Time spent in deep-sleep: %.6llds\n", - k_ticks_to_us_near64(deep_sleep_ticks)); - ccprintf("Total time on: %.6llds\n", ts.val); - return EC_SUCCESS; -} -DECLARE_CONSOLE_COMMAND(idlestats, command_idle_stats, - "", - "Print last idle stats"); -#endif - -const char *system_get_chip_vendor(void) -{ - const struct device *sys_dev = device_get_binding("CROS_SYSTEM"); - - return cros_system_chip_vendor(sys_dev); -} - -const char *system_get_chip_name(void) -{ - const struct device *sys_dev = device_get_binding("CROS_SYSTEM"); - - return cros_system_chip_name(sys_dev); -} - -const char *system_get_chip_revision(void) -{ - const struct device *sys_dev = device_get_binding("CROS_SYSTEM"); - - return cros_system_chip_revision(sys_dev); -} - -void system_reset(int flags) -{ - int err; - uint32_t save_flags; - - if (!sys_dev) - LOG_ERR("sys_dev get binding failed"); - - /* Disable interrupts to avoid task swaps during reboot */ - interrupt_disable_all(); - - /* Get flags to be saved in BBRAM */ - system_encode_save_flags(flags, &save_flags); - - /* Store flags to battery backed RAM. */ - chip_save_reset_flags(save_flags); - - /* If WAIT_EXT is set, then allow 10 seconds for external reset */ - if (flags & SYSTEM_RESET_WAIT_EXT) { - int i; - - /* Wait 10 seconds for external reset */ - for (i = 0; i < 1000; i++) { - watchdog_reload(); - udelay(10000); - } - } - - err = cros_system_soc_reset(sys_dev); - - if (err < 0) - LOG_ERR("soc reset failed"); - - /* should never return */ - while (1) - continue; -} - -static int check_reset_cause(void) -{ - uint32_t chip_flags = 0; /* used to write back to the BBRAM */ - uint32_t system_flags = chip_read_reset_flags(); /* system reset flag */ - int chip_reset_cause = 0; /* chip-level reset cause */ - - chip_reset_cause = cros_system_get_reset_cause(sys_dev); - if (chip_reset_cause < 0) - return -1; - - /* - * TODO(b/182876692): Implement CONFIG_POWER_BUTTON_INIT_IDLE & - * CONFIG_BOARD_FORCE_RESET_PIN. - */ - - switch (chip_reset_cause) { - case POWERUP: - system_flags |= EC_RESET_FLAG_POWER_ON; - /* - * Power-on restart, so set a flag and save it for the next - * imminent reset. Later code will check for this flag and wait - * for the second reset. Waking from PSL hibernate is power-on - * for EC but not for H1, so do not wait for the second reset. - */ - if (IS_ENABLED(CONFIG_BOARD_RESET_AFTER_POWER_ON) && - ((system_flags & EC_RESET_FLAG_HIBERNATE) == 0)) { - system_flags |= EC_RESET_FLAG_INITIAL_PWR; - chip_flags |= EC_RESET_FLAG_INITIAL_PWR; - } - break; - - case VCC1_RST_PIN: - /* - * If configured, check the saved flags to see whether the - * previous restart was a power-on, in which case treat this - * restart as a power-on as well. This is to workaround the fact - * that the H1 will reset the EC at power up. - */ - if (IS_ENABLED(CONFIG_BOARD_RESET_AFTER_POWER_ON)) { - if (system_flags & EC_RESET_FLAG_INITIAL_PWR) { - /* - * The previous restart was a power-on so treat - * this restart as that, and clear the flag so - * later code will not wait for the second - * reset. - */ - system_flags = (system_flags & - ~EC_RESET_FLAG_INITIAL_PWR) | - EC_RESET_FLAG_POWER_ON; - } else { - /* - * No previous reset flag, so this is a - * subsequent restart i.e any restarts after the - * second restart caused by the H1. - */ - system_flags |= EC_RESET_FLAG_RESET_PIN; - } - } else { - system_flags |= EC_RESET_FLAG_RESET_PIN; - } - break; - - case DEBUG_RST: - system_flags |= EC_RESET_FLAG_SOFT; - break; - - case WATCHDOG_RST: - /* - * Don't set EC_RESET_FLAG_WATCHDOG flag if watchdog is issued - * by system_reset or hibernate in order to distinguish reset - * cause is panic reason or not. - */ - if (!(system_flags & (EC_RESET_FLAG_SOFT | EC_RESET_FLAG_HARD | - EC_RESET_FLAG_HIBERNATE))) - system_flags |= EC_RESET_FLAG_WATCHDOG; - break; - } - - /* Clear & set the reset flags for the following reset. */ - chip_save_reset_flags(chip_flags); - - /* Set the system reset flags. */ - system_set_reset_flags(system_flags); - - return 0; -} - -static int system_preinitialize(const struct device *unused) -{ - ARG_UNUSED(unused); - -#if DT_NODE_EXISTS(DT_NODELABEL(bbram)) - bbram_dev = DEVICE_DT_GET(DT_NODELABEL(bbram)); - if (!device_is_ready(bbram_dev)) { - LOG_ERR("Error: device %s is not ready", bbram_dev->name); - return -1; - } -#endif - - sys_dev = device_get_binding("CROS_SYSTEM"); - if (!sys_dev) { - /* - * TODO(b/183022804): This should not happen in normal - * operation. Check whether the error check can be change to - * build-time error, or at least a fatal run-time error. - */ - LOG_ERR("sys_dev gets binding failed"); - return -1; - } - - /* check the reset cause */ - if (check_reset_cause() != 0) { - LOG_ERR("check the reset cause failed"); - return -1; - } - - /* - * For some boards on power-on, the EC is reset by the H1 after - * power-on, so the EC sees 2 resets. This config enables the EC to save - * a flag on the first power-up restart, and then wait for the second - * reset before any other setup is done (such as GPIOs, timers, UART - * etc.) On the second reset, the saved flag is used to detect the - * previous power-on, and treat the second reset as a power-on instead - * of a reset. - */ -#ifdef CONFIG_BOARD_RESET_AFTER_POWER_ON - if (system_get_reset_flags() & EC_RESET_FLAG_INITIAL_PWR) { - /* - * The current initial stage couldn't use the kernel delay - * function. Use CPU nop instruction to wait for the external - * reset from H1. - */ - for (uint32_t i = WAIT_RESET_TIME; i; i--) - arch_nop(); - } -#endif - return 0; -} - -SYS_INIT(system_preinitialize, PRE_KERNEL_1, - CONFIG_PLATFORM_EC_SYSTEM_PRE_INIT_PRIORITY); diff --git a/zephyr/shim/src/tasks.c b/zephyr/shim/src/tasks.c deleted file mode 100644 index 2f1fec16d6..0000000000 --- a/zephyr/shim/src/tasks.c +++ /dev/null @@ -1,353 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <kernel.h> -#include <init.h> -#include <sys/atomic.h> -#include <shell/shell.h> - -#include "common.h" -#include "timer.h" -#include "task.h" - -/* We need to ensure that is one lower priority for the deferred task */ -BUILD_ASSERT(CONFIG_NUM_PREEMPT_PRIORITIES + 1 >= TASK_ID_COUNT, - "Must increase number of available preempt priorities"); - -/* Declare all task stacks here */ -#define CROS_EC_TASK(name, e, p, size) \ - K_THREAD_STACK_DEFINE(name##_STACK, size); -#define TASK_TEST(name, e, p, size) CROS_EC_TASK(name, e, p, size) -CROS_EC_TASK_LIST -#undef CROS_EC_TASK -#undef TASK_TEST - -/* Forward declare all task entry point functions */ -#define CROS_EC_TASK(name, entry, ...) void entry(void *p); -#define TASK_TEST(name, entry, ...) CROS_EC_TASK(name, entry) -CROS_EC_TASK_LIST -#undef CROS_EC_TASK -#undef TASK_TEST - -/** Context for each CROS EC task that is run in its own zephyr thread */ -struct task_ctx { -#ifdef CONFIG_THREAD_NAME - /** Name of thread (for debugging) */ - const char *name; -#endif - /** Zephyr thread structure that hosts EC tasks */ - struct k_thread zephyr_thread; - /** Zephyr thread id for above thread */ - k_tid_t zephyr_tid; - /** Address of Zephyr thread's stack */ - k_thread_stack_t *stack; - /** Usabled size in bytes of above thread stack */ - size_t stack_size; - /** Task (platform/ec) entry point */ - void (*entry)(void *p); - /** The parameter that is passed into the task entry point */ - intptr_t parameter; - /** A wait-able event that is raised when a new task event is posted */ - struct k_poll_signal new_event; - /** The current platform/ec events set for this task/thread */ - uint32_t event_mask; - /** - * The timer associated with this task, which can be set using - * timer_arm(). - */ - struct k_timer timer; -}; - -#ifdef CONFIG_THREAD_NAME -#define CROS_EC_TASK(_name, _entry, _parameter, _size) \ - { \ - .entry = _entry, \ - .parameter = _parameter, \ - .stack = _name##_STACK, \ - .stack_size = _size, \ - .name = #_name, \ - }, -#else -#define CROS_EC_TASK(_name, _entry, _parameter, _size) \ - { \ - .entry = _entry, \ - .parameter = _parameter, \ - .stack = _name##_STACK, \ - .stack_size = _size, \ - }, -#endif /* CONFIG_THREAD_NAME */ -#define TASK_TEST(_name, _entry, _parameter, _size) \ - CROS_EC_TASK(_name, _entry, _parameter, _size) -static struct task_ctx shimmed_tasks[] = { - CROS_EC_TASK_LIST -#ifdef TEST_BUILD - [TASK_ID_TEST_RUNNER] = {}, -#endif -}; -static int tasks_started; -#undef CROS_EC_TASK -#undef TASK_TEST - -task_id_t task_get_current(void) -{ - for (size_t i = 0; i < ARRAY_SIZE(shimmed_tasks); ++i) { - if (shimmed_tasks[i].zephyr_tid == k_current_get()) { - return i; - } - } - -#if defined(HAS_TASK_HOOKS) - /* Hooks ID should be returned for deferred calls */ - if (k_current_get() == &k_sys_work_q.thread) { - return TASK_ID_HOOKS; - } -#endif /* HAS_TASK_HOOKS */ - - __ASSERT(false, "Task index out of bound"); - return 0; -} - -uint32_t *task_get_event_bitmap(task_id_t cros_task_id) -{ - struct task_ctx *const ctx = &shimmed_tasks[cros_task_id]; - - return &ctx->event_mask; -} - -uint32_t task_set_event(task_id_t cros_task_id, uint32_t event) -{ - struct task_ctx *const ctx = &shimmed_tasks[cros_task_id]; - - atomic_or(&ctx->event_mask, event); - k_poll_signal_raise(&ctx->new_event, 0); - - return 0; -} - -uint32_t task_wait_event(int timeout_us) -{ - struct task_ctx *const ctx = &shimmed_tasks[task_get_current()]; - const k_timeout_t timeout = (timeout_us == -1) ? K_FOREVER : - K_USEC(timeout_us); - const int64_t tick_deadline = - k_uptime_ticks() + k_us_to_ticks_near64(timeout_us); - - struct k_poll_event poll_events[1] = { - K_POLL_EVENT_INITIALIZER(K_POLL_TYPE_SIGNAL, - K_POLL_MODE_NOTIFY_ONLY, - &ctx->new_event), - }; - - /* Wait for signal, then clear it before reading events */ - const int rv = k_poll(poll_events, ARRAY_SIZE(poll_events), timeout); - - k_poll_signal_reset(&ctx->new_event); - uint32_t events = atomic_set(&ctx->event_mask, 0); - - if (rv == -EAGAIN) { - events |= TASK_EVENT_TIMER; - } - - /* If we didn't get an event, we need to wait again. There is a very - * small change of us reading the event_mask one signaled event too - * early. In that case, just wait again for the remaining timeout - */ - if (events == 0) { - const int64_t ticks_left = tick_deadline - k_uptime_ticks(); - - if (ticks_left > 0) { - return task_wait_event( - k_ticks_to_us_near64(ticks_left)); - } - - events |= TASK_EVENT_TIMER; - } - - return events; -} - -uint32_t task_wait_event_mask(uint32_t event_mask, int timeout_us) -{ - struct task_ctx *const ctx = &shimmed_tasks[task_get_current()]; - uint32_t events = 0; - const int64_t tick_deadline = - k_uptime_ticks() + k_us_to_ticks_near64(timeout_us); - - /* Need to return timeout flags if it occurs as well */ - event_mask |= TASK_EVENT_TIMER; - - while (!(event_mask & events)) { - const int64_t ticks_left = tick_deadline - k_uptime_ticks(); - - if (timeout_us != -1 && ticks_left <= 0) { - events |= TASK_EVENT_TIMER; - break; - } - - struct k_poll_event poll_events[1] = { - K_POLL_EVENT_INITIALIZER(K_POLL_TYPE_SIGNAL, - K_POLL_MODE_NOTIFY_ONLY, - &ctx->new_event), - }; - - /* Ensure to honor the -1 timeout as FOREVER */ - k_poll(poll_events, ARRAY_SIZE(poll_events), - timeout_us == -1 ? K_FOREVER : K_TICKS(ticks_left)); - k_poll_signal_reset(&ctx->new_event); - events |= atomic_set(&ctx->event_mask, 0); - } - - /* Replace any events that weren't in the mask */ - if (events & ~event_mask) { - atomic_or(&ctx->event_mask, events & ~event_mask); - k_poll_signal_raise(&ctx->new_event, 0); - } - - return events & event_mask; -} - -static void task_entry(void *task_contex, void *unused1, void *unused2) -{ - ARG_UNUSED(unused1); - ARG_UNUSED(unused2); - - struct task_ctx *const ctx = (struct task_ctx *)task_contex; - -#ifdef CONFIG_THREAD_NAME - /* Name thread for debugging */ - k_thread_name_set(ctx->zephyr_tid, ctx->name); -#endif - - /* Call into task entry point */ - ctx->entry((void *)ctx->parameter); -} - -/* - * Callback function to use with k_timer_start to set the - * TASK_EVENT_TIMER event on a task. - */ -static void timer_expire(struct k_timer *timer_id) -{ - struct task_ctx *const ctx = - CONTAINER_OF(timer_id, struct task_ctx, timer); - task_id_t cros_ec_task_id = ctx - shimmed_tasks; - - task_set_event(cros_ec_task_id, TASK_EVENT_TIMER); -} - -int timer_arm(timestamp_t event, task_id_t cros_ec_task_id) -{ - timestamp_t now = get_time(); - struct task_ctx *const ctx = &shimmed_tasks[cros_ec_task_id]; - - if (event.val <= now.val) { - /* Timer requested for now or in the past, fire right away */ - task_set_event(cros_ec_task_id, TASK_EVENT_TIMER); - return EC_SUCCESS; - } - - /* Check for a running timer */ - if (k_timer_remaining_get(&ctx->timer)) - return EC_ERROR_BUSY; - - k_timer_start(&ctx->timer, K_USEC(event.val - now.val), K_NO_WAIT); - return EC_SUCCESS; -} - -void timer_cancel(task_id_t cros_ec_task_id) -{ - struct task_ctx *const ctx = &shimmed_tasks[cros_ec_task_id]; - - k_timer_stop(&ctx->timer); -} - -#ifdef TEST_BUILD -void set_test_runner_tid(void) -{ - shimmed_tasks[TASK_ID_TEST_RUNNER].zephyr_tid = k_current_get(); -} -#endif - -void start_ec_tasks(void) -{ - for (size_t i = 0; i < ARRAY_SIZE(shimmed_tasks); ++i) { - struct task_ctx *const ctx = &shimmed_tasks[i]; - - k_timer_init(&ctx->timer, timer_expire, NULL); - -#ifdef TEST_BUILD - /* Do not create thread for test runner; it will be set later */ - if (i == TASK_ID_TEST_RUNNER) { - ctx->zephyr_tid = NULL; - continue; - } -#endif - /* - * TODO(b/172361873): Add K_FP_REGS for FPU tasks. See - * comment in config.h for CONFIG_TASK_LIST for existing flags - * implementation. - */ - ctx->zephyr_tid = k_thread_create( - &ctx->zephyr_thread, ctx->stack, ctx->stack_size, - task_entry, ctx, NULL, NULL, - K_PRIO_PREEMPT(TASK_ID_COUNT - i - 1), 0, K_NO_WAIT); - } - tasks_started = 1; -} - -/* - * Initialize all of the kernel objects before application code starts. - * This allows us to set events on tasks before they even start, e.g. in - * INIT_HOOKS. - */ -int init_signals(const struct device *unused) -{ - ARG_UNUSED(unused); - - for (size_t i = 0; i < ARRAY_SIZE(shimmed_tasks); ++i) { - struct task_ctx *const ctx = &shimmed_tasks[i]; - - /* Initialize the new_event structure */ - k_poll_signal_init(&ctx->new_event); - } - - return 0; -} -SYS_INIT(init_signals, POST_KERNEL, 50); - -int task_start_called(void) -{ - return tasks_started; -} - -void task_disable_task(task_id_t tskid) -{ - /* TODO(b/190203712): Implement this */ -} - -void task_clear_pending_irq(int irq) -{ -#if CONFIG_ITE_IT8XXX2_INTC - ite_intc_isr_clear(irq); -#endif -} - -void task_enable_irq(int irq) -{ - arch_irq_enable(irq); -} - -inline int in_interrupt_context(void) -{ - return k_is_in_isr(); -} - -#if IS_ENABLED(CONFIG_KERNEL_SHELL) && IS_ENABLED(CONFIG_THREAD_MONITOR) -static int taskinfo(const struct shell *shell, size_t argc, char **argv) -{ - return shell_execute_cmd(shell, "kernel threads"); -} -SHELL_CMD_REGISTER(taskinfo, NULL, "Threads statistics", taskinfo); -#endif diff --git a/zephyr/shim/src/temp_sensors.c b/zephyr/shim/src/temp_sensors.c deleted file mode 100644 index 4d8be4fa42..0000000000 --- a/zephyr/shim/src/temp_sensors.c +++ /dev/null @@ -1,52 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "temp_sensor.h" -#include "temp_sensor/temp_sensor.h" -#include "adc.h" -#include "temp_sensor/thermistor.h" - -#if DT_NODE_EXISTS(DT_PATH(named_temp_sensors)) -static int thermistor_get_temp(const struct temp_sensor_t *sensor, - int *temp_ptr) -{ - return thermistor_get_temperature(sensor->idx, temp_ptr, - sensor->thermistor); -} - -#define GET_THERMISTOR_DATUM(node_sample_id) \ - [DT_PROP(node_sample_id, \ - sample_index)] = { .mv = DT_PROP(node_sample_id, milivolt), \ - .temp = DT_PROP(node_sample_id, temp) }, - -#define DEFINE_THERMISTOR_DATA(node_id) \ - static const struct thermistor_data_pair DT_CAT( \ - node_id, _thermistor_data)[] = { \ - DT_FOREACH_CHILD(node_id, GET_THERMISTOR_DATUM) \ - }; - -#define GET_THERMISTOR_INFO(node_id) \ - (&(struct thermistor_info){ \ - .scaling_factor = DT_PROP(node_id, scaling_factor), \ - .num_pairs = DT_PROP(node_id, num_pairs), \ - .data = DT_CAT(node_id, _thermistor_data), \ - }) - -#define TEMP_THERMISTOR(node_id) \ - [ZSHIM_TEMP_SENSOR_ID(node_id)] = { \ - .name = DT_LABEL(node_id), \ - .read = &thermistor_get_temp, \ - .idx = ZSHIM_ADC_ID(DT_PHANDLE(node_id, adc)), \ - .type = TEMP_SENSOR_TYPE_BOARD, \ - .thermistor = \ - GET_THERMISTOR_INFO(DT_PHANDLE(node_id, thermistor)), \ - }, - -DT_FOREACH_STATUS_OKAY(cros_ec_thermistor, DEFINE_THERMISTOR_DATA) - -const struct temp_sensor_t temp_sensors[] = { - DT_FOREACH_STATUS_OKAY(cros_ec_temp_sensor, TEMP_THERMISTOR) -}; -#endif /* named_temp_sensors */ diff --git a/zephyr/shim/src/test_util.c b/zephyr/shim/src/test_util.c deleted file mode 100644 index 28be596043..0000000000 --- a/zephyr/shim/src/test_util.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Test utilities. - */ - -#include "test_util.h" - -/* Linear congruential pseudo random number generator */ -uint32_t prng(uint32_t seed) -{ - return 22695477 * seed + 1; -} - -uint32_t prng_no_seed(void) -{ - static uint32_t seed = 0x1234abcd; - return seed = prng(seed); -} diff --git a/zephyr/shim/src/thermal.c b/zephyr/shim/src/thermal.c deleted file mode 100644 index c31e2bfcc6..0000000000 --- a/zephyr/shim/src/thermal.c +++ /dev/null @@ -1,52 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "temp_sensor.h" -#include "temp_sensor/temp_sensor.h" -#include "ec_commands.h" - -#define THERMAL_CONFIG(node_id) \ - [ZSHIM_TEMP_SENSOR_ID(node_id)] = { \ - .temp_host = { \ - [EC_TEMP_THRESH_WARN] = \ - C_TO_K(DT_PROP_OR(node_id, \ - temp_host_warn, \ - -273)), \ - [EC_TEMP_THRESH_HIGH] = \ - C_TO_K(DT_PROP_OR(node_id, \ - temp_host_high, \ - -273)), \ - [EC_TEMP_THRESH_HALT] = \ - C_TO_K(DT_PROP_OR(node_id, \ - temp_host_halt, \ - -273)), \ - }, \ - .temp_host_release = { \ - [EC_TEMP_THRESH_WARN] = C_TO_K( \ - DT_PROP_OR(node_id, \ - temp_host_release_warn, \ - -273)), \ - [EC_TEMP_THRESH_HIGH] = C_TO_K( \ - DT_PROP_OR(node_id, \ - temp_host_release_high, \ - -273)), \ - [EC_TEMP_THRESH_HALT] = C_TO_K( \ - DT_PROP_OR(node_id, \ - temp_host_release_halt, \ - -273)), \ - }, \ - .temp_fan_off = C_TO_K(DT_PROP_OR(node_id, \ - temp_fan_off, \ - -273)), \ - .temp_fan_max = C_TO_K(DT_PROP_OR(node_id, \ - temp_fan_max, \ - -273)), \ - }, - -struct ec_thermal_config thermal_params[] = { -#if DT_NODE_EXISTS(DT_PATH(named_temp_sensors)) - DT_FOREACH_CHILD(DT_PATH(named_temp_sensors), THERMAL_CONFIG) -#endif /* named_temp_sensors */ -}; diff --git a/zephyr/shim/src/watchdog.c b/zephyr/shim/src/watchdog.c deleted file mode 100644 index 4c78ac9b0f..0000000000 --- a/zephyr/shim/src/watchdog.c +++ /dev/null @@ -1,78 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <device.h> -#include <drivers/watchdog.h> -#include <logging/log.h> -#include <zephyr.h> - -#include "config.h" -#include "hooks.h" -#include "watchdog.h" - -LOG_MODULE_REGISTER(watchdog_shim, LOG_LEVEL_ERR); - -static void wdt_warning_handler(const struct device *wdt_dev, int channel_id) -{ - /* TODO(b/176523207): watchdog warning message */ - printk("Watchdog deadline is close!\n"); -} - -int watchdog_init(void) -{ - int err; - const struct device *wdt; - struct wdt_timeout_cfg wdt_config; - - wdt = DEVICE_DT_GET(DT_NODELABEL(twd0)); - if (!device_is_ready(wdt)) { - LOG_ERR("Error: device %s is not ready", wdt->name); - return -1; - } - - /* Reset SoC when watchdog timer expires. */ - wdt_config.flags = WDT_FLAG_RESET_SOC; - - /* - * Set the Warning timer as CONFIG_AUX_TIMER_PERIOD_MS. - * Then the watchdog reset time = CONFIG_WATCHDOG_PERIOD_MS. - */ - wdt_config.window.min = 0U; - wdt_config.window.max = CONFIG_AUX_TIMER_PERIOD_MS; - wdt_config.callback = wdt_warning_handler; - - err = wdt_install_timeout(wdt, &wdt_config); - - /* If watchdog is running, reinstall it. */ - if (err == -EBUSY) { - wdt_disable(wdt); - err = wdt_install_timeout(wdt, &wdt_config); - } - - if (err < 0) { - LOG_ERR("Watchdog install error"); - return err; - } - - err = wdt_setup(wdt, 0); - if (err < 0) { - LOG_ERR("Watchdog setup error"); - return err; - } - - return EC_SUCCESS; -} - -void watchdog_reload(void) -{ - const struct device *wdt; - - wdt = DEVICE_DT_GET(DT_NODELABEL(twd0)); - if (!device_is_ready(wdt)) - LOG_ERR("Error: device %s is not ready", wdt->name); - - wdt_feed(wdt, 0); -} -DECLARE_HOOK(HOOK_TICK, watchdog_reload, HOOK_PRIO_DEFAULT); diff --git a/zephyr/shim/src/ztest_system.c b/zephyr/shim/src/ztest_system.c deleted file mode 100644 index 14796b5bd5..0000000000 --- a/zephyr/shim/src/ztest_system.c +++ /dev/null @@ -1,69 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "system.h" -#include "cros_version.h" - -/* Ongoing actions preventing going into deep-sleep mode. */ -uint32_t sleep_mask; - -void system_common_pre_init(void) -{ -} - -int system_add_jump_tag(uint16_t tag, int version, int size, const void *data) -{ - return EC_SUCCESS; -} - -const uint8_t *system_get_jump_tag(uint16_t tag, int *version, int *size) -{ - return NULL; -} - -int system_jumped_late(void) -{ - return 0; -} - -enum ec_image system_get_image_copy(void) -{ - return EC_IMAGE_RW; -} - -int system_is_locked(void) -{ - return 0; -} - -int system_is_in_rw(void) -{ - return 1; -} - -uint32_t system_get_reset_flags(void) -{ - return 0; -} - -void system_print_banner(void) -{ - printk("Image: %s\n", build_info); -} - -void system_set_reset_flags(uint32_t flags) -{ -} - -struct jump_data *get_jump_data(void) -{ - return NULL; -} - -__attribute__((weak)) -void system_reset(int flags) -{ - __builtin_unreachable(); -} |