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| author | Bernardo Perez Priego <bernardo.perez.priego@intel.com> | 2022-02-25 19:30:45 -0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2022-03-09 00:58:57 +0000 |
| commit | 5e4ae33ebb39a245e31f146925362b772c738548 (patch) | |
| tree | 08c4a7437792b61ebf3ae8f2ccc0f0520afe1ad8 /zephyr/subsys/ap_pwrseq/include | |
| parent | 3fbd8014874439aeb039531b50f62c1fe4a7d032 (diff) | |
| download | chrome-ec-5e4ae33ebb39a245e31f146925362b772c738548.tar.gz | |
zephyr: subsys/ap_pwrseq: Replace power signal functions
New implementation of X86 power signals offers flexibility to retrieve
signal using different methods without changing interface, this way
we can replace 'intel_x86_get_pg_ec_all_sys_pwrgd' and
'intel_x86_get_pg_ec_dsw_pwrok' with corresponding enum power_signal
using 'power_signal_is_asserted'.
BUG=b:203446068
BRANCH=none
TEST=On Nivviks, AP boots to S0.
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Change-Id: I3efacf83dbd02bb3b697538bf3e05d673fabfe17
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3492941
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Commit-Queue: Andrew McRae <amcrae@google.com>
Tested-by: Andrew McRae <amcrae@google.com>
Diffstat (limited to 'zephyr/subsys/ap_pwrseq/include')
| -rw-r--r-- | zephyr/subsys/ap_pwrseq/include/x86_non_dsx_common_pwrseq_sm_handler.h | 1 | ||||
| -rw-r--r-- | zephyr/subsys/ap_pwrseq/include/x86_power_signals.h | 2 |
2 files changed, 1 insertions, 2 deletions
diff --git a/zephyr/subsys/ap_pwrseq/include/x86_non_dsx_common_pwrseq_sm_handler.h b/zephyr/subsys/ap_pwrseq/include/x86_non_dsx_common_pwrseq_sm_handler.h index 98b83514b7..f14d5a01db 100644 --- a/zephyr/subsys/ap_pwrseq/include/x86_non_dsx_common_pwrseq_sm_handler.h +++ b/zephyr/subsys/ap_pwrseq/include/x86_non_dsx_common_pwrseq_sm_handler.h @@ -25,7 +25,6 @@ struct common_pwrseq_config { /* The wait time is ~150 msec, allow for safety margin. */ #define IN_PCH_SLP_SUS_WAIT_TIME_MS 250 -void power_update_signals(void); enum power_states_ndsx chipset_pwr_sm_run( enum power_states_ndsx curr_state, const struct common_pwrseq_config *com_cfg); diff --git a/zephyr/subsys/ap_pwrseq/include/x86_power_signals.h b/zephyr/subsys/ap_pwrseq/include/x86_power_signals.h index b09bbf10c3..1832c4877c 100644 --- a/zephyr/subsys/ap_pwrseq/include/x86_power_signals.h +++ b/zephyr/subsys/ap_pwrseq/include/x86_power_signals.h @@ -19,7 +19,7 @@ #define IN_ALL_PM_SLP (IN_PCH_SLP_S3 | \ IN_PCH_SLP_S4 | \ IN_PCH_SLP_SUS) -#define IN_PGOOD_ALL_CORE POWER_SIGNAL_MASK(PWR_PG_PP3300) +#define IN_PGOOD_ALL_CORE POWER_SIGNAL_MASK(PWR_DSW_PWROK) #define IN_ALL_S0_MASK (IN_PGOOD_ALL_CORE | IN_ALL_PM_SLP) #define IN_ALL_S0_VALUE IN_PGOOD_ALL_CORE #define CHIPSET_G3S5_POWERUP_SIGNAL IN_PCH_SLP_SUS_DEASSERTED |