ap_pwrseq: console command to enable debug mode

Intel debugger puts SOC in boot halt mode for step debugging,
during this time EC may lose Sx lines, Adding this console
command to enable debug_mode and avoid force shutdown.

Below EC console command can be used to prevent force shutdown:
1. debug_mode enable  - to prevent force shutdown.
2. debug_mode disable - to follow normal power seq.

debug_mode is disabled by default.

BRANCH=None
BUG=None
TEST=force shutdown should be preveneted if debug_mode is enabled.

Signed-off-by: Rajesh Kumar <rajesh3.kumar@intel.com>
Change-Id: I3fe432d287c9e033d3bb2cb253e436dd2801c6c2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3902601
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>

2 files changed, 47 insertions, 0 deletions

diff --git a/zephyr/subsys/ap_pwrseq/Kconfig b/zephyr/subsys/ap_pwrseq/Kconfig
index 677bca7c6d..8fc2423a15 100644
--- a/zephyr/subsys/ap_pwrseq/Kconfig
+++ b/zephyr/subsys/ap_pwrseq/Kconfig
@@ -117,4 +117,13 @@ config AP_PWRSEQ_S0IX_ERROR_RECOVERY
 	  Failure information is reported via the EC_CMD_HOST_SLEEP_EVENT host
 	  command.
 
+config AP_PWRSEQ_DEBUG_MODE_COMMAND
+	bool "Console commands to enable/disable AP debug mode"
+	depends on X86_NON_DSX_PWRSEQ
+	default y
+	help
+	  Intel debugger puts SOC in boot halt mode for step debugging,
+	  during this time EC may lose Sx lines, This option enables console
+	  command to enable debug mode and prevent force shutdown.
+
 endif
diff --git a/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_sm_handler.c b/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_sm_handler.c
index 48cab7f6e7..09846759ee 100644
--- a/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_sm_handler.c
+++ b/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_sm_handler.c
@@ -7,6 +7,7 @@
 #include <zephyr/init.h>
 
 #include <x86_non_dsx_common_pwrseq_sm_handler.h>
+#include "zephyr_console_shim.h"
 
 static K_KERNEL_STACK_DEFINE(pwrseq_thread_stack, CONFIG_AP_PWRSEQ_STACK_SIZE);
 static struct k_thread pwrseq_thread_data;
@@ -30,6 +31,10 @@ static ATOMIC_DEFINE(flags, FLAGS_MAX);
 /* Delay in ms when starting from G3 */
 static uint32_t start_from_g3_delay_ms;
 
+#ifdef CONFIG_AP_PWRSEQ_DEBUG_MODE_COMMAND
+static bool in_debug_mode;
+#endif
+
 LOG_MODULE_REGISTER(ap_pwrseq, CONFIG_AP_PWRSEQ_LOG_LEVEL);
 
 /**
@@ -144,6 +149,13 @@ void request_start_from_g3(void)
 
 void ap_power_force_shutdown(enum ap_power_shutdown_reason reason)
 {
+#ifdef CONFIG_AP_PWRSEQ_DEBUG_MODE_COMMAND
+	/* This prevents force shutdown if debug mode is enabled */
+	if (in_debug_mode) {
+		LOG_WRN("debug_mode is enabled, preventing force shutdown");
+		return;
+	}
+#endif /* CONFIG_AP_PWRSEQ_DEBUG_MODE_COMMAND */
 	board_ap_power_force_shutdown();
 }
 
@@ -642,3 +654,29 @@ static int pwrseq_init(const struct device *dev)
  * the signals depend upon, such as GPIO, ADC etc.
  */
 SYS_INIT(pwrseq_init, APPLICATION, CONFIG_APPLICATION_INIT_PRIORITY);
+
+#ifdef CONFIG_AP_PWRSEQ_DEBUG_MODE_COMMAND
+/*
+ * Intel debugger puts SOC in boot halt mode for step debugging,
+ * during this time EC may lose Sx lines, Adding this console
+ * command to avoid force shutdown.
+ */
+static int disable_force_shutdown(int argc, const char **argv)
+{
+	if (argc > 1) {
+		if (!strcmp(argv[1], "enable")) {
+			in_debug_mode = true;
+		} else if (!strcmp(argv[1], "disable")) {
+			in_debug_mode = false;
+		} else {
+			return EC_ERROR_PARAM1;
+		}
+	}
+	LOG_INF("debug_mode = %s", (in_debug_mode ? "enabled" : "disabled"));
+
+	return EC_SUCCESS;
+}
+
+DECLARE_CONSOLE_COMMAND(debug_mode, disable_force_shutdown, "[enable|disable]",
+			"Prevents force shutdown if enabled");
+#endif /* CONFIG_AP_PWRSEQ_DEBUG_MODE_COMMAND */