diff options
99 files changed, 285 insertions, 238 deletions
diff --git a/board/mchpevb1/board.c b/board/mchpevb1/board.c index 73cec110bb..aa74d07a0d 100644 --- a/board/mchpevb1/board.c +++ b/board/mchpevb1/board.c @@ -975,7 +975,7 @@ DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, board_spi_disable, MOTION_SENSE_HOOK_PRIO + 1); #ifdef MEC1701_EVB_TACH_TEST /* PWM/TACH test */ -void tach0_isr(void) +static void tach0_isr(void) { MCHP_INT_DISABLE(MCHP_TACH_GIRQ) = MCHP_TACH_GIRQ_BIT(0); MCHP_INT_SOURCE(MCHP_TACH_GIRQ) = MCHP_TACH_GIRQ_BIT(0); diff --git a/board/twinkie/injector.c b/board/twinkie/injector.c index cae1d3557f..ef5bfb3e32 100644 --- a/board/twinkie/injector.c +++ b/board/twinkie/injector.c @@ -67,7 +67,7 @@ static const struct res_cfg { #ifdef HAS_TASK_SNIFFER /* we don't have the default DMA handlers */ -void dma_event_interrupt_channel_3(void) +static void dma_event_interrupt_channel_3(void) { if (STM32_DMA1_REGS->isr & STM32_DMA_ISR_TCIF(STM32_DMAC_CH3)) { dma_clear_isr(STM32_DMAC_CH3); diff --git a/board/twinkie/simpletrace.c b/board/twinkie/simpletrace.c index 9f151f761f..811bd428fd 100644 --- a/board/twinkie/simpletrace.c +++ b/board/twinkie/simpletrace.c @@ -160,11 +160,12 @@ static void print_error(enum pd_rx_errors err) ccprintf("ERR %d\n", err); } +#ifdef HAS_TASK_SNIFFER /* keep track of RX edge timing in order to trigger receive */ static timestamp_t rx_edge_ts[2][PD_RX_TRANSITION_COUNT]; static int rx_edge_ts_idx[2]; -void rx_event(void) +static void rx_event(void) { int pending, i; int next_idx; @@ -209,7 +210,6 @@ void rx_event(void) } } } -#ifdef HAS_TASK_SNIFFER DECLARE_IRQ(STM32_IRQ_COMP, rx_event, 1); #endif diff --git a/board/twinkie/sniffer.c b/board/twinkie/sniffer.c index 00effb8539..a567b5d725 100644 --- a/board/twinkie/sniffer.c +++ b/board/twinkie/sniffer.c @@ -206,7 +206,7 @@ void tim_rx2_handler(uint32_t stat) led_set_activity(1); } -void tim_dma_handler(void) +static void tim_dma_handler(void) { stm32_dma_regs_t *dma = STM32_DMA1_REGS; uint32_t stat = dma->isr & (STM32_DMA_ISR_HTIF(DMAC_TIM_RX1) diff --git a/board/zinger/board.c b/board/zinger/board.c index 540e615071..38b0227bdf 100644 --- a/board/zinger/board.c +++ b/board/zinger/board.c @@ -25,7 +25,7 @@ static uint32_t * const rw_rst = (uint32_t *)(CONFIG_PROGRAM_MEMORY_BASE+CONFIG_RW_MEM_OFF+4); /* External interrupt EXTINT7 for external comparator on PA7 */ -void pd_rx_interrupt(void) +static void pd_rx_interrupt(void) { /* trigger reception handling */ pd_rx_handler(); diff --git a/board/zinger/runtime.c b/board/zinger/runtime.c index cb27cc0f03..0b6f1995f5 100644 --- a/board/zinger/runtime.c +++ b/board/zinger/runtime.c @@ -74,7 +74,7 @@ uint32_t task_set_event(task_id_t tskid, uint32_t event) return 0; } -void tim2_interrupt(void) +static void tim2_interrupt(void) { uint32_t stat = STM32_TIM_SR(2); diff --git a/board/zinger/usb_pd_policy.c b/board/zinger/usb_pd_policy.c index 098bb13c0f..08314e7aa6 100644 --- a/board/zinger/usb_pd_policy.c +++ b/board/zinger/usb_pd_policy.c @@ -393,7 +393,7 @@ int pd_board_checks(void) } -void pd_adc_interrupt(void) +static void pd_adc_interrupt(void) { /* Clear flags */ STM32_ADC_ISR = 0x8e; diff --git a/chip/ish/uart.c b/chip/ish/uart.c index d958dc94c5..71d8a41397 100644 --- a/chip/ish/uart.c +++ b/chip/ish/uart.c @@ -122,7 +122,7 @@ int uart_read_char(void) return RBR(ISH_DEBUG_UART); } -void uart_ec_interrupt(void) +static void uart_ec_interrupt(void) { /* Read input FIFO until empty, then fill output FIFO */ uart_process_input(); diff --git a/chip/it83xx/intc.c b/chip/it83xx/intc.c index 80abfaad63..5e6fd734c4 100644 --- a/chip/it83xx/intc.c +++ b/chip/it83xx/intc.c @@ -19,7 +19,7 @@ int __ram_code intc_get_ec_int(void) return ec_int; } -void intc_cpu_int_group_5(void) +static void intc_cpu_int_group_5(void) { /* Determine interrupt number. */ int intc_group_5 = intc_get_ec_int(); @@ -40,7 +40,7 @@ void intc_cpu_int_group_5(void) } DECLARE_IRQ(CPU_INT_GROUP_5, intc_cpu_int_group_5, 2); -void intc_cpu_int_group_4(void) +static void intc_cpu_int_group_4(void) { /* Determine interrupt number. */ int intc_group_4 = intc_get_ec_int(); @@ -73,7 +73,7 @@ void intc_cpu_int_group_4(void) } DECLARE_IRQ(CPU_INT_GROUP_4, intc_cpu_int_group_4, 2); -void intc_cpu_int_group_12(void) +static void intc_cpu_int_group_12(void) { /* Determine interrupt number. */ int intc_group_12 = intc_get_ec_int(); @@ -118,7 +118,7 @@ void intc_cpu_int_group_12(void) } DECLARE_IRQ(CPU_INT_GROUP_12, intc_cpu_int_group_12, 2); -void intc_cpu_int_group_7(void) +static void intc_cpu_int_group_7(void) { /* Determine interrupt number. */ int intc_group_7 = intc_get_ec_int(); @@ -140,7 +140,7 @@ void intc_cpu_int_group_7(void) } DECLARE_IRQ(CPU_INT_GROUP_7, intc_cpu_int_group_7, 2); -void intc_cpu_int_group_6(void) +static void intc_cpu_int_group_6(void) { /* Determine interrupt number. */ int intc_group_6 = intc_get_ec_int(); diff --git a/chip/lm4/adc.c b/chip/lm4/adc.c index 13b5ebdebd..9c52cbbdd7 100644 --- a/chip/lm4/adc.c +++ b/chip/lm4/adc.c @@ -191,10 +191,10 @@ static void handle_interrupt(int ss) task_set_event(id, TASK_EVENT_ADC_DONE); } -void ss0_interrupt(void) { handle_interrupt(0); } -void ss1_interrupt(void) { handle_interrupt(1); } -void ss2_interrupt(void) { handle_interrupt(2); } -void ss3_interrupt(void) { handle_interrupt(3); } +static void ss0_interrupt(void) { handle_interrupt(0); } +static void ss1_interrupt(void) { handle_interrupt(1); } +static void ss2_interrupt(void) { handle_interrupt(2); } +static void ss3_interrupt(void) { handle_interrupt(3); } DECLARE_IRQ(LM4_IRQ_ADC0_SS0, ss0_interrupt, 2); DECLARE_IRQ(LM4_IRQ_ADC0_SS1, ss1_interrupt, 2); diff --git a/chip/lm4/gpio.c b/chip/lm4/gpio.c index 841bfdb214..fab3c97f59 100644 --- a/chip/lm4/gpio.c +++ b/chip/lm4/gpio.c @@ -331,7 +331,7 @@ static void gpio_interrupt(int port, uint32_t mis) * the port, then call the main handler above. */ #define GPIO_IRQ_FUNC(irqfunc, gpiobase) \ - void irqfunc(void) \ + static void irqfunc(void) \ { \ uint32_t mis = LM4_GPIO_MIS(gpiobase); \ LM4_GPIO_ICR(gpiobase) = mis; \ diff --git a/chip/lm4/hwtimer.c b/chip/lm4/hwtimer.c index 44e1c2fb27..5fb2366f7d 100644 --- a/chip/lm4/hwtimer.c +++ b/chip/lm4/hwtimer.c @@ -42,7 +42,7 @@ void __hw_clock_source_set(uint32_t ts) LM4_TIMER_TAV(6) = 0xffffffff - ts; } -void __hw_clock_source_irq(void) +static void __hw_clock_source_irq(void) { uint32_t status = LM4_TIMER_RIS(6); diff --git a/chip/lm4/i2c.c b/chip/lm4/i2c.c index 56084c38e6..69c76b9eb7 100644 --- a/chip/lm4/i2c.c +++ b/chip/lm4/i2c.c @@ -398,12 +398,12 @@ static void handle_interrupt(int port) task_set_event(id, TASK_EVENT_I2C_IDLE); } -void i2c0_interrupt(void) { handle_interrupt(0); } -void i2c1_interrupt(void) { handle_interrupt(1); } -void i2c2_interrupt(void) { handle_interrupt(2); } -void i2c3_interrupt(void) { handle_interrupt(3); } -void i2c4_interrupt(void) { handle_interrupt(4); } -void i2c5_interrupt(void) { handle_interrupt(5); } +static void i2c0_interrupt(void) { handle_interrupt(0); } +static void i2c1_interrupt(void) { handle_interrupt(1); } +static void i2c2_interrupt(void) { handle_interrupt(2); } +static void i2c3_interrupt(void) { handle_interrupt(3); } +static void i2c4_interrupt(void) { handle_interrupt(4); } +static void i2c5_interrupt(void) { handle_interrupt(5); } DECLARE_IRQ(LM4_IRQ_I2C0, i2c0_interrupt, 2); DECLARE_IRQ(LM4_IRQ_I2C1, i2c1_interrupt, 2); diff --git a/chip/lm4/keyboard_raw.c b/chip/lm4/keyboard_raw.c index 81af0efdde..526a6bad20 100644 --- a/chip/lm4/keyboard_raw.c +++ b/chip/lm4/keyboard_raw.c @@ -108,7 +108,7 @@ void keyboard_raw_enable_interrupt(int enable) /** * Interrupt handler for the entire GPIO bank of keyboard rows. */ -void keyboard_raw_interrupt(void) +static void keyboard_raw_interrupt(void) { /* Clear all pending keyboard interrupts */ LM4_GPIO_ICR(KB_SCAN_ROW_GPIO) = 0xff; diff --git a/chip/lm4/lpc.c b/chip/lm4/lpc.c index 6e3c39220d..3f1b7b0b44 100644 --- a/chip/lm4/lpc.c +++ b/chip/lm4/lpc.c @@ -542,7 +542,7 @@ DECLARE_DEFERRED(lpc_chipset_reset); /** * LPC interrupt handler */ -void lpc_interrupt(void) +static void lpc_interrupt(void) { uint32_t mis = LM4_LPC_LPCMIS; uint32_t st; diff --git a/chip/lm4/system.c b/chip/lm4/system.c index 56bd1a82fd..e4480de01d 100644 --- a/chip/lm4/system.c +++ b/chip/lm4/system.c @@ -334,7 +334,7 @@ void system_reset_rtc_alarm(void) /** * Hibernate module interrupt */ -void __hibernate_irq(void) +static void __hibernate_irq(void) { system_reset_rtc_alarm(); } diff --git a/chip/lm4/uart.c b/chip/lm4/uart.c index 7ccea9eb75..0b923f0692 100644 --- a/chip/lm4/uart.c +++ b/chip/lm4/uart.c @@ -101,7 +101,7 @@ static void uart_clear_rx_fifo(int channel) /** * Interrupt handler for UART0 */ -void uart_ec_interrupt(void) +static void uart_ec_interrupt(void) { /* Clear transmit and receive interrupt status */ LM4_UART_ICR(0) = 0x70; @@ -118,7 +118,7 @@ DECLARE_IRQ(LM4_IRQ_UART0, uart_ec_interrupt, 1); /** * Interrupt handler for Host UART */ -void uart_host_interrupt(void) +static void uart_host_interrupt(void) { /* Clear transmit and receive interrupt status */ LM4_UART_ICR(CONFIG_UART_HOST) = 0x70; diff --git a/chip/max32660/gpio_chip.c b/chip/max32660/gpio_chip.c index 5fe38cd657..1ef73890ec 100644 --- a/chip/max32660/gpio_chip.c +++ b/chip/max32660/gpio_chip.c @@ -228,7 +228,7 @@ static void gpio_interrupt(int port, uint32_t mis) * interrupt handler and clear the GPIO hardware interrupt status. */ #define GPIO_IRQ_FUNC(irqfunc, gpiobase) \ - void irqfunc(void) \ + static void irqfunc(void) \ { \ mxc_gpio_regs_t *gpio = MXC_GPIO_GET_GPIO(gpiobase); \ uint32_t mis = gpio->int_stat; \ diff --git a/chip/max32660/i2c_chip.c b/chip/max32660/i2c_chip.c index f28e85f0ca..f60764662d 100644 --- a/chip/max32660/i2c_chip.c +++ b/chip/max32660/i2c_chip.c @@ -410,7 +410,7 @@ void i2c_slave_service(i2c_req_t *req) /** * I2C0_IRQHandler() - Async Handler for I2C Slave driver. */ -void I2C0_IRQHandler(void) +static void I2C0_IRQHandler(void) { i2c_slave_handler(i2c_bus_ports[0]); } @@ -418,7 +418,7 @@ void I2C0_IRQHandler(void) /** * I2C1_IRQHandler() - Async Handler for I2C Slave driver. */ -void I2C1_IRQHandler(void) +static void I2C1_IRQHandler(void) { i2c_slave_handler(i2c_bus_ports[1]); } diff --git a/chip/max32660/uart_chip.c b/chip/max32660/uart_chip.c index c30a6ebd45..4b254dbf8b 100644 --- a/chip/max32660/uart_chip.c +++ b/chip/max32660/uart_chip.c @@ -221,7 +221,7 @@ int uart_read_char(void) /** * Interrupt handlers for UART */ -void uart_rxtx_interrupt(void) +static void uart_rxtx_interrupt(void) { /* Process the Console Input */ uart_process_input(); diff --git a/chip/mchp/adc.c b/chip/mchp/adc.c index d40a8a9d1c..9de5476077 100644 --- a/chip/mchp/adc.c +++ b/chip/mchp/adc.c @@ -139,7 +139,7 @@ static void adc_init(void) } DECLARE_HOOK(HOOK_INIT, adc_init, HOOK_PRIO_INIT_ADC); -void adc_interrupt(void) +static void adc_interrupt(void) { MCHP_INT_DISABLE(MCHP_ADC_GIRQ) = MCHP_ADC_GIRQ_SINGLE_BIT; diff --git a/chip/mchp/espi.c b/chip/mchp/espi.c index 8a38a82688..a7db914f3b 100644 --- a/chip/mchp/espi.c +++ b/chip/mchp/espi.c @@ -1074,7 +1074,7 @@ const FPVW girq25_vw_handlers[MCHP_GIRQ25_NUM_M2S] = { }; /* Interrupt handler for eSPI virtual wires in MSVW00 - MSVW01 */ -void espi_mswv1_interrupt(void) +static void espi_mswv1_interrupt(void) { uint32_t d, girq24_result, bpos; @@ -1095,7 +1095,7 @@ DECLARE_IRQ(MCHP_IRQ_GIRQ24, espi_mswv1_interrupt, 2); /* Interrupt handler for eSPI virtual wires in MSVW07 - MSVW10 */ -void espi_msvw2_interrupt(void) +static void espi_msvw2_interrupt(void) { uint32_t d, girq25_result, bpos; @@ -1156,7 +1156,7 @@ DECLARE_IRQ(MCHP_IRQ_GIRQ25, espi_msvw2_interrupt, 2); * equivalent to eSPI Platform Reset. * */ -void espi_reset_isr(void) +static void espi_reset_isr(void) { uint8_t erst; @@ -1198,7 +1198,7 @@ DECLARE_IRQ(MCHP_IRQ_ESPI_RESET, espi_reset_isr, 3); * eSPI Virtual Wire channel enable handler * Must disable once VW Enable is set by eSPI Master */ -void espi_vw_en_isr(void) +static void espi_vw_en_isr(void) { MCHP_INT_DISABLE(MCHP_ESPI_GIRQ) = MCHP_ESPI_VW_EN_GIRQ_BIT; MCHP_INT_SOURCE(MCHP_ESPI_GIRQ) = MCHP_ESPI_VW_EN_GIRQ_BIT; @@ -1218,7 +1218,7 @@ DECLARE_IRQ(MCHP_IRQ_ESPI_VW_EN, espi_vw_en_isr, 2); /* * eSPI OOB TX and OOB channel enable change interrupt handler */ -void espi_oob_tx_isr(void) +static void espi_oob_tx_isr(void) { uint32_t sts; @@ -1245,7 +1245,7 @@ DECLARE_IRQ(MCHP_IRQ_ESPI_OOB_UP, espi_oob_tx_isr, 2); /* eSPI OOB RX interrupt handler */ -void espi_oob_rx_isr(void) +static void espi_oob_rx_isr(void) { uint32_t sts; @@ -1262,7 +1262,7 @@ DECLARE_IRQ(MCHP_IRQ_ESPI_OOB_DN, espi_oob_rx_isr, 2); * eSPI Flash Channel enable change and data transfer * interrupt handler */ -void espi_fc_isr(void) +static void espi_fc_isr(void) { uint32_t sts; @@ -1290,7 +1290,7 @@ DECLARE_IRQ(MCHP_IRQ_ESPI_FC, espi_fc_isr, 2); /* eSPI Peripheral Channel interrupt handler */ -void espi_pc_isr(void) +static void espi_pc_isr(void) { uint32_t sts; diff --git a/chip/mchp/gpio.c b/chip/mchp/gpio.c index 28cb987e23..5794229b34 100644 --- a/chip/mchp/gpio.c +++ b/chip/mchp/gpio.c @@ -470,7 +470,7 @@ static void gpio_interrupt(int girq, int port) } #define GPIO_IRQ_FUNC(irqfunc, girq, port)\ - void irqfunc(void) \ + static void irqfunc(void) \ { \ gpio_interrupt(girq, port);\ } diff --git a/chip/mchp/hwtimer.c b/chip/mchp/hwtimer.c index e84f278f4a..05ff69e7d9 100644 --- a/chip/mchp/hwtimer.c +++ b/chip/mchp/hwtimer.c @@ -56,9 +56,9 @@ static void __hw_clock_source_irq(int timer_id) process_timers(timer_id == 0); } -void __hw_clock_source_irq_0(void) { __hw_clock_source_irq(0); } +static void __hw_clock_source_irq_0(void) { __hw_clock_source_irq(0); } DECLARE_IRQ(MCHP_IRQ_TIMER32_0, __hw_clock_source_irq_0, 1); -void __hw_clock_source_irq_1(void) { __hw_clock_source_irq(1); } +static void __hw_clock_source_irq_1(void) { __hw_clock_source_irq(1); } DECLARE_IRQ(MCHP_IRQ_TIMER32_1, __hw_clock_source_irq_1, 1); static void configure_timer(int timer_id) diff --git a/chip/mchp/i2c.c b/chip/mchp/i2c.c index 9891f4d41e..2aaef83dfe 100644 --- a/chip/mchp/i2c.c +++ b/chip/mchp/i2c.c @@ -1042,41 +1042,41 @@ static void handle_interrupt(int controller) task_set_event(id, TASK_EVENT_I2C_IDLE); } -void i2c0_interrupt(void) +static void i2c0_interrupt(void) { handle_interrupt(0); } -void i2c1_interrupt(void) +static void i2c1_interrupt(void) { handle_interrupt(1); } -void i2c2_interrupt(void) +static void i2c2_interrupt(void) { handle_interrupt(2); } -void i2c3_interrupt(void) +static void i2c3_interrupt(void) { handle_interrupt(3); } #if defined(CHIP_FAMILY_MEC172X) -void i2c4_interrupt(void) +static void i2c4_interrupt(void) { handle_interrupt(4); } #elif defined(CHIP_FAMILY_MEC152X) -void i2c4_interrupt(void) +static void i2c4_interrupt(void) { handle_interrupt(4); } -void i2c5_interrupt(void) +static void i2c5_interrupt(void) { handle_interrupt(5); } -void i2c6_interrupt(void) +static void i2c6_interrupt(void) { handle_interrupt(6); } -void i2c7_interrupt(void) +static void i2c7_interrupt(void) { handle_interrupt(7); } diff --git a/chip/mchp/keyboard_raw.c b/chip/mchp/keyboard_raw.c index 946ea1ca90..f10cac38b6 100644 --- a/chip/mchp/keyboard_raw.c +++ b/chip/mchp/keyboard_raw.c @@ -86,7 +86,7 @@ void keyboard_raw_enable_interrupt(int enable) } } -void keyboard_raw_interrupt(void) +static void keyboard_raw_interrupt(void) { /* Clear interrupt status bits */ MCHP_KS_KSI_STATUS = 0xff; diff --git a/chip/mchp/lpc.c b/chip/mchp/lpc.c index da4f8202e4..9f6a731eb5 100644 --- a/chip/mchp/lpc.c +++ b/chip/mchp/lpc.c @@ -646,7 +646,7 @@ void lpcrst_interrupt(enum gpio_signal signal) * or logging of EMI host communication? We don't observe * this ISR so Host is not writing to MCHP_EMI_H2E_MBX(0). */ -void emi0_interrupt(void) +static void emi0_interrupt(void) { uint8_t h2e; @@ -726,7 +726,7 @@ static int acpi_ec0_custom(int is_cmd, uint8_t value, } #endif -void acpi_0_interrupt(void) +static void acpi_0_interrupt(void) { uint8_t value, result, is_cmd; @@ -771,7 +771,7 @@ DECLARE_IRQ(MCHP_IRQ_ACPIEC0_IBF, acpi_0_interrupt, 1); * Used to handle custom ACPI EC0 command requiring * two byte response. */ -void acpi_0_obe_isr(void) +static void acpi_0_obe_isr(void) { uint8_t sts, data; @@ -796,7 +796,7 @@ void acpi_0_obe_isr(void) DECLARE_IRQ(MCHP_IRQ_ACPIEC0_OBE, acpi_0_obe_isr, 1); #endif -void acpi_1_interrupt(void) +static void acpi_1_interrupt(void) { uint8_t st = MCHP_ACPI_EC_STATUS(1); @@ -854,7 +854,7 @@ DECLARE_IRQ(MCHP_IRQ_ACPIEC1_IBF, acpi_1_interrupt, 1); * Reading data out of input buffer clears read-only status * in 8042EM. Next, we must clear aggregator status. */ -void kb_ibf_interrupt(void) +static void kb_ibf_interrupt(void) { if (lpc_keyboard_input_pending()) keyboard_host_write(MCHP_8042_H2E, @@ -872,7 +872,7 @@ DECLARE_IRQ(MCHP_IRQ_8042EM_IBF, kb_ibf_interrupt, 1); * aggregator. Clear aggregator 8042EM OBE R/WC status bit before * invoking task. */ -void kb_obe_interrupt(void) +static void kb_obe_interrupt(void) { MCHP_INT_SOURCE(MCHP_8042_GIRQ) = MCHP_8042_OBE_GIRQ_BIT; task_wake(TASK_ID_KEYPROTO); diff --git a/chip/mchp/port80.c b/chip/mchp/port80.c index 08cb5b97cd..a32dc1b9c2 100644 --- a/chip/mchp/port80.c +++ b/chip/mchp/port80.c @@ -30,7 +30,7 @@ * NOTE: The overrun bit could be used to set a flag indicating EC could * not keep up with the host. */ -void port_80_interrupt(void) +static void port_80_interrupt(void) { int d = MCHP_BDP0_DATTR; @@ -61,7 +61,7 @@ DECLARE_IRQ(MCHP_IRQ_BDP0, port_80_interrupt, 3); * to I/O 80h and 90h. LSB to 0x80 and MSB to 0x90. * */ -void port_80_interrupt(void) +static void port_80_interrupt(void) { int d; diff --git a/chip/mchp/system.c b/chip/mchp/system.c index 356313fcd2..5591c818c4 100644 --- a/chip/mchp/system.c +++ b/chip/mchp/system.c @@ -564,7 +564,7 @@ void system_hibernate(uint32_t seconds, uint32_t microseconds) ; } -void htimer_interrupt(void) +static void htimer_interrupt(void) { /* Time to wake up */ } diff --git a/chip/mchp/uart.c b/chip/mchp/uart.c index 56c99646a4..c274519b94 100644 --- a/chip/mchp/uart.c +++ b/chip/mchp/uart.c @@ -151,7 +151,7 @@ void uart_enable_interrupt(void) * Interrupt handler for UART. * Lower priority below other critical ISR's. */ -void uart_ec_interrupt(void) +static void uart_ec_interrupt(void) { /* Read input FIFO until empty, then fill output FIFO */ uart_process_input(); diff --git a/chip/mec1322/adc.c b/chip/mec1322/adc.c index 95fe99f891..9c83173777 100644 --- a/chip/mec1322/adc.c +++ b/chip/mec1322/adc.c @@ -69,7 +69,7 @@ static void adc_init(void) } DECLARE_HOOK(HOOK_INIT, adc_init, HOOK_PRIO_INIT_ADC); -void adc_interrupt(void) +static void adc_interrupt(void) { /* Clear interrupt status bit */ MEC1322_ADC_CTRL |= BIT(7); diff --git a/chip/mec1322/gpio.c b/chip/mec1322/gpio.c index 331022c87c..6435f4fe9d 100644 --- a/chip/mec1322/gpio.c +++ b/chip/mec1322/gpio.c @@ -267,7 +267,7 @@ static void gpio_interrupt(int girq, int port_offset) } #define GPIO_IRQ_FUNC(irqfunc, girq, port_offset) \ - void irqfunc(void) \ + static void irqfunc(void) \ { \ gpio_interrupt(girq, port_offset); \ } diff --git a/chip/mec1322/hwtimer.c b/chip/mec1322/hwtimer.c index a5c5858620..b0405ec321 100644 --- a/chip/mec1322/hwtimer.c +++ b/chip/mec1322/hwtimer.c @@ -50,9 +50,9 @@ static void __hw_clock_source_irq(int timer_id) process_timers(timer_id == 0); } -void __hw_clock_source_irq_0(void) { __hw_clock_source_irq(0); } +static void __hw_clock_source_irq_0(void) { __hw_clock_source_irq(0); } DECLARE_IRQ(MEC1322_IRQ_TIMER32_0, __hw_clock_source_irq_0, 1); -void __hw_clock_source_irq_1(void) { __hw_clock_source_irq(1); } +static void __hw_clock_source_irq_1(void) { __hw_clock_source_irq(1); } DECLARE_IRQ(MEC1322_IRQ_TIMER32_1, __hw_clock_source_irq_1, 1); static void configure_timer(int timer_id) diff --git a/chip/mec1322/i2c.c b/chip/mec1322/i2c.c index aecc8abd9b..f5bb97e95b 100644 --- a/chip/mec1322/i2c.c +++ b/chip/mec1322/i2c.c @@ -520,10 +520,10 @@ static void handle_interrupt(int controller) task_set_event(id, TASK_EVENT_I2C_IDLE); } -void i2c0_interrupt(void) { handle_interrupt(0); } -void i2c1_interrupt(void) { handle_interrupt(1); } -void i2c2_interrupt(void) { handle_interrupt(2); } -void i2c3_interrupt(void) { handle_interrupt(3); } +static void i2c0_interrupt(void) { handle_interrupt(0); } +static void i2c1_interrupt(void) { handle_interrupt(1); } +static void i2c2_interrupt(void) { handle_interrupt(2); } +static void i2c3_interrupt(void) { handle_interrupt(3); } DECLARE_IRQ(MEC1322_IRQ_I2C_0, i2c0_interrupt, 2); DECLARE_IRQ(MEC1322_IRQ_I2C_1, i2c1_interrupt, 2); diff --git a/chip/mec1322/keyboard_raw.c b/chip/mec1322/keyboard_raw.c index 2c62ada9ac..0f3381d79e 100644 --- a/chip/mec1322/keyboard_raw.c +++ b/chip/mec1322/keyboard_raw.c @@ -72,7 +72,7 @@ void keyboard_raw_enable_interrupt(int enable) } } -void keyboard_raw_interrupt(void) +static void keyboard_raw_interrupt(void) { /* Clear interrupt status bits */ MEC1322_KS_KSI_STATUS = 0xff; diff --git a/chip/mec1322/lpc.c b/chip/mec1322/lpc.c index 020cd0e23e..4bc5c1a42c 100644 --- a/chip/mec1322/lpc.c +++ b/chip/mec1322/lpc.c @@ -292,7 +292,7 @@ static void lpc_chipset_reset(void) DECLARE_DEFERRED(lpc_chipset_reset); #endif -void girq19_interrupt(void) +static void girq19_interrupt(void) { /* Check interrupt result for LRESET# trigger */ if (MEC1322_INT_RESULT(19) & BIT(1)) { @@ -318,7 +318,7 @@ void girq19_interrupt(void) } DECLARE_IRQ(MEC1322_IRQ_GIRQ19, girq19_interrupt, 1); -void emi_interrupt(void) +static void emi_interrupt(void) { port_80_write(MEC1322_EMI_H2E_MBX); } @@ -345,7 +345,7 @@ int port_80_read(void) return data; } -void acpi_0_interrupt(void) +static void acpi_0_interrupt(void) { uint8_t value, result, is_cmd; diff --git a/chip/mec1322/port80.c b/chip/mec1322/port80.c index df4583ed8b..e2f02c81e5 100644 --- a/chip/mec1322/port80.c +++ b/chip/mec1322/port80.c @@ -84,7 +84,7 @@ static void port_80_interrupt_init(void) } DECLARE_HOOK(HOOK_INIT, port_80_interrupt_init, HOOK_PRIO_DEFAULT); -void port_80_interrupt(void) +static void port_80_interrupt(void) { int data; diff --git a/chip/mec1322/system.c b/chip/mec1322/system.c index 6e482d3a78..b672f72d2d 100644 --- a/chip/mec1322/system.c +++ b/chip/mec1322/system.c @@ -368,7 +368,7 @@ void system_hibernate(uint32_t seconds, uint32_t microseconds) ; } -void htimer_interrupt(void) +static void htimer_interrupt(void) { /* Time to wake up */ } diff --git a/chip/mec1322/uart.c b/chip/mec1322/uart.c index 2c607d0b72..9118168dcd 100644 --- a/chip/mec1322/uart.c +++ b/chip/mec1322/uart.c @@ -103,7 +103,7 @@ static void uart_clear_rx_fifo(int channel) /** * Interrupt handler for UART */ -void uart_ec_interrupt(void) +static void uart_ec_interrupt(void) { /* Read input FIFO until empty, then fill output FIFO */ uart_process_input(); diff --git a/chip/mt_scp/mt8183/clock.c b/chip/mt_scp/mt8183/clock.c index 066e269579..1af0a3b893 100644 --- a/chip/mt_scp/mt8183/clock.c +++ b/chip/mt_scp/mt8183/clock.c @@ -339,7 +339,7 @@ void scp_enable_clock(void) } DECLARE_IRQ(SCP_IRQ_CLOCK, clock_control_irq, 3); -void clock_control_irq(void) +static void clock_control_irq(void) { /* Read ack CLK_IRQ */ (SCP_CLK_IRQ_ACK); @@ -347,7 +347,7 @@ void clock_control_irq(void) } DECLARE_IRQ(SCP_IRQ_CLOCK2, clock_fast_wakeup_irq, 3); -void clock_fast_wakeup_irq(void) +static void clock_fast_wakeup_irq(void) { /* Ack fast wakeup */ SCP_SLEEP_IRQ2 = 1; diff --git a/chip/mt_scp/mt8183/gpio.c b/chip/mt_scp/mt8183/gpio.c index a4896aae72..2bd4bfbb02 100644 --- a/chip/mt_scp/mt8183/gpio.c +++ b/chip/mt_scp/mt8183/gpio.c @@ -155,7 +155,7 @@ void gpio_init(void) DECLARE_HOOK(HOOK_INIT, gpio_init, HOOK_PRIO_DEFAULT); /* Interrupt handler */ -void __keep gpio_interrupt(void) +static void __attribute__((used)) gpio_interrupt(void) { int bit, port; uint32_t pending; diff --git a/chip/mt_scp/mt8183/hrtimer.c b/chip/mt_scp/mt8183/hrtimer.c index 92887af2a7..89e0c1658b 100644 --- a/chip/mt_scp/mt8183/hrtimer.c +++ b/chip/mt_scp/mt8183/hrtimer.c @@ -243,7 +243,10 @@ static void __hw_clock_source_irq(int n) #define DECLARE_TIMER_IRQ(n) \ DECLARE_IRQ(IRQ_TIMER(n), __hw_clock_source_irq_##n, 2); \ - void __hw_clock_source_irq_##n(void) { __hw_clock_source_irq(n); } + static void __hw_clock_source_irq_##n(void) \ + { \ + __hw_clock_source_irq(n); \ + } DECLARE_TIMER_IRQ(0); DECLARE_TIMER_IRQ(1); diff --git a/chip/mt_scp/mt8183/ipi.c b/chip/mt_scp/mt8183/ipi.c index 8e13781db3..8b695d57e0 100644 --- a/chip/mt_scp/mt8183/ipi.c +++ b/chip/mt_scp/mt8183/ipi.c @@ -382,7 +382,7 @@ static void ipi_init(void) DECLARE_HOOK(HOOK_INIT, ipi_init, HOOK_PRIO_DEFAULT); DECLARE_IRQ(SCP_IRQ_IPC0, ipc_handler, 4); -void ipc_handler(void) +static void ipc_handler(void) { /* TODO(b/117917141): We only support IPC_ID(0) for now. */ if (SCP_GIPC_IN & SCP_GIPC_IN_CLEAR_IPCN(0)) { diff --git a/chip/mt_scp/mt8183/ipi_chip.h b/chip/mt_scp/mt8183/ipi_chip.h index 758047951f..03b5572497 100644 --- a/chip/mt_scp/mt8183/ipi_chip.h +++ b/chip/mt_scp/mt8183/ipi_chip.h @@ -71,11 +71,6 @@ struct rpmsg_ns_msg { }; /* - * IPC Handler. - */ -void ipc_handler(void); - -/* * An IPC IRQ could be shared across many IPI handlers. * Those handlers would usually operate on disabling or enabling the IPC IRQ. * This may disorder the actual timing to on/off the IRQ when there are many diff --git a/chip/mt_scp/mt8183/uart.c b/chip/mt_scp/mt8183/uart.c index 7907f9537d..b5f3da7d5c 100644 --- a/chip/mt_scp/mt8183/uart.c +++ b/chip/mt_scp/mt8183/uart.c @@ -94,7 +94,7 @@ void uart_process(void) #if (UARTN < SCP_UART_COUNT) DECLARE_IRQ(UART_IRQ(UARTN), uart_interrupt, 2); -void uart_interrupt(void) +static void uart_interrupt(void) { uint8_t ier; @@ -106,7 +106,7 @@ void uart_interrupt(void) } DECLARE_IRQ(UART_RX_IRQ(UARTN), uart_rx_interrupt, 2); -void uart_rx_interrupt(void) +static void uart_rx_interrupt(void) { uint8_t ier; diff --git a/chip/npcx/adc.c b/chip/npcx/adc.c index ea16589d9b..5935472108 100644 --- a/chip/npcx/adc.c +++ b/chip/npcx/adc.c @@ -318,7 +318,7 @@ void npcx_adc_register_thresh_irq(int threshold_idx, * @return none * @notes Only handle SW-triggered conversion in npcx chip */ -void adc_interrupt(void) +static void adc_interrupt(void) { int i; uint16_t thrcts; diff --git a/chip/npcx/cec.c b/chip/npcx/cec.c index 77bfacd163..e7cd0ae7b9 100644 --- a/chip/npcx/cec.c +++ b/chip/npcx/cec.c @@ -787,7 +787,7 @@ static void cec_event_tx(void) enter_state(CEC_STATE_INITIATOR_FREE_TIME); } -void cec_isr(void) +static void cec_isr(void) { int mdl = NPCX_MFT_MODULE_1; uint8_t events; diff --git a/chip/npcx/espi.c b/chip/npcx/espi.c index c8976afed0..6541ddeaae 100644 --- a/chip/npcx/espi.c +++ b/chip/npcx/espi.c @@ -502,7 +502,7 @@ void espi_espirst_handler(void) } /* Handle eSPI virtual wire interrupt 1 */ -void __espi_wk2a_interrupt(void) +static void __espi_wk2a_interrupt(void) { uint8_t pending_bits = NPCX_WKPND(MIWU_TABLE_2, MIWU_GROUP_1); @@ -524,7 +524,7 @@ void __espi_wk2a_interrupt(void) DECLARE_IRQ(NPCX_IRQ_WKINTA_2, __espi_wk2a_interrupt, 3); /* Handle eSPI virtual wire interrupt 2 */ -void __espi_wk2b_interrupt(void) +static void __espi_wk2b_interrupt(void) { uint8_t pending_bits = NPCX_WKPND(MIWU_TABLE_2, MIWU_GROUP_2); @@ -540,7 +540,7 @@ void __espi_wk2b_interrupt(void) DECLARE_IRQ(NPCX_IRQ_WKINTB_2, __espi_wk2b_interrupt, 3); /* Interrupt handler for eSPI status changed */ -void espi_interrupt(void) +static void espi_interrupt(void) { int chan; uint32_t mask, status; diff --git a/chip/npcx/gpio-npcx5.c b/chip/npcx/gpio-npcx5.c index e1d13c98d1..c6fcf7351b 100644 --- a/chip/npcx/gpio-npcx5.c +++ b/chip/npcx/gpio-npcx5.c @@ -49,13 +49,13 @@ DECLARE_HOOK(HOOK_INIT, gpio_init, HOOK_PRIO_DEFAULT); */ #define GPIO_IRQ_FUNC(_irq_func, wui_int) \ -void _irq_func(void) \ +static void _irq_func(void) \ { \ gpio_interrupt(wui_int); \ } /* If we need to handle the other type interrupts except GPIO, add code here */ -void __gpio_wk0efgh_interrupt(void) +static void __gpio_wk0efgh_interrupt(void) { if (IS_ENABLED(CONFIG_HOSTCMD_X86)) { /* Pending bit 7 or 6 or 5? */ @@ -97,7 +97,7 @@ static void set_rtc_host_event(void) DECLARE_DEFERRED(set_rtc_host_event); #endif -void __gpio_rtc_interrupt(void) +static void __gpio_rtc_interrupt(void) { /* Check pending bit 7 */ #ifdef CONFIG_HOSTCMD_RTC @@ -130,7 +130,7 @@ void __gpio_rtc_interrupt(void) gpio_interrupt(WUI_INT(MIWU_TABLE_0, MIWU_GROUP_4)); } -void __gpio_wk1h_interrupt(void) +static void __gpio_wk1h_interrupt(void) { #if defined(CHIP_FAMILY_NPCX7) && defined(CONFIG_LOW_POWER_IDLE) && \ (CONFIG_CONSOLE_UART == 0) diff --git a/chip/npcx/gpio-npcx9.c b/chip/npcx/gpio-npcx9.c index f0ed529808..e9e8ad2ad9 100644 --- a/chip/npcx/gpio-npcx9.c +++ b/chip/npcx/gpio-npcx9.c @@ -52,13 +52,13 @@ DECLARE_HOOK(HOOK_INIT, gpio_init, HOOK_PRIO_DEFAULT); */ #define GPIO_IRQ_FUNC(_irq_func, wui_int) \ -void _irq_func(void) \ +static void _irq_func(void) \ { \ gpio_interrupt(wui_int); \ } /* If we need to handle the other type interrupts except GPIO, add code here */ -void __gpio_host_interrupt(void) +static void __gpio_host_interrupt(void) { if (IS_ENABLED(CONFIG_HOSTCMD_X86)) { /* Pending bit 7 or 6 or 5? */ @@ -97,7 +97,7 @@ static void set_rtc_host_event(void) DECLARE_DEFERRED(set_rtc_host_event); #endif -void __gpio_rtc_interrupt(void) +static void __gpio_rtc_interrupt(void) { /* Check pending bit 7 */ #ifdef CONFIG_HOSTCMD_RTC @@ -110,7 +110,7 @@ void __gpio_rtc_interrupt(void) #endif gpio_interrupt(WUI_INT(MIWU_TABLE_0, MIWU_GROUP_4)); } -void __gpio_cr_sin2_interrupt(void) +static void __gpio_cr_sin2_interrupt(void) { #if defined(CONFIG_LOW_POWER_IDLE) && (CONFIG_CONSOLE_UART == 1) /* Handle the interrupt from UART wakeup event */ @@ -133,7 +133,7 @@ void __gpio_cr_sin2_interrupt(void) } -void __gpio_wk1h_interrupt(void) +static void __gpio_wk1h_interrupt(void) { #if defined(CONFIG_LOW_POWER_IDLE) && (CONFIG_CONSOLE_UART == 0) /* Handle the interrupt from UART wakeup event */ @@ -154,7 +154,7 @@ void __gpio_wk1h_interrupt(void) gpio_interrupt(WUI_INT(MIWU_TABLE_1, MIWU_GROUP_8)); } -void __gpio_lct_interrupt(void) +static void __gpio_lct_interrupt(void) { if (NPCX_WKPND(MIWU_TABLE_2, MIWU_GROUP_6) & LCT_WUI_MASK) { NPCX_WKPCL(MIWU_TABLE_2, MIWU_GROUP_6) |= LCT_WUI_MASK; diff --git a/chip/npcx/hwtimer.c b/chip/npcx/hwtimer.c index 92f9843d09..b479f237c0 100644 --- a/chip/npcx/hwtimer.c +++ b/chip/npcx/hwtimer.c @@ -166,7 +166,7 @@ void __hw_clock_event_clear(void) } /* Irq for hwtimer event */ -void __hw_clock_event_irq(void) +static void __hw_clock_event_irq(void) { /* ITIM event module disable */ CLEAR_BIT(NPCX_ITCTS(ITIM_EVENT_NO), NPCX_ITCTS_ITEN); @@ -246,7 +246,7 @@ void __hw_clock_source_set(uint32_t ts) } /* Irq for hwtimer tick */ -void __hw_clock_source_irq(void) +static void __hw_clock_source_irq(void) { /* Is timeout trigger trigger? */ if (IS_BIT_SET(NPCX_ITCTS(ITIM_SYSTEM_NO), NPCX_ITCTS_TO_STS)) { diff --git a/chip/npcx/i2c.c b/chip/npcx/i2c.c index 26935f778f..a7c389f1b3 100644 --- a/chip/npcx/i2c.c +++ b/chip/npcx/i2c.c @@ -858,15 +858,15 @@ void handle_interrupt(int controller) i2c_controller_int_handler(controller); } -void i2c0_interrupt(void) { handle_interrupt(0); } -void i2c1_interrupt(void) { handle_interrupt(1); } -void i2c2_interrupt(void) { handle_interrupt(2); } -void i2c3_interrupt(void) { handle_interrupt(3); } +static void i2c0_interrupt(void) { handle_interrupt(0); } +static void i2c1_interrupt(void) { handle_interrupt(1); } +static void i2c2_interrupt(void) { handle_interrupt(2); } +static void i2c3_interrupt(void) { handle_interrupt(3); } #if NPCX_FAMILY_VERSION >= NPCX_FAMILY_NPCX7 -void i2c4_interrupt(void) { handle_interrupt(4); } -void i2c5_interrupt(void) { handle_interrupt(5); } -void i2c6_interrupt(void) { handle_interrupt(6); } -void i2c7_interrupt(void) { handle_interrupt(7); } +static void i2c4_interrupt(void) { handle_interrupt(4); } +static void i2c5_interrupt(void) { handle_interrupt(5); } +static void i2c6_interrupt(void) { handle_interrupt(6); } +static void i2c7_interrupt(void) { handle_interrupt(7); } #endif DECLARE_IRQ(NPCX_IRQ_SMB1, i2c0_interrupt, 4); diff --git a/chip/npcx/keyboard_raw.c b/chip/npcx/keyboard_raw.c index 8dc11c03ac..4d0f76c994 100644 --- a/chip/npcx/keyboard_raw.c +++ b/chip/npcx/keyboard_raw.c @@ -152,7 +152,7 @@ void keyboard_raw_enable_interrupt(int enable) /* * Interrupt handler for the entire GPIO bank of keyboard rows. */ -void keyboard_raw_interrupt(void) +static void keyboard_raw_interrupt(void) { /* Clear pending input sources used by scanner */ NPCX_WKPCL(MIWU_TABLE_WKKEY, MIWU_GROUP_WKKEY) = 0xFF; diff --git a/chip/npcx/lpc.c b/chip/npcx/lpc.c index 4eee50d714..9bb2de8936 100644 --- a/chip/npcx/lpc.c +++ b/chip/npcx/lpc.c @@ -519,7 +519,7 @@ static void handle_host_write(int is_cmd) /* Interrupt handlers */ #ifdef HAS_TASK_KEYPROTO /* KB controller input buffer full ISR */ -void lpc_kbc_ibf_interrupt(void) +static void lpc_kbc_ibf_interrupt(void) { uint8_t status; uint8_t ibf; @@ -543,7 +543,7 @@ void lpc_kbc_ibf_interrupt(void) DECLARE_IRQ(NPCX_IRQ_KBC_IBF, lpc_kbc_ibf_interrupt, 4); /* KB controller output buffer empty ISR */ -void lpc_kbc_obe_interrupt(void) +static void lpc_kbc_obe_interrupt(void) { /* Disable KBC OBE interrupt */ CLEAR_BIT(NPCX_HICTRL, NPCX_HICTRL_OBECIE); @@ -559,7 +559,7 @@ DECLARE_IRQ(NPCX_IRQ_KBC_OBE, lpc_kbc_obe_interrupt, 4); #endif /* PM channel input buffer full ISR */ -void lpc_pmc_ibf_interrupt(void) +static void lpc_pmc_ibf_interrupt(void) { /* Channel-1 for ACPI usage*/ /* Channel-2 for Host Command usage , so the argument data had been @@ -572,12 +572,12 @@ void lpc_pmc_ibf_interrupt(void) DECLARE_IRQ(NPCX_IRQ_PM_CHAN_IBF, lpc_pmc_ibf_interrupt, 4); /* PM channel output buffer empty ISR */ -void lpc_pmc_obe_interrupt(void) +static void lpc_pmc_obe_interrupt(void) { } DECLARE_IRQ(NPCX_IRQ_PM_CHAN_OBE, lpc_pmc_obe_interrupt, 4); -void lpc_port80_interrupt(void) +static void lpc_port80_interrupt(void) { uint8_t i; uint8_t count = 0; diff --git a/chip/npcx/peci.c b/chip/npcx/peci.c index badfbd87d9..6f82b932b0 100644 --- a/chip/npcx/peci.c +++ b/chip/npcx/peci.c @@ -269,7 +269,7 @@ static void peci_init(void) DECLARE_HOOK(HOOK_INIT, peci_init, HOOK_PRIO_DEFAULT); /* If received a PECI DONE interrupt, post the event to PECI task */ -void peci_done_interrupt(void){ +static void peci_done_interrupt(void){ if (peci_pending_task_id != NULL_PENDING_TASK_ID) task_set_event(peci_pending_task_id, TASK_EVENT_PECI_DONE); peci_sts = NPCX_PECI_CTL_STS & 0x18; diff --git a/chip/npcx/ps2.c b/chip/npcx/ps2.c index 7b8086cbcd..13a1ff6d57 100644 --- a/chip/npcx/ps2.c +++ b/chip/npcx/ps2.c @@ -247,7 +247,7 @@ static int ps2_is_rx_error(uint8_t ch) return 0; } -void ps2_int_handler(void) +static void ps2_int_handler(void) { uint8_t active_ch; diff --git a/chip/npcx/shi.c b/chip/npcx/shi.c index f8aefa1629..8ce7d21a4a 100644 --- a/chip/npcx/shi.c +++ b/chip/npcx/shi.c @@ -651,7 +651,7 @@ static void shi_handle_cs_assert(void) } /* This routine handles all interrupts of this module */ -void shi_int_handler(void) +static void shi_int_handler(void) { uint8_t stat_reg; #ifdef NPCX_SHI_V2 diff --git a/chip/npcx/uart.c b/chip/npcx/uart.c index efe991ec0b..c158049e6a 100644 --- a/chip/npcx/uart.c +++ b/chip/npcx/uart.c @@ -197,7 +197,7 @@ int uart_read_char(void) } /* Interrupt handler for Console UART */ -void uart_ec_interrupt(void) +static void uart_ec_interrupt(void) { #ifdef CONFIG_UART_PAD_SWITCH if (pad == UART_ALTERNATE_PAD) { diff --git a/chip/npcx/wov.c b/chip/npcx/wov.c index c4f68f5369..5c3e915200 100644 --- a/chip/npcx/wov.c +++ b/chip/npcx/wov.c @@ -579,7 +579,7 @@ static void wov_under_over_error_handler(int *count, uint32_t *last_time) * * @return None */ -void wov_interrupt_handler(void) +static void wov_interrupt_handler(void) { uint32_t wov_status; uint32_t wov_inten; diff --git a/chip/nrf51/gpio.c b/chip/nrf51/gpio.c index 53694b5a74..02f8dc8b50 100644 --- a/chip/nrf51/gpio.c +++ b/chip/nrf51/gpio.c @@ -284,7 +284,7 @@ int gpio_disable_interrupt(enum gpio_signal signal) /* * Clear interrupt and run handler. */ -void gpio_interrupt(void) +static void gpio_interrupt(void) { const struct gpio_info *g; int i; diff --git a/chip/nrf51/hwtimer.c b/chip/nrf51/hwtimer.c index 2f44df905c..06b8210623 100644 --- a/chip/nrf51/hwtimer.c +++ b/chip/nrf51/hwtimer.c @@ -116,7 +116,7 @@ void __hw_clock_source_set(uint32_t ts) /* Interrupt handler for timer */ -void timer_irq(void) +static void timer_irq(void) { int overflow = 0; diff --git a/chip/nrf51/uart.c b/chip/nrf51/uart.c index 1f546a2b79..2a5802bf13 100644 --- a/chip/nrf51/uart.c +++ b/chip/nrf51/uart.c @@ -81,7 +81,7 @@ int uart_read_char(void) } /* Interrupt handler for console USART */ -void uart_interrupt(void) +static void uart_interrupt(void) { #ifndef CONFIG_UART_RX_DMA /* diff --git a/chip/stm32/clock-f.c b/chip/stm32/clock-f.c index 1a77d8ad60..0ae4440d78 100644 --- a/chip/stm32/clock-f.c +++ b/chip/stm32/clock-f.c @@ -322,7 +322,7 @@ DECLARE_DEFERRED(set_rtc_host_event); #endif test_mockable -void __rtc_alarm_irq(void) +void rtc_alarm_irq(void) { struct rtc_time_reg rtc; reset_rtc_alarm(&rtc); @@ -335,6 +335,11 @@ void __rtc_alarm_irq(void) } #endif } + +static void __rtc_alarm_irq(void) +{ + rtc_alarm_irq(); +} DECLARE_IRQ(STM32_IRQ_RTC_ALARM, __rtc_alarm_irq, 1); __attribute__((weak)) diff --git a/chip/stm32/clock-stm32h7.c b/chip/stm32/clock-stm32h7.c index ba233dbd76..72f904c4ed 100644 --- a/chip/stm32/clock-stm32h7.c +++ b/chip/stm32/clock-stm32h7.c @@ -436,7 +436,7 @@ void clock_refresh_console_in_use(void) { } -void lptim_interrupt(void) +static void lptim_interrupt(void) { STM32_LPTIM_ICR(1) = STM32_LPTIM_INT_CMPM; } diff --git a/chip/stm32/clock-stm32l4.c b/chip/stm32/clock-stm32l4.c index 4624013a16..b07b5fb2d4 100644 --- a/chip/stm32/clock-stm32l4.c +++ b/chip/stm32/clock-stm32l4.c @@ -968,7 +968,7 @@ static void set_rtc_host_event(void) DECLARE_DEFERRED(set_rtc_host_event); #endif -test_mockable +test_mockable_static void __rtc_alarm_irq(void) { struct rtc_time_reg rtc; diff --git a/chip/stm32/dma-stm32f4.c b/chip/stm32/dma-stm32f4.c index c721065fd3..3374cff7fc 100644 --- a/chip/stm32/dma-stm32f4.c +++ b/chip/stm32/dma-stm32f4.c @@ -303,7 +303,7 @@ void dma_clear_isr(enum dma_channel stream) #define STM32_DMA_IDX(dma, x) CONCAT4(STM32_DMA, dma, _STREAM, x) #define STM32_DMA_FCT(dma, x) CONCAT4(dma_, dma, _event_interrupt_stream_, x) #define DECLARE_DMA_IRQ(dma, x) \ - void STM32_DMA_FCT(dma, x)(void) \ + static void STM32_DMA_FCT(dma, x)(void) \ { \ dma_clear_isr(STM32_DMA_IDX(dma, x)); \ if (dma_irq[STM32_DMA_IDX(dma, x)].cb != NULL) \ diff --git a/chip/stm32/dma.c b/chip/stm32/dma.c index 55317ba003..ae5a83789d 100644 --- a/chip/stm32/dma.c +++ b/chip/stm32/dma.c @@ -332,7 +332,7 @@ void dma_clear_isr(enum dma_channel channel) #ifdef CONFIG_DMA_DEFAULT_HANDLERS #ifdef CHIP_FAMILY_STM32F0 -void dma_event_interrupt_channel_1(void) +static void dma_event_interrupt_channel_1(void) { if (STM32_DMA1_REGS->isr & STM32_DMA_ISR_TCIF(STM32_DMAC_CH1)) { dma_clear_isr(STM32_DMAC_CH1); @@ -343,7 +343,7 @@ void dma_event_interrupt_channel_1(void) } DECLARE_IRQ(STM32_IRQ_DMA_CHANNEL_1, dma_event_interrupt_channel_1, 1); -void dma_event_interrupt_channel_2_3(void) +static void dma_event_interrupt_channel_2_3(void) { int i; @@ -357,7 +357,7 @@ void dma_event_interrupt_channel_2_3(void) } DECLARE_IRQ(STM32_IRQ_DMA_CHANNEL_2_3, dma_event_interrupt_channel_2_3, 1); -void dma_event_interrupt_channel_4_7(void) +static void dma_event_interrupt_channel_4_7(void) { int i; const unsigned int max_chan = MIN(STM32_DMAC_CH7, STM32_DMAC_COUNT); @@ -375,7 +375,7 @@ DECLARE_IRQ(STM32_IRQ_DMA_CHANNEL_4_7, dma_event_interrupt_channel_4_7, 1); #else /* !CHIP_FAMILY_STM32F0 */ #define DECLARE_DMA_IRQ(x) \ - void CONCAT2(dma_event_interrupt_channel_, x)(void) \ + static void CONCAT2(dma_event_interrupt_channel_, x)(void) \ { \ dma_clear_isr(CONCAT2(STM32_DMAC_CH, x)); \ if (dma_irq[CONCAT2(STM32_DMAC_CH, x)].cb != NULL) \ diff --git a/chip/stm32/gpio-stm32f3.c b/chip/stm32/gpio-stm32f3.c index a8deff59bf..f3a1b0068b 100644 --- a/chip/stm32/gpio-stm32f3.c +++ b/chip/stm32/gpio-stm32f3.c @@ -41,12 +41,17 @@ static void gpio_init(void) } DECLARE_HOOK(HOOK_INIT, gpio_init, HOOK_PRIO_DEFAULT); -DECLARE_IRQ(STM32_IRQ_EXTI0, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI1, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI2, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI3, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI4, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI9_5, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI15_10, gpio_interrupt, 1); +static void _gpio_interrupt(void) +{ + gpio_interrupt(); +} + +DECLARE_IRQ(STM32_IRQ_EXTI0, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI1, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI2, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI3, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI4, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI9_5, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI15_10, _gpio_interrupt, 1); #include "gpio-f0-l.c" diff --git a/chip/stm32/gpio-stm32f4.c b/chip/stm32/gpio-stm32f4.c index bf55799fe2..1ccdadd472 100644 --- a/chip/stm32/gpio-stm32f4.c +++ b/chip/stm32/gpio-stm32f4.c @@ -56,12 +56,17 @@ static void gpio_init(void) } DECLARE_HOOK(HOOK_INIT, gpio_init, HOOK_PRIO_DEFAULT); -DECLARE_IRQ(STM32_IRQ_EXTI0, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI1, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI2, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI3, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI4, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI9_5, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI15_10, gpio_interrupt, 1); +static void _gpio_interrupt(void) +{ + gpio_interrupt(); +} + +DECLARE_IRQ(STM32_IRQ_EXTI0, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI1, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI2, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI3, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI4, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI9_5, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI15_10, _gpio_interrupt, 1); #include "gpio-f0-l.c" diff --git a/chip/stm32/gpio-stm32g4.c b/chip/stm32/gpio-stm32g4.c index bb20ac8877..e77adc0ba6 100644 --- a/chip/stm32/gpio-stm32g4.c +++ b/chip/stm32/gpio-stm32g4.c @@ -56,12 +56,17 @@ static void gpio_init(void) } DECLARE_HOOK(HOOK_INIT, gpio_init, HOOK_PRIO_DEFAULT); -DECLARE_IRQ(STM32_IRQ_EXTI0, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI1, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI2, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI3, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI4, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI9_5, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI15_10, gpio_interrupt, 1); +static void _gpio_interrupt(void) +{ + gpio_interrupt(); +} + +DECLARE_IRQ(STM32_IRQ_EXTI0, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI1, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI2, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI3, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI4, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI9_5, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI15_10, _gpio_interrupt, 1); #include "gpio-f0-l.c" diff --git a/chip/stm32/gpio-stm32h7.c b/chip/stm32/gpio-stm32h7.c index e501251de9..2cb723f076 100644 --- a/chip/stm32/gpio-stm32h7.c +++ b/chip/stm32/gpio-stm32h7.c @@ -37,12 +37,17 @@ static void gpio_init(void) } DECLARE_HOOK(HOOK_INIT, gpio_init, HOOK_PRIO_DEFAULT); -DECLARE_IRQ(STM32_IRQ_EXTI0, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI1, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI2, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI3, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI4, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI9_5, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI15_10, gpio_interrupt, 1); +static void _gpio_interrupt(void) +{ + gpio_interrupt(); +} + +DECLARE_IRQ(STM32_IRQ_EXTI0, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI1, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI2, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI3, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI4, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI9_5, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI15_10, _gpio_interrupt, 1); #include "gpio-f0-l.c" diff --git a/chip/stm32/gpio-stm32l.c b/chip/stm32/gpio-stm32l.c index 77b432e081..607a1a391f 100644 --- a/chip/stm32/gpio-stm32l.c +++ b/chip/stm32/gpio-stm32l.c @@ -41,12 +41,17 @@ static void gpio_init(void) } DECLARE_HOOK(HOOK_INIT, gpio_init, HOOK_PRIO_DEFAULT); -DECLARE_IRQ(STM32_IRQ_EXTI0, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI1, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI2, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI3, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI4, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI9_5, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI15_10, gpio_interrupt, 1); +static void _gpio_interrupt(void) +{ + gpio_interrupt(); +} + +DECLARE_IRQ(STM32_IRQ_EXTI0, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI1, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI2, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI3, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI4, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI9_5, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI15_10, _gpio_interrupt, 1); #include "gpio-f0-l.c" diff --git a/chip/stm32/gpio-stm32l4.c b/chip/stm32/gpio-stm32l4.c index c4ccd5f01a..f4ec6f4412 100644 --- a/chip/stm32/gpio-stm32l4.c +++ b/chip/stm32/gpio-stm32l4.c @@ -42,12 +42,17 @@ static void gpio_init(void) } DECLARE_HOOK(HOOK_INIT, gpio_init, HOOK_PRIO_DEFAULT); -DECLARE_IRQ(STM32_IRQ_EXTI0, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI1, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI2, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI3, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI4, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI9_5, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI15_10, gpio_interrupt, 1); +static void _gpio_interrupt(void) +{ + gpio_interrupt(); +} + +DECLARE_IRQ(STM32_IRQ_EXTI0, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI1, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI2, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI3, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI4, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI9_5, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI15_10, _gpio_interrupt, 1); #include "gpio-f0-l.c" diff --git a/chip/stm32/gpio-stm32l5.c b/chip/stm32/gpio-stm32l5.c index 2449fb1644..9943edd55b 100644 --- a/chip/stm32/gpio-stm32l5.c +++ b/chip/stm32/gpio-stm32l5.c @@ -49,21 +49,26 @@ static void gpio_init(void) } DECLARE_HOOK(HOOK_INIT, gpio_init, HOOK_PRIO_DEFAULT); -DECLARE_IRQ(STM32_IRQ_EXTI0, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI1, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI2, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI3, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI4, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI5, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI6, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI7, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI8, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI9, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI10, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI11, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI12, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI13, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI14, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI15, gpio_interrupt, 1); +static void _gpio_interrupt(void) +{ + gpio_interrupt(); +} + +DECLARE_IRQ(STM32_IRQ_EXTI0, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI1, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI2, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI3, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI4, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI5, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI6, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI7, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI8, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI9, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI10, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI11, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI12, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI13, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI14, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI15, _gpio_interrupt, 1); #include "gpio-f0-l.c" diff --git a/chip/stm32/gpio.c b/chip/stm32/gpio.c index ccfd3399e2..20d9223351 100644 --- a/chip/stm32/gpio.c +++ b/chip/stm32/gpio.c @@ -171,7 +171,11 @@ void __keep gpio_interrupt(void) } } #ifdef CHIP_FAMILY_STM32F0 -DECLARE_IRQ(STM32_IRQ_EXTI0_1, gpio_interrupt, STM32_IRQ_EXT0_1_PRIORITY); -DECLARE_IRQ(STM32_IRQ_EXTI2_3, gpio_interrupt, STM32_IRQ_EXT2_3_PRIORITY); -DECLARE_IRQ(STM32_IRQ_EXTI4_15, gpio_interrupt, STM32_IRQ_EXTI4_15_PRIORITY); +static void _gpio_interrupt(void) +{ + gpio_interrupt(); +} +DECLARE_IRQ(STM32_IRQ_EXTI0_1, _gpio_interrupt, STM32_IRQ_EXT0_1_PRIORITY); +DECLARE_IRQ(STM32_IRQ_EXTI2_3, _gpio_interrupt, STM32_IRQ_EXT2_3_PRIORITY); +DECLARE_IRQ(STM32_IRQ_EXTI4_15, _gpio_interrupt, STM32_IRQ_EXTI4_15_PRIORITY); #endif diff --git a/chip/stm32/hwtimer.c b/chip/stm32/hwtimer.c index 953110017f..c215484a22 100644 --- a/chip/stm32/hwtimer.c +++ b/chip/stm32/hwtimer.c @@ -213,7 +213,7 @@ void __hw_clock_source_set(uint32_t ts) STM32_TIM_CNT(TIM_CLOCK_LSB) = ts & 0xffff; } -void __hw_clock_source_irq(void) +static void __hw_clock_source_irq(void) { uint32_t stat_tim_msb = STM32_TIM_SR(TIM_CLOCK_MSB); diff --git a/chip/stm32/hwtimer32.c b/chip/stm32/hwtimer32.c index 963fa44e51..61ba07cc56 100644 --- a/chip/stm32/hwtimer32.c +++ b/chip/stm32/hwtimer32.c @@ -49,7 +49,7 @@ void __hw_clock_source_set(uint32_t ts) STM32_TIM32_CNT(TIM_CLOCK32) = ts; } -void __hw_clock_source_irq(void) +static void __hw_clock_source_irq(void) { uint32_t stat_tim = STM32_TIM_SR(TIM_CLOCK32); diff --git a/chip/stm32/i2c-stm32f0.c b/chip/stm32/i2c-stm32f0.c index dacaa80257..f78a450a4e 100644 --- a/chip/stm32/i2c-stm32f0.c +++ b/chip/stm32/i2c-stm32f0.c @@ -439,7 +439,7 @@ static void i2c_event_handler(int port) } } } -void i2c2_event_interrupt(void) { i2c_event_handler(I2C_PORT_EC); } +static void i2c2_event_interrupt(void) { i2c_event_handler(I2C_PORT_EC); } DECLARE_IRQ(IRQ_PERIPHERAL, i2c2_event_interrupt, 2); #endif diff --git a/chip/stm32/i2c-stm32f4.c b/chip/stm32/i2c-stm32f4.c index c1f19704b5..840c151c62 100644 --- a/chip/stm32/i2c-stm32f4.c +++ b/chip/stm32/i2c-stm32f4.c @@ -975,7 +975,7 @@ static void i2c_event_handler(int port) if (!(i2c_cr1 & STM32_I2C_CR1_PE)) STM32_I2C_CR1(port) |= STM32_I2C_CR1_PE; } -void i2c_event_interrupt(void) { i2c_event_handler(I2C_PORT_EC); } +static void i2c_event_interrupt(void) { i2c_event_handler(I2C_PORT_EC); } DECLARE_IRQ(IRQ_PERIPHERAL_EV, i2c_event_interrupt, 2); DECLARE_IRQ(IRQ_PERIPHERAL_ER, i2c_event_interrupt, 2); #endif diff --git a/chip/stm32/i2c-stm32l4.c b/chip/stm32/i2c-stm32l4.c index 5997ed5b70..2afcd1ce9c 100644 --- a/chip/stm32/i2c-stm32l4.c +++ b/chip/stm32/i2c-stm32l4.c @@ -299,7 +299,7 @@ static void i2c_event_handler(int port) } } -void i2c_event_interrupt(void) +static void i2c_event_interrupt(void) { i2c_event_handler(I2C_PORT_EC); } diff --git a/chip/stm32/system.c b/chip/stm32/system.c index 03e9a74ac4..0b0f7f3759 100644 --- a/chip/stm32/system.c +++ b/chip/stm32/system.c @@ -253,7 +253,7 @@ static void configure_pvd(void) STM32_PWR_CR |= STM32_PWR_PVDE; } -void pvd_interrupt(void) +static void pvd_interrupt(void) { /* Clear Pending Register */ STM32_EXTI_PR = EXTI_PVD_EVENT; diff --git a/chip/stm32/uart.c b/chip/stm32/uart.c index 0632fc6687..bafca58c46 100644 --- a/chip/stm32/uart.c +++ b/chip/stm32/uart.c @@ -161,7 +161,7 @@ int uart_read_char(void) } /* Interrupt handler for console USART */ -void uart_interrupt(void) +static void uart_interrupt(void) { #ifndef CONFIG_UART_TX_DMA /* diff --git a/chip/stm32/ucpd-stm32gx.c b/chip/stm32/ucpd-stm32gx.c index ce5b82fff8..d8c41c8f28 100644 --- a/chip/stm32/ucpd-stm32gx.c +++ b/chip/stm32/ucpd-stm32gx.c @@ -1248,7 +1248,7 @@ enum ec_error_list stm32gx_ucpd_set_bist_test_mode(const int port, return EC_SUCCESS; } -void stm32gx_ucpd1_irq(void) +static void stm32gx_ucpd1_irq(void) { /* STM32_IRQ_UCPD indicates this is from UCPD1, so port = 0 */ int port = 0; diff --git a/chip/stm32/usart-stm32f0.c b/chip/stm32/usart-stm32f0.c index 908542146f..b4e7c924a8 100644 --- a/chip/stm32/usart-stm32f0.c +++ b/chip/stm32/usart-stm32f0.c @@ -99,7 +99,7 @@ struct usart_hw_config const usart1_hw = { .ops = &usart_variant_hw_ops, }; -void usart1_interrupt(void) +static void usart1_interrupt(void) { usart_interrupt(configs[0]); } @@ -117,7 +117,7 @@ struct usart_hw_config const usart2_hw = { .ops = &usart_variant_hw_ops, }; -void usart2_interrupt(void) +static void usart2_interrupt(void) { usart_interrupt(configs[1]); } @@ -148,7 +148,7 @@ struct usart_hw_config const usart4_hw = { #endif #if defined(CONFIG_STREAM_USART3) || defined(CONFIG_STREAM_USART4) -void usart3_4_interrupt(void) +static void usart3_4_interrupt(void) { /* * This interrupt handler could be called with one of these configs diff --git a/chip/stm32/usart-stm32f3.c b/chip/stm32/usart-stm32f3.c index 42a0cf310e..18452cb3fb 100644 --- a/chip/stm32/usart-stm32f3.c +++ b/chip/stm32/usart-stm32f3.c @@ -73,7 +73,7 @@ struct usart_hw_config const usart1_hw = { .ops = &usart_variant_hw_ops, }; -void usart1_interrupt(void) +static void usart1_interrupt(void) { usart_interrupt(configs[0]); } @@ -91,7 +91,7 @@ struct usart_hw_config const usart2_hw = { .ops = &usart_variant_hw_ops, }; -void usart2_interrupt(void) +static void usart2_interrupt(void) { usart_interrupt(configs[1]); } @@ -111,7 +111,7 @@ struct usart_hw_config const usart3_hw = { #endif #if defined(CONFIG_STREAM_USART3) -void usart3_interrupt(void) +static void usart3_interrupt(void) { usart_interrupt(configs[2]); } diff --git a/chip/stm32/usart-stm32f4.c b/chip/stm32/usart-stm32f4.c index a554da147a..2c9e4b1f4a 100644 --- a/chip/stm32/usart-stm32f4.c +++ b/chip/stm32/usart-stm32f4.c @@ -66,7 +66,7 @@ struct usart_hw_config const usart1_hw = { .ops = &usart_variant_hw_ops, }; -void usart1_interrupt(void) +static void usart1_interrupt(void) { usart_interrupt(configs[0]); } @@ -84,7 +84,7 @@ struct usart_hw_config const usart2_hw = { .ops = &usart_variant_hw_ops, }; -void usart2_interrupt(void) +static void usart2_interrupt(void) { usart_interrupt(configs[1]); } @@ -104,7 +104,7 @@ struct usart_hw_config const usart3_hw = { #endif #if defined(CONFIG_STREAM_USART3) -void usart3_interrupt(void) +static void usart3_interrupt(void) { usart_interrupt(configs[2]); } diff --git a/chip/stm32/usart-stm32l.c b/chip/stm32/usart-stm32l.c index 2b7406a0a4..8d23524bb0 100644 --- a/chip/stm32/usart-stm32l.c +++ b/chip/stm32/usart-stm32l.c @@ -87,7 +87,7 @@ struct usart_hw_config const usart1_hw = { .ops = &usart_variant_hw_ops, }; -void usart1_interrupt(void) +static void usart1_interrupt(void) { usart_interrupt(configs[0]); } @@ -105,7 +105,7 @@ struct usart_hw_config const usart2_hw = { .ops = &usart_variant_hw_ops, }; -void usart2_interrupt(void) +static void usart2_interrupt(void) { usart_interrupt(configs[1]); } @@ -123,7 +123,7 @@ struct usart_hw_config const usart3_hw = { .ops = &usart_variant_hw_ops, }; -void usart3_interrupt(void) +static void usart3_interrupt(void) { usart_interrupt(configs[2]); } diff --git a/chip/stm32/usart-stm32l5.c b/chip/stm32/usart-stm32l5.c index 0245718e21..c6d81bf3e4 100644 --- a/chip/stm32/usart-stm32l5.c +++ b/chip/stm32/usart-stm32l5.c @@ -87,7 +87,7 @@ struct usart_hw_config const usart1_hw = { .ops = &usart_variant_hw_ops, }; -void usart1_interrupt(void) +static void usart1_interrupt(void) { usart_interrupt(configs[0]); } @@ -105,7 +105,7 @@ struct usart_hw_config const usart2_hw = { .ops = &usart_variant_hw_ops, }; -void usart2_interrupt(void) +static void usart2_interrupt(void) { usart_interrupt(configs[1]); } @@ -123,7 +123,7 @@ struct usart_hw_config const usart3_hw = { .ops = &usart_variant_hw_ops, }; -void usart3_interrupt(void) +static void usart3_interrupt(void) { usart_interrupt(configs[2]); } diff --git a/chip/stm32/usb.c b/chip/stm32/usb.c index 1c41a68df1..dde84efaea 100644 --- a/chip/stm32/usb.c +++ b/chip/stm32/usb.c @@ -684,7 +684,7 @@ static void usb_interrupt_handle_wake(uint16_t status) } #endif /* CONFIG_USB_SUSPEND && CONFIG_USB_REMOTE_WAKEUP */ -void usb_interrupt(void) +static void usb_interrupt(void) { uint16_t status = STM32_USB_ISTR; diff --git a/chip/stm32/usb_dwc.c b/chip/stm32/usb_dwc.c index f4ee89f1f0..0028806432 100644 --- a/chip/stm32/usb_dwc.c +++ b/chip/stm32/usb_dwc.c @@ -999,7 +999,7 @@ static void usb_enumdone(void) } -void usb_interrupt(void) +static void usb_interrupt(void) { uint32_t status = GR_USB_GINTSTS & GR_USB_GINTMSK; uint32_t oepint = status & GINTSTS(OEPINT); diff --git a/chip/stm32/usb_pd_phy.c b/chip/stm32/usb_pd_phy.c index 90506d8975..21484b1a88 100644 --- a/chip/stm32/usb_pd_phy.c +++ b/chip/stm32/usb_pd_phy.c @@ -507,7 +507,11 @@ defined(CONFIG_USB_PD_LOW_POWER_IDLE_WHEN_CONNECTED) } } #ifdef CONFIG_USB_PD_RX_COMP_IRQ -DECLARE_IRQ(STM32_IRQ_COMP, pd_rx_handler, 1); +static void _pd_rx_handler(void) +{ + pd_rx_handler(); +} +DECLARE_IRQ(STM32_IRQ_COMP, _pd_rx_handler, 1); #endif /* --- release hardware --- */ diff --git a/core/cortex-m/irq_handler.h b/core/cortex-m/irq_handler.h index ae5d95cd94..9a69f8feeb 100644 --- a/core/cortex-m/irq_handler.h +++ b/core/cortex-m/irq_handler.h @@ -27,7 +27,7 @@ typedef struct { \ int fake[irq >= CONFIG_IRQ_COUNT ? -1 : 1]; \ } irq_num_check_##irq; \ - void __keep routine(void); \ + static void __attribute__((used)) routine(void); \ void IRQ_HANDLER(irq)(void) \ { \ asm volatile("mov r0, lr\n" \ diff --git a/core/cortex-m0/irq_handler.h b/core/cortex-m0/irq_handler.h index de36ef7623..e528717420 100644 --- a/core/cortex-m0/irq_handler.h +++ b/core/cortex-m0/irq_handler.h @@ -21,7 +21,7 @@ #define DECLARE_IRQ(irq, routine, priority) DECLARE_IRQ_(irq, routine, priority) #ifdef CONFIG_TASK_PROFILING #define DECLARE_IRQ_(irq, routine, priority) \ - void routine(void); \ + static void routine(void); \ void IRQ_HANDLER(irq)(void) \ { \ void *ret = __builtin_return_address(0); \ @@ -35,7 +35,7 @@ #else /* CONFIG_TASK_PROFILING */ /* No Profiling : connect directly the IRQ vector */ #define DECLARE_IRQ_(irq, routine, priority) \ - void routine(void); \ + static void routine(void); \ void IRQ_HANDLER(irq)(void) __attribute__((alias(STRINGIFY(routine))));\ const struct irq_priority __keep IRQ_PRIORITY(irq) \ __attribute__((section(".rodata.irqprio"))) \ diff --git a/core/host/irq_handler.h b/core/host/irq_handler.h index f905f463c1..3947046f8c 100644 --- a/core/host/irq_handler.h +++ b/core/host/irq_handler.h @@ -16,7 +16,7 @@ * ensure it is enabled in the interrupt controller with the right priority. */ #define DECLARE_IRQ(irq, routine, priority) \ - void routine(void); \ + static void routine(void); \ void IRQ_HANDLER(irq)(void) \ { \ void *ret = __builtin_return_address(0); \ diff --git a/core/minute-ia/irq_handler.h b/core/minute-ia/irq_handler.h index eec0ffddb4..d0f00a39f3 100644 --- a/core/minute-ia/irq_handler.h +++ b/core/minute-ia/irq_handler.h @@ -31,7 +31,7 @@ asm (".include \"core/minute-ia/irq_handler_common.S\""); * to be used for dynamically setting up interrupt gates */ #define DECLARE_IRQ_(irq_, routine_, vector) \ - void __keep routine_(void); \ + static void __attribute__((used)) routine_(void); \ void IRQ_HANDLER(irq_)(void); \ __asm__ (".section .rodata.irqs\n"); \ const struct irq_def __keep CONCAT4(__irq_, irq_, _, routine_) \ diff --git a/core/nds32/irq_handler.h b/core/nds32/irq_handler.h index eb55d9e233..7f679fa57e 100644 --- a/core/nds32/irq_handler.h +++ b/core/nds32/irq_handler.h @@ -16,7 +16,7 @@ * ensure it is enabled in the interrupt controller with the right priority. */ #define DECLARE_IRQ(irq, routine, priority) \ - void routine(void); \ + static void routine(void); \ void IRQ_HANDLER(CPU_INT(irq))(void) \ __attribute__ ((alias(STRINGIFY(routine)))); \ const struct irq_priority __keep IRQ_PRIORITY(CPU_INT(irq)) \ diff --git a/core/riscv-rv32i/irq_handler.h b/core/riscv-rv32i/irq_handler.h index 6414f90c7f..b6f9a222ef 100644 --- a/core/riscv-rv32i/irq_handler.h +++ b/core/riscv-rv32i/irq_handler.h @@ -21,7 +21,7 @@ * ensure it is enabled in the interrupt controller with the right priority. */ #define DECLARE_IRQ(irq, routine, priority) \ - void routine(void); \ + static void routine(void); \ void IRQ_HANDLER(CPU_INT(irq))(void) \ __attribute__ ((alias(STRINGIFY(routine)))); \ const struct irq_priority __keep IRQ_PRIORITY(CPU_INT(irq)) \ diff --git a/include/task.h b/include/task.h index 9eb5a23b33..f93991679e 100644 --- a/include/task.h +++ b/include/task.h @@ -431,8 +431,9 @@ struct irq_def { #define IRQ_HANDLER(irqname) CONCAT3(irq_, irqname, _handler) #define IRQ_HANDLER_OPT(irqname) CONCAT3(irq_, irqname, _handler_optional) #define DECLARE_IRQ(irq, routine, priority) DECLARE_IRQ_(irq, routine, priority) -#define DECLARE_IRQ_(irq, routine, priority) \ - void IRQ_HANDLER_OPT(irq)(void) __attribute__((alias(#routine))); +#define DECLARE_IRQ_(irq, routine, priority) \ + static void routine(void) __attribute__((used)); \ + void IRQ_HANDLER_OPT(irq)(void) __attribute__((alias(#routine))) /* Include ec.irqlist here for compilation dependency */ #define ENABLE_IRQ(x) diff --git a/test/stm32f_rtc.c b/test/stm32f_rtc.c index 0e60fcb73f..36c67f004e 100644 --- a/test/stm32f_rtc.c +++ b/test/stm32f_rtc.c @@ -17,7 +17,7 @@ static const int rtc_delay_ms = 500; static const int delay_tol_us = MSEC / 2; /* Override default RTC interrupt handler */ -void __rtc_alarm_irq(void) +void rtc_alarm_irq(void) { atomic_add(&rtc_fired, 1); reset_rtc_alarm(&rtc_irq); |