diff options
| -rw-r--r-- | chip/stm32/registers.h | 1 | ||||
| -rw-r--r-- | chip/stm32/system.c | 3 |
2 files changed, 4 insertions, 0 deletions
diff --git a/chip/stm32/registers.h b/chip/stm32/registers.h index 491718f631..cc43ba32bb 100644 --- a/chip/stm32/registers.h +++ b/chip/stm32/registers.h @@ -906,6 +906,7 @@ typedef volatile struct timer_ctlr timer_ctlr_t; #define STM32_RCC_APB1RSTR REG32(STM32_RCC_BASE + 0x10) #define STM32_RCC_AHBENR REG32(STM32_RCC_BASE + 0x14) #define STM32_RCC_APB2ENR REG32(STM32_RCC_BASE + 0x18) +#define STM32_RCC_DBGMCUEN (1 << 22) #define STM32_RCC_SYSCFGEN (1 << 0) #define STM32_RCC_APB1ENR REG32(STM32_RCC_BASE + 0x1c) diff --git a/chip/stm32/system.c b/chip/stm32/system.c index 884a5d9ed2..c9bc61a818 100644 --- a/chip/stm32/system.c +++ b/chip/stm32/system.c @@ -199,6 +199,9 @@ void chip_pre_init(void) STM32_RCC_PB1_TIM7 | STM32_RCC_PB1_WWDG | STM32_RCC_PB1_IWDG; apb2fz_reg = STM32_RCC_PB2_TIM15 | STM32_RCC_PB2_TIM16 | STM32_RCC_PB2_TIM17 | STM32_RCC_PB2_TIM1; + + /* enable clock to debug module before writing */ + STM32_RCC_APB2ENR |= STM32_RCC_DBGMCUEN; #elif defined(CHIP_FAMILY_STM32F3) apb1fz_reg = STM32_RCC_PB1_TIM2 | STM32_RCC_PB1_TIM3 | STM32_RCC_PB1_TIM4 | |