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-rw-r--r--chip/stm32/clock-stm32g4.c2
-rw-r--r--extra/i2c_pseudo/i2c-pseudo.c6
-rw-r--r--third_party/boringssl/core/cortex-m/aes.S10
3 files changed, 8 insertions, 10 deletions
diff --git a/chip/stm32/clock-stm32g4.c b/chip/stm32/clock-stm32g4.c
index 172a68ce66..941cb94327 100644
--- a/chip/stm32/clock-stm32g4.c
+++ b/chip/stm32/clock-stm32g4.c
@@ -77,7 +77,7 @@ static void stm32g4_config_pll(uint32_t hclk_hz, uint32_t pll_src,
pll_n = (hclk_hz * STM32G4_PLL_R * STM32G4_AHB_PRE) /
STM32G4_PLL_IN_FREQ_HZ;
- /* Sanity checks */
+ /* validity checks */
ASSERT(pll_m && (pll_m <= 16));
ASSERT((pll_n >= 8) && (pll_n <= 127));
diff --git a/extra/i2c_pseudo/i2c-pseudo.c b/extra/i2c_pseudo/i2c-pseudo.c
index bbe702a14c..e4f1852cd8 100644
--- a/extra/i2c_pseudo/i2c-pseudo.c
+++ b/extra/i2c_pseudo/i2c-pseudo.c
@@ -69,8 +69,6 @@
#define I2CP_CTRLR_RSP_QUEUE_LIMIT 256
/* The maximum size of a single controller read response. */
#define I2CP_MAX_MSG_BUF_SIZE 16384
-/* Maximum length (not size!) of i2cp_cmds static array. */
-#define I2CP_CMDS_SANITY_LIMIT 64
/* Maximum size of a controller read or write. */
#define I2CP_RW_SIZE_LIMIT 1048576
@@ -78,7 +76,7 @@
* Marks the end of a controller command or read response.
*
* Fundamentally, controller commands and read responses could use different end
- * marker characters, but for sanity they should be the same.
+ * marker characters, but for validity they should be the same.
*
* This must be a variable, not a macro, because it is passed to copy_to_user()
* by address. Taking the address of a character literal causes a compiler
@@ -903,7 +901,7 @@ static ssize_t i2cp_rsp_master_xfer_formatter(void *data, char **out)
/*
* The length is not strictly necessary with the explicit
* end-of-message marker (i2cp_ctrlr_end_char), however it
- * serves as a useful sanity check for controllers to verify
+ * serves as a useful validity check for controllers to verify
* that no bytes were lost in kernel->userspace transmission.
*/
ret = anprintf(&buf_start, I2CP_MAX_MSG_BUF_SIZE, GFP_KERNEL,
diff --git a/third_party/boringssl/core/cortex-m/aes.S b/third_party/boringssl/core/cortex-m/aes.S
index fe34ef2e46..10d3cdabba 100644
--- a/third_party/boringssl/core/cortex-m/aes.S
+++ b/third_party/boringssl/core/cortex-m/aes.S
@@ -418,13 +418,13 @@ _armv4_AES_set_encrypt_key:
#endif
teq r0,#0
#ifdef __thumb2__
- itt eq @ Thumb2 thing, sanity check in ARM
+ itt eq @ Thumb2 thing, validity check in ARM
#endif
moveq r0,#-1
beq .Labrt
teq r2,#0
#ifdef __thumb2__
- itt eq @ Thumb2 thing, sanity check in ARM
+ itt eq @ Thumb2 thing, validity check in ARM
#endif
moveq r0,#-1
beq .Labrt
@@ -435,7 +435,7 @@ _armv4_AES_set_encrypt_key:
beq .Lok
teq r1,#256
#ifdef __thumb2__
- itt ne @ Thumb2 thing, sanity check in ARM
+ itt ne @ Thumb2 thing, validity check in ARM
#endif
movne r0,#-1
bne .Labrt
@@ -596,7 +596,7 @@ _armv4_AES_set_encrypt_key:
subs r12,r12,#1
str r3,[r11,#-12]
#ifdef __thumb2__
- itt eq @ Thumb2 thing, sanity check in ARM
+ itt eq @ Thumb2 thing, validity check in ARM
#endif
subeq r2,r11,#216
beq .Ldone
@@ -668,7 +668,7 @@ _armv4_AES_set_encrypt_key:
subs r12,r12,#1
str r3,[r11,#-20]
#ifdef __thumb2__
- itt eq @ Thumb2 thing, sanity check in ARM
+ itt eq @ Thumb2 thing, validity check in ARM
#endif
subeq r2,r11,#256
beq .Ldone