diff options
Diffstat (limited to 'baseboard/cherry')
| -rw-r--r-- | baseboard/cherry/baseboard.c | 119 | ||||
| -rw-r--r-- | baseboard/cherry/baseboard.h | 35 | ||||
| -rw-r--r-- | baseboard/cherry/build.mk | 2 | ||||
| -rw-r--r-- | baseboard/cherry/usb_pd_policy.c | 18 |
4 files changed, 78 insertions, 96 deletions
diff --git a/baseboard/cherry/baseboard.c b/baseboard/cherry/baseboard.c index 83c169c636..3f5f5c0e64 100644 --- a/baseboard/cherry/baseboard.c +++ b/baseboard/cherry/baseboard.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -52,8 +52,8 @@ static void xhci_init_done_interrupt(enum gpio_signal signal); #include "gpio_list.h" -#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ## args) +#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ##args) /* Wake-up pins for hibernate */ enum gpio_signal hibernate_wake_pins[] = { @@ -76,10 +76,10 @@ static void baseboard_charger_init(void) { /* b/198707662#comment9 */ int reg = (4096 / ISL9238_INPUT_VOLTAGE_REF_STEP) - << ISL9238_INPUT_VOLTAGE_REF_SHIFT; + << ISL9238_INPUT_VOLTAGE_REF_SHIFT; i2c_write16(I2C_PORT_CHARGER, ISL923X_ADDR_FLAGS, - ISL9238_REG_INPUT_VOLTAGE, reg); + ISL9238_REG_INPUT_VOLTAGE, reg); } DECLARE_HOOK(HOOK_INIT, baseboard_charger_init, HOOK_PRIO_DEFAULT + 2); @@ -113,14 +113,14 @@ void rt1718s_tcpc_interrupt(enum gpio_signal signal) /* ADC channels. Must be in the exactly same order as in enum adc_channel. */ const struct adc_t adc_channels[] = { /* Convert to mV (3000mV/1024). */ - {"VBUS", ADC_MAX_MVOLT * 10, ADC_READ_MAX + 1, 0, CHIP_ADC_CH0}, - {"BOARD_ID_0", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH1}, - {"BOARD_ID_1", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH2}, + { "VBUS", ADC_MAX_MVOLT * 10, ADC_READ_MAX + 1, 0, CHIP_ADC_CH0 }, + { "BOARD_ID_0", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH1 }, + { "BOARD_ID_1", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH2 }, /* AMON/BMON gain = 17.97 */ - {"CHARGER_AMON_R", ADC_MAX_MVOLT * 1000 / 17.97, ADC_READ_MAX + 1, 0, - CHIP_ADC_CH3}, - {"CHARGER_PMON", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH6}, - {"TEMP_SENSOR_CHG", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH7}, + { "CHARGER_AMON_R", ADC_MAX_MVOLT * 1000 / 17.97, ADC_READ_MAX + 1, 0, + CHIP_ADC_CH3 }, + { "CHARGER_PMON", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH6 }, + { "TEMP_SENSOR_CHG", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH7 }, }; BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); @@ -210,7 +210,8 @@ BUILD_ASSERT(ARRAY_SIZE(usb_port_enable) == USB_PORT_COUNT); __maybe_unused void xhci_init_done_interrupt(enum gpio_signal signal) { enum usb_charge_mode mode = gpio_get_level(signal) ? - USB_CHARGE_MODE_ENABLED : USB_CHARGE_MODE_DISABLED; + USB_CHARGE_MODE_ENABLED : + USB_CHARGE_MODE_DISABLED; for (int i = 0; i < USB_PORT_COUNT; i++) usb_charge_set_mode(i, mode, USB_ALLOW_SUSPEND_CHARGE); @@ -246,34 +247,26 @@ __maybe_unused void xhci_init_done_interrupt(enum gpio_signal signal) /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - { - .name = "bat_chg", - .port = IT83XX_I2C_CH_A, - .kbps = 100, - .scl = GPIO_I2C_A_SCL, - .sda = GPIO_I2C_A_SDA - }, - { - .name = "sensor", - .port = IT83XX_I2C_CH_B, - .kbps = 400, - .scl = GPIO_I2C_B_SCL, - .sda = GPIO_I2C_B_SDA - }, - { - .name = "usb0", - .port = IT83XX_I2C_CH_C, - .kbps = 400, - .scl = GPIO_I2C_C_SCL, - .sda = GPIO_I2C_C_SDA - }, - { - .name = "usb1", - .port = IT83XX_I2C_CH_E, - .kbps = 1000, - .scl = GPIO_I2C_E_SCL, - .sda = GPIO_I2C_E_SDA - }, + { .name = "bat_chg", + .port = IT83XX_I2C_CH_A, + .kbps = 100, + .scl = GPIO_I2C_A_SCL, + .sda = GPIO_I2C_A_SDA }, + { .name = "sensor", + .port = IT83XX_I2C_CH_B, + .kbps = 400, + .scl = GPIO_I2C_B_SCL, + .sda = GPIO_I2C_B_SDA }, + { .name = "usb0", + .port = IT83XX_I2C_CH_C, + .kbps = 400, + .scl = GPIO_I2C_C_SCL, + .sda = GPIO_I2C_C_SDA }, + { .name = "usb1", + .port = IT83XX_I2C_CH_E, + .kbps = 1000, + .scl = GPIO_I2C_E_SCL, + .sda = GPIO_I2C_E_SDA }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); @@ -315,26 +308,30 @@ __override int board_rt1718s_init(int port) /* gpio 1/2 output high when receiving frx signal */ RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO1_VBUS_CTRL, - RT1718S_GPIO1_VBUS_CTRL_FRS_RX_VBUS, 0xFF)); + RT1718S_GPIO1_VBUS_CTRL_FRS_RX_VBUS, + 0xFF)); RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO2_VBUS_CTRL, - RT1718S_GPIO2_VBUS_CTRL_FRS_RX_VBUS, 0xFF)); + RT1718S_GPIO2_VBUS_CTRL_FRS_RX_VBUS, + 0xFF)); /* Turn on SBU switch */ - RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_RT2_SBU_CTRL_01, - RT1718S_RT2_SBU_CTRL_01_SBU_VIEN | - RT1718S_RT2_SBU_CTRL_01_SBU2_SWEN | - RT1718S_RT2_SBU_CTRL_01_SBU1_SWEN, - 0xFF)); + RETURN_ERROR( + rt1718s_update_bits8(port, RT1718S_RT2_SBU_CTRL_01, + RT1718S_RT2_SBU_CTRL_01_SBU_VIEN | + RT1718S_RT2_SBU_CTRL_01_SBU2_SWEN | + RT1718S_RT2_SBU_CTRL_01_SBU1_SWEN, + 0xFF)); /* Trigger GPIO 1/2 change when FRS signal received */ - RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_FRS_CTRL3, - RT1718S_FRS_CTRL3_FRS_RX_WAIT_GPIO2 | + RETURN_ERROR(rt1718s_update_bits8( + port, RT1718S_FRS_CTRL3, + RT1718S_FRS_CTRL3_FRS_RX_WAIT_GPIO2 | RT1718S_FRS_CTRL3_FRS_RX_WAIT_GPIO1, - RT1718S_FRS_CTRL3_FRS_RX_WAIT_GPIO2 | + RT1718S_FRS_CTRL3_FRS_RX_WAIT_GPIO2 | RT1718S_FRS_CTRL3_FRS_RX_WAIT_GPIO1)); /* Set FRS signal detect time to 46.875us */ RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_FRS_CTRL1, - RT1718S_FRS_CTRL1_FRSWAPRX_MASK, - 0xFF)); + RT1718S_FRS_CTRL1_FRSWAPRX_MASK, + 0xFF)); return EC_SUCCESS; } @@ -371,13 +368,6 @@ void board_reset_pd_mcu(void) /* C1: Add code if TCPC chips need a reset */ } -void board_set_charge_limit(int port, int supplier, int charge_ma, - int max_ma, int charge_mv) -{ - charge_set_input_current_limit( - MAX(charge_ma, CONFIG_CHARGER_INPUT_CURRENT), charge_mv); -} - void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled) { /* @@ -452,13 +442,12 @@ int ppc_get_alert_status(int port) return 0; } /* SD Card */ -int board_regulator_get_info(uint32_t index, char *name, - uint16_t *num_voltages, uint16_t *voltages_mv) +int board_regulator_get_info(uint32_t index, char *name, uint16_t *num_voltages, + uint16_t *voltages_mv) { enum mt6360_regulator_id id = index; - return mt6360_regulator_get_info(id, name, num_voltages, - voltages_mv); + return mt6360_regulator_get_info(id, name, num_voltages, voltages_mv); } int board_regulator_enable(uint32_t index, uint8_t enable) @@ -508,7 +497,7 @@ __override int board_rt1718s_set_frs_enable(int port, int enable) * FRS path. */ rt1718s_gpio_set_flags(port, GPIO_EN_USB_C1_FRS, - enable ? GPIO_OUT_HIGH : GPIO_OUT_LOW); + enable ? GPIO_OUT_HIGH : GPIO_OUT_LOW); return EC_SUCCESS; } diff --git a/baseboard/cherry/baseboard.h b/baseboard/cherry/baseboard.h index a03c5c5dbd..2b0d03a436 100644 --- a/baseboard/cherry/baseboard.h +++ b/baseboard/cherry/baseboard.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -93,13 +93,13 @@ #define CONFIG_I2C_CONTROLLER #define CONFIG_I2C_PASSTHRU_RESTRICTED #define CONFIG_I2C_VIRTUAL_BATTERY -#define I2C_PORT_CHARGER IT83XX_I2C_CH_A -#define I2C_PORT_BATTERY IT83XX_I2C_CH_A -#define I2C_PORT_ACCEL IT83XX_I2C_CH_B -#define I2C_PORT_PPC0 IT83XX_I2C_CH_C -#define I2C_PORT_PPC1 IT83XX_I2C_CH_E -#define I2C_PORT_USB0 IT83XX_I2C_CH_C -#define I2C_PORT_USB1 IT83XX_I2C_CH_E +#define I2C_PORT_CHARGER IT83XX_I2C_CH_A +#define I2C_PORT_BATTERY IT83XX_I2C_CH_A +#define I2C_PORT_ACCEL IT83XX_I2C_CH_B +#define I2C_PORT_PPC0 IT83XX_I2C_CH_C +#define I2C_PORT_PPC1 IT83XX_I2C_CH_E +#define I2C_PORT_USB0 IT83XX_I2C_CH_C +#define I2C_PORT_USB1 IT83XX_I2C_CH_E #define I2C_PORT_USB_MUX0 IT83XX_I2C_CH_C #define I2C_PORT_USB_MUX1 IT83XX_I2C_CH_E #define I2C_PORT_VIRTUAL_BATTERY I2C_PORT_BATTERY @@ -155,7 +155,7 @@ #define PD_MAX_VOLTAGE_MV 20000 #define PD_OPERATING_POWER_MW 15000 #define PD_MAX_POWER_MW 60000 -#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ +#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ #define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */ /* USB-A */ @@ -202,13 +202,12 @@ EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) | \ EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) | \ EC_HOST_EVENT_MASK(EC_HOST_EVENT_HANG_DETECT) | \ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE) | \ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE) | \ EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON)) /* And the MKBP events */ #define CONFIG_MKBP_EVENT_WAKEUP_MASK \ - (BIT(EC_MKBP_EVENT_KEY_MATRIX) | \ - BIT(EC_MKBP_EVENT_HOST_EVENT)) + (BIT(EC_MKBP_EVENT_KEY_MATRIX) | BIT(EC_MKBP_EVENT_HOST_EVENT)) #ifndef __ASSEMBLER__ @@ -217,11 +216,11 @@ #include "power/mt8192.h" enum adc_channel { - ADC_VBUS, /* ADC 0 */ - ADC_BOARD_ID, /* ADC 1 */ - ADC_SKU_ID, /* ADC 2 */ - ADC_CHARGER_AMON_R, /* ADC 3 */ - ADC_CHARGER_PMON, /* ADC 6 */ + ADC_VBUS, /* ADC 0 */ + ADC_BOARD_ID, /* ADC 1 */ + ADC_SKU_ID, /* ADC 2 */ + ADC_CHARGER_AMON_R, /* ADC 3 */ + ADC_CHARGER_PMON, /* ADC 6 */ ADC_TEMP_SENSOR_CHARGER, /* ADC 7 */ /* Number of ADC channels */ @@ -239,7 +238,7 @@ void rt1718s_tcpc_interrupt(enum gpio_signal signal); /* RT1718S gpio to pin name mapping */ #define GPIO_EN_USB_C1_VBUS_L RT1718S_GPIO1 #define GPIO_EN_USB_C1_5V_OUT RT1718S_GPIO2 -#define GPIO_EN_USB_C1_FRS RT1718S_GPIO3 +#define GPIO_EN_USB_C1_FRS RT1718S_GPIO3 #endif /* !__ASSEMBLER__ */ #endif /* __CROS_EC_BASEBOARD_H */ diff --git a/baseboard/cherry/build.mk b/baseboard/cherry/build.mk index ae82c1ca68..74609511c3 100644 --- a/baseboard/cherry/build.mk +++ b/baseboard/cherry/build.mk @@ -1,5 +1,5 @@ # -*- makefile -*- -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. # diff --git a/baseboard/cherry/usb_pd_policy.c b/baseboard/cherry/usb_pd_policy.c index 1e7664bab9..450f5c06d7 100644 --- a/baseboard/cherry/usb_pd_policy.c +++ b/baseboard/cherry/usb_pd_policy.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -19,8 +19,8 @@ #error Cherry reference must have at least one 3.0 A port #endif -#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) +#define CPRINTS(format, args...) cprints(CC_USBPD, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ##args) /* The port that the aux channel is on. */ static enum { @@ -90,8 +90,7 @@ __override int svdm_dp_attention(int port, uint32_t *payload) dp_status[port] = payload[1]; - if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND) && - (irq || lvl)) + if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND) && (irq || lvl)) /* * Wake up the AP. IRQ or level high indicates a DP sink is now * present. @@ -164,7 +163,7 @@ __override void svdm_exit_dp_mode(int port) svdm_set_hpd_gpio(port, 0); #endif /* CONFIG_USB_PD_DP_HPD_GPIO */ usb_mux_hpd_update(port, USB_PD_MUX_HPD_LVL_DEASSERTED | - USB_PD_MUX_HPD_IRQ_DEASSERTED); + USB_PD_MUX_HPD_IRQ_DEASSERTED); #ifdef USB_PD_PORT_TCPC_MST if (port == USB_PD_PORT_TCPC_MST) baseboard_mst_enable_control(port, 0); @@ -204,16 +203,11 @@ int pd_snk_is_vbus_provided(int port) void pd_power_supply_reset(int port) { - int prev_en; - - prev_en = ppc_is_sourcing_vbus(port); - /* Disable VBUS. */ ppc_vbus_source_enable(port, 0); /* Enable discharge if we were previously sourcing 5V */ - if (prev_en) - pd_set_vbus_discharge(port, 1); + pd_set_vbus_discharge(port, 1); if (port == 1) rt1718s_gpio_set_level(port, GPIO_EN_USB_C1_5V_OUT, 0); |