diff options
Diffstat (limited to 'baseboard/honeybuns')
| -rw-r--r-- | baseboard/honeybuns/baseboard.c | 61 | ||||
| -rw-r--r-- | baseboard/honeybuns/baseboard.h | 69 | ||||
| -rw-r--r-- | baseboard/honeybuns/build.mk | 2 | ||||
| -rw-r--r-- | baseboard/honeybuns/usb_pd_policy.c | 128 | ||||
| -rw-r--r-- | baseboard/honeybuns/usbc_support.c | 52 |
5 files changed, 141 insertions, 171 deletions
diff --git a/baseboard/honeybuns/baseboard.c b/baseboard/honeybuns/baseboard.c index e7df1b6ef4..506eb6f265 100644 --- a/baseboard/honeybuns/baseboard.c +++ b/baseboard/honeybuns/baseboard.c @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -18,20 +18,17 @@ #include "driver/tcpm/tcpm.h" #include "util.h" -#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ## args) +#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ##args) #define POWER_BUTTON_SHORT_USEC (300 * MSEC) #define POWER_BUTTON_LONG_USEC (5000 * MSEC) #define POWER_BUTTON_DEBOUNCE_USEC (30) -#define BUTTON_EVT_CHANGE BIT(0) -#define BUTTON_EVT_INFO BIT(1) +#define BUTTON_EVT_CHANGE BIT(0) +#define BUTTON_EVT_INFO BIT(1) -enum power { - POWER_OFF, - POWER_ON -}; +enum power { POWER_OFF, POWER_ON }; enum button { BUTTON_RELEASE, @@ -66,7 +63,7 @@ __maybe_unused static void board_power_sequence(int enable) int i; if (enable) { - for(i = 0; i < board_power_seq_count; i++) { + for (i = 0; i < board_power_seq_count; i++) { gpio_set_level(board_power_seq[i].signal, board_power_seq[i].level); CPRINTS("power seq: rail = %d", i); @@ -74,7 +71,7 @@ __maybe_unused static void board_power_sequence(int enable) msleep(board_power_seq[i].delay_ms); } } else { - for(i = board_power_seq_count - 1; i >= 0; i--) { + for (i = board_power_seq_count - 1; i >= 0; i--) { gpio_set_level(board_power_seq[i].signal, !board_power_seq[i].level); CPRINTS("sequence[%d]: level = %d", i, @@ -89,20 +86,16 @@ __maybe_unused static void board_power_sequence(int enable) /******************************************************************************/ /* I2C port map configuration */ const struct i2c_port_t i2c_ports[] = { - { - .name = "i2c1", - .port = I2C_PORT_I2C1, - .kbps = 400, - .scl = GPIO_EC_I2C1_SCL, - .sda = GPIO_EC_I2C1_SDA - }, - { - .name = "i2c3", - .port = I2C_PORT_I2C3, - .kbps = 400, - .scl = GPIO_EC_I2C3_SCL, - .sda = GPIO_EC_I2C3_SDA - }, + { .name = "i2c1", + .port = I2C_PORT_I2C1, + .kbps = 400, + .scl = GPIO_EC_I2C1_SCL, + .sda = GPIO_EC_I2C1_SDA }, + { .name = "i2c3", + .port = I2C_PORT_I2C3, + .kbps = 400, + .scl = GPIO_EC_I2C3_SCL, + .sda = GPIO_EC_I2C3_SDA }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); @@ -246,7 +239,7 @@ static void baseboard_init(void) #else /* Set up host port usbc to present Rd on CC lines */ - if(baseboard_usbc_init(USB_PD_PORT_HOST)) + if (baseboard_usbc_init(USB_PD_PORT_HOST)) CPRINTS("usbc: Failed to set up sink path"); else CPRINTS("usbc: sink path configure success!"); @@ -381,11 +374,11 @@ void power_button_task(void *u) * Default wait state: Only need to check if the button * is pressed and start the short press timer. */ - if (evt & BUTTON_EVT_CHANGE && button_level == - BUTTON_PRESSED_LEVEL) { + if (evt & BUTTON_EVT_CHANGE && + button_level == BUTTON_PRESSED_LEVEL) { state = BUTTON_PRESS; timer_us = (POWER_BUTTON_SHORT_USEC - - POWER_BUTTON_DEBOUNCE_USEC); + POWER_BUTTON_DEBOUNCE_USEC); } break; case BUTTON_PRESS: @@ -399,7 +392,7 @@ void power_button_task(void *u) } else { /* Start long press timer */ timer_us = POWER_BUTTON_LONG_USEC - - POWER_BUTTON_SHORT_USEC; + POWER_BUTTON_SHORT_USEC; /* * If dock is currently off, then change to the * power on state. If dock is already on, then @@ -407,7 +400,7 @@ void power_button_task(void *u) */ if (dock_state == POWER_OFF) { baseboard_power_on(); - state = BUTTON_PRESS_POWER_ON; + state = BUTTON_PRESS_POWER_ON; } else { state = BUTTON_PRESS_SHORT; } @@ -474,9 +467,8 @@ void baseboard_power_button_evt(int level) POWER_BUTTON_DEBOUNCE_USEC); } -static int command_pwr_btn(int argc, char **argv) +static int command_pwr_btn(int argc, const char **argv) { - if (argc == 1) { task_set_event(TASK_ID_POWER_BUTTON, BUTTON_EVT_INFO); return EC_SUCCESS; @@ -494,8 +486,7 @@ static int command_pwr_btn(int argc, char **argv) return EC_SUCCESS; } -DECLARE_CONSOLE_COMMAND(pwr_btn, command_pwr_btn, - "<on|off|mf>", +DECLARE_CONSOLE_COMMAND(pwr_btn, command_pwr_btn, "<on|off|mf>", "Simulate Power Button Press"); #endif diff --git a/baseboard/honeybuns/baseboard.h b/baseboard/honeybuns/baseboard.h index a22be156fe..4dd218f57d 100644 --- a/baseboard/honeybuns/baseboard.h +++ b/baseboard/honeybuns/baseboard.h @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -40,30 +40,30 @@ /* Do not use a dedicated PSTATE bank */ #undef CONFIG_FLASH_PSTATE_BANK -#define CONFIG_SHAREDLIB_SIZE 0 +#define CONFIG_SHAREDLIB_SIZE 0 -#define CONFIG_RO_MEM_OFF 0 -#define CONFIG_RO_STORAGE_OFF 0 -#define CONFIG_RO_SIZE (64*1024) +#define CONFIG_RO_MEM_OFF 0 +#define CONFIG_RO_STORAGE_OFF 0 +#define CONFIG_RO_SIZE (64 * 1024) -#define CONFIG_RW_MEM_OFF (CONFIG_RO_SIZE + CONFIG_RO_MEM_OFF) -#define CONFIG_RW_STORAGE_OFF 0 -#define CONFIG_RW_SIZE (CONFIG_FLASH_SIZE_BYTES - \ - (CONFIG_RW_MEM_OFF - CONFIG_RO_MEM_OFF)) +#define CONFIG_RW_MEM_OFF (CONFIG_RO_SIZE + CONFIG_RO_MEM_OFF) +#define CONFIG_RW_STORAGE_OFF 0 +#define CONFIG_RW_SIZE \ + (CONFIG_FLASH_SIZE_BYTES - (CONFIG_RW_MEM_OFF - CONFIG_RO_MEM_OFF)) -#define CONFIG_EC_PROTECTED_STORAGE_OFF CONFIG_RO_MEM_OFF -#define CONFIG_EC_PROTECTED_STORAGE_SIZE CONFIG_RO_SIZE -#define CONFIG_EC_WRITABLE_STORAGE_OFF CONFIG_RW_MEM_OFF -#define CONFIG_EC_WRITABLE_STORAGE_SIZE CONFIG_RW_SIZE +#define CONFIG_EC_PROTECTED_STORAGE_OFF CONFIG_RO_MEM_OFF +#define CONFIG_EC_PROTECTED_STORAGE_SIZE CONFIG_RO_SIZE +#define CONFIG_EC_WRITABLE_STORAGE_OFF CONFIG_RW_MEM_OFF +#define CONFIG_EC_WRITABLE_STORAGE_SIZE CONFIG_RW_SIZE -#define CONFIG_WP_STORAGE_OFF CONFIG_EC_PROTECTED_STORAGE_OFF -#define CONFIG_WP_STORAGE_SIZE CONFIG_EC_PROTECTED_STORAGE_SIZE +#define CONFIG_WP_STORAGE_OFF CONFIG_EC_PROTECTED_STORAGE_OFF +#define CONFIG_WP_STORAGE_SIZE CONFIG_EC_PROTECTED_STORAGE_SIZE /* 48 MHz SYSCLK clock frequency */ #define CPU_CLOCK 48000000 #define CONFIG_STM_HWTIMER32 #define TIM_CLOCK32 2 -#define TIM_CLOCK_MSB 3 +#define TIM_CLOCK_MSB 3 #define TIM_CLOCK_LSB 15 #define TIM_WATCHDOG 7 @@ -80,7 +80,7 @@ #define CONFIG_UART_TX_DMA_PH DMAMUX_REQ_USART3_TX /* CBI Configs */ -#define I2C_ADDR_EEPROM_FLAGS 0x50 +#define I2C_ADDR_EEPROM_FLAGS 0x50 #define CONFIG_CBI_EEPROM #define CONFIG_BOARD_VERSION_CBI #define CONFIG_CMD_CBI @@ -101,12 +101,12 @@ #define CONFIG_USB_MS_EXTENDED_COMPAT_ID_DESCRIPTOR /* USB endpoint indexes (use define rather than enum to expand them) */ -#define USB_EP_CONTROL 0 -#define USB_EP_UPDATE 1 -#define USB_EP_COUNT 2 +#define USB_EP_CONTROL 0 +#define USB_EP_UPDATE 1 +#define USB_EP_COUNT 2 -#define USB_IFACE_UPDATE 0 -#define USB_IFACE_COUNT 1 +#define USB_IFACE_UPDATE 0 +#define USB_IFACE_COUNT 1 #ifndef __ASSEMBLER__ /* USB string indexes */ @@ -197,14 +197,14 @@ enum usb_strings { #define CONFIG_SHA256 /* Define typical operating power and max power. */ -#define PD_MAX_VOLTAGE_MV 5000 -#define PD_MAX_CURRENT_MA 3000 -#define PD_MAX_POWER_MW 15000 +#define PD_MAX_VOLTAGE_MV 5000 +#define PD_MAX_CURRENT_MA 3000 +#define PD_MAX_POWER_MW 15000 #define PD_OPERATING_POWER_MW 15000 /* TODO(b:147314141): Verify these timings */ -#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ -#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */ +#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ +#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */ /* I2C Bus Configuration */ #define CONFIG_I2C @@ -216,8 +216,8 @@ enum usb_strings { * then redefined here to so it's more clear which signal is being used for * which purpose. */ -#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW -#define GPIO_WP_L GPIO_EC_WP_L +#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW +#define GPIO_WP_L GPIO_EC_WP_L #ifndef __ASSEMBLER__ @@ -226,8 +226,8 @@ enum usb_strings { struct power_seq { enum gpio_signal signal; /* power/reset gpio_signal to control */ - int level; /* level to set in power sequence */ - unsigned int delay_ms; /* delay (in msec) after setting gpio_signal */ + int level; /* level to set in power sequence */ + unsigned int delay_ms; /* delay (in msec) after setting gpio_signal */ }; enum mf_preference { @@ -239,9 +239,7 @@ enum mf_preference { * This is required as adc_channel is included in adc.h which ends up being * included when TCPMv2 functions are included */ -enum adc_channel { - ADC_CH_COUNT -}; +enum adc_channel { ADC_CH_COUNT }; extern const struct power_seq board_power_seq[]; extern const size_t board_power_seq_count; @@ -279,7 +277,6 @@ int baseboard_config_usbc_usb3_ppc(void); */ void baseboard_usb3_check_state(void); - /* * Set MST_LANE_CONTROL gpio to match the DP pin configuration selected * by the host in the DP Configure SVDM message. @@ -323,7 +320,7 @@ int c1_ps8805_is_sourcing_vbus(int port); * @param port: The Type-C port number. * @param enable: 1: Turn on VBUS, 0: turn off VBUS. * @return EC_SUCCESS on success, error otherwise. - */ + */ int c1_ps8805_vbus_source_enable(int port, int enable); #endif /* !__ASSEMBLER__ */ diff --git a/baseboard/honeybuns/build.mk b/baseboard/honeybuns/build.mk index 2868911925..57e93b0587 100644 --- a/baseboard/honeybuns/build.mk +++ b/baseboard/honeybuns/build.mk @@ -1,5 +1,5 @@ # -*- makefile -*- -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. # diff --git a/baseboard/honeybuns/usb_pd_policy.c b/baseboard/honeybuns/usb_pd_policy.c index ab95a7f9b6..956a73e7fb 100644 --- a/baseboard/honeybuns/usb_pd_policy.c +++ b/baseboard/honeybuns/usb_pd_policy.c @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -21,45 +21,46 @@ #include "usb_tc_sm.h" #include "usbc_ppc.h" -#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) -#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) +#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ##args) +#define CPRINTS(format, args...) cprints(CC_USBPD, format, ##args) #define MP4245_VOLTAGE_WINDOW BIT(2) #define MP4245_VOLTAGE_WINDOW_MASK (MP4245_VOLTAGE_WINDOW - 1) -#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\ - PDO_FIXED_COMM_CAP | PDO_FIXED_UNCONSTRAINED) +#define PDO_FIXED_FLAGS \ + (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP | PDO_FIXED_COMM_CAP | \ + PDO_FIXED_UNCONSTRAINED) /* Voltage indexes for the PDOs */ enum volt_idx { - PDO_IDX_5V = 0, - PDO_IDX_9V = 1, - PDO_IDX_15V = 2, - PDO_IDX_20V = 3, + PDO_IDX_5V = 0, + PDO_IDX_9V = 1, + PDO_IDX_15V = 2, + PDO_IDX_20V = 3, PDO_IDX_COUNT }; /* PDOs */ const uint32_t pd_src_host_pdo[] = { - [PDO_IDX_5V] = PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS), - [PDO_IDX_9V] = PDO_FIXED(9000, 3000, 0), - [PDO_IDX_15V] = PDO_FIXED(15000, 3000, 0), - [PDO_IDX_20V] = PDO_FIXED(20000, 3000, 0), + [PDO_IDX_5V] = PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS), + [PDO_IDX_9V] = PDO_FIXED(9000, 3000, 0), + [PDO_IDX_15V] = PDO_FIXED(15000, 3000, 0), + [PDO_IDX_20V] = PDO_FIXED(20000, 3000, 0), }; BUILD_ASSERT(ARRAY_SIZE(pd_src_host_pdo) == PDO_IDX_COUNT); #ifdef BOARD_C1_1A5_LIMIT const uint32_t pd_src_display_pdo[] = { - [PDO_IDX_5V] = PDO_FIXED(5000, 1500, PDO_FIXED_FLAGS), + [PDO_IDX_5V] = PDO_FIXED(5000, 1500, PDO_FIXED_FLAGS), }; #else const uint32_t pd_src_display_pdo[] = { - [PDO_IDX_5V] = PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS), + [PDO_IDX_5V] = PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS), }; #endif const uint32_t pd_snk_pdo[] = { - [PDO_IDX_5V] = PDO_FIXED(5000, 0, PDO_FIXED_FLAGS), + [PDO_IDX_5V] = PDO_FIXED(5000, 0, PDO_FIXED_FLAGS), }; const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); @@ -68,13 +69,12 @@ static int src_host_pdo_cnt_override; #define PD_DR_SWAP_ATTEMPT_MAX 3 static int pd_dr_swap_attempt_count[CONFIG_USB_PD_PORT_MAX_COUNT]; -static int command_hostpdo(int argc, char **argv) +static int command_hostpdo(int argc, const char **argv) { char *e; int limit; if (argc >= 2) { - limit = strtoi(argv[1], &e, 10); if ((limit < 0) || (limit > PDO_IDX_COUNT)) return EC_ERROR_PARAM1; @@ -85,8 +85,7 @@ static int command_hostpdo(int argc, char **argv) return EC_SUCCESS; } -DECLARE_CONSOLE_COMMAND(hostpdo, command_hostpdo, - "<0|1|2|3|4>", +DECLARE_CONSOLE_COMMAND(hostpdo, command_hostpdo, "<0|1|2|3|4>", "Limit number of PDOs for C0"); int dpm_get_source_pdo(const uint32_t **src_pdo, const int port) @@ -94,7 +93,7 @@ int dpm_get_source_pdo(const uint32_t **src_pdo, const int port) int pdo_cnt = 0; if (port == USB_PD_PORT_HOST) { - *src_pdo = pd_src_host_pdo; + *src_pdo = pd_src_host_pdo; pdo_cnt = ARRAY_SIZE(pd_src_host_pdo); /* * This override is only active via a console command. Only used @@ -105,7 +104,7 @@ int dpm_get_source_pdo(const uint32_t **src_pdo, const int port) if (src_host_pdo_cnt_override) pdo_cnt = src_host_pdo_cnt_override; } else { - *src_pdo = pd_src_display_pdo; + *src_pdo = pd_src_display_pdo; pdo_cnt = ARRAY_SIZE(pd_src_display_pdo); } @@ -118,15 +117,15 @@ int dpm_get_source_pdo(const uint32_t **src_pdo, const int port) * 1) If port == 0 and port data role is DFP, transition to pe_drs_send_swap * 2) If port == 1 and port data role is UFP, transition to pe_drs_send_swap */ -__override bool port_discovery_dr_swap_policy(int port, - enum pd_data_role dr, bool dr_swap_flag) +__override bool port_discovery_dr_swap_policy(int port, enum pd_data_role dr, + bool dr_swap_flag) { /* * Port0: test if role is DFP * Port1: test if role is UFP */ - enum pd_data_role role_test = - (port == USB_PD_PORT_HOST) ? PD_ROLE_DFP : PD_ROLE_UFP; + enum pd_data_role role_test = (port == USB_PD_PORT_HOST) ? PD_ROLE_DFP : + PD_ROLE_UFP; /* * Request data role swap if not in the port's desired data role and if @@ -135,8 +134,8 @@ __override bool port_discovery_dr_swap_policy(int port, * rejects data role swap requests (eg compliance tester), want to limit * how many DR swap requests are attempted. */ - if (dr == role_test && (pd_dr_swap_attempt_count[port]++ < - PD_DR_SWAP_ATTEMPT_MAX)) + if (dr == role_test && + (pd_dr_swap_attempt_count[port]++ < PD_DR_SWAP_ATTEMPT_MAX)) return true; /* Do not perform a DR swap */ @@ -148,8 +147,7 @@ __override bool port_discovery_dr_swap_policy(int port, * * 1) No need to Vconn swap. This board does not require any cable information. */ -__override bool port_discovery_vconn_swap_policy(int port, - bool vconn_swap_flag) +__override bool port_discovery_vconn_swap_policy(int port, bool vconn_swap_flag) { return false; } @@ -193,8 +191,7 @@ void pd_power_supply_reset(int port) * (fixed 5V SRC_CAP) so VBUS is ready to be applied at the next * attached.src condition. */ - pd_extract_pdo_power(pd_src_host_pdo[0], &ma, &mv, - &unused_mv); + pd_extract_pdo_power(pd_src_host_pdo[0], &ma, &mv, &unused_mv); mp4245_set_voltage_out(mv); /* Ensure voltage is back to 5V */ pd_transition_voltage(1); @@ -243,8 +240,7 @@ void pd_transition_voltage(int idx) * by the PDO requested by sink. Note that USB PD uses idx = 1 for 1st * PDO of SRC_CAP which must always be 5V fixed supply. */ - pd_extract_pdo_power(pd_src_host_pdo[idx - 1], &ma, &target_mv, - &mv); + pd_extract_pdo_power(pd_src_host_pdo[idx - 1], &ma, &target_mv, &mv); /* Initialize sample delay buffer */ for (i = 0; i < MP4245_VOLTAGE_WINDOW; i++) @@ -327,11 +323,9 @@ int board_vbus_source_enabled(int port) void pd_set_input_current_limit(int port, uint32_t max_ma, uint32_t supply_voltage) { - } -int pd_check_data_swap(int port, - enum pd_data_role data_role) +int pd_check_data_swap(int port, enum pd_data_role data_role) { int swap = 0; @@ -345,7 +339,6 @@ int pd_check_data_swap(int port, int pd_check_power_swap(int port) { - if (pd_get_power_role(port) == PD_ROLE_SINK) return 1; @@ -394,7 +387,7 @@ static void usb_tc_disconnect(void) DECLARE_HOOK(HOOK_USB_PD_DISCONNECT, usb_tc_disconnect, HOOK_PRIO_DEFAULT); __override bool pd_can_charge_from_device(int port, const int pdo_cnt, - const uint32_t *pdos) + const uint32_t *pdos) { /* * This function is called to determine if this port can be charged by @@ -421,22 +414,17 @@ const uint32_t vdo_idh = VDO_IDH(0, /* data caps as USB host */ USB_VID_GOOGLE); static const uint32_t vdo_idh_rev30 = VDO_IDH_REV30( - 0, /* Data caps as USB host */ - 1, /* Data caps as USB device */ - IDH_PTYPE_HUB, - 1, /* Supports alt modes */ - IDH_PTYPE_DFP_UNDEFINED, - USB_TYPEC_RECEPTACLE, - USB_VID_GOOGLE); + 0, /* Data caps as USB host */ + 1, /* Data caps as USB device */ + IDH_PTYPE_HUB, 1, /* Supports alt modes */ + IDH_PTYPE_DFP_UNDEFINED, USB_TYPEC_RECEPTACLE, USB_VID_GOOGLE); const uint32_t vdo_product = VDO_PRODUCT(CONFIG_USB_PID, CONFIG_USB_BCD_DEV); -static const uint32_t vdo_ufp1 = VDO_UFP1( - (VDO_UFP1_CAPABILITY_USB20 - | VDO_UFP1_CAPABILITY_USB32), - USB_TYPEC_RECEPTACLE, - VDO_UFP1_ALT_MODE_RECONFIGURE, - USB_R30_SS_U32_U40_GEN2); +static const uint32_t vdo_ufp1 = + VDO_UFP1((VDO_UFP1_CAPABILITY_USB20 | VDO_UFP1_CAPABILITY_USB32), + USB_TYPEC_RECEPTACLE, VDO_UFP1_ALT_MODE_RECONFIGURE, + USB_R30_SS_U32_U40_GEN2); static int svdm_response_identity(int port, uint32_t *payload) { @@ -479,14 +467,17 @@ static int svdm_response_svids(int port, uint32_t *payload) #define OPOS_DP 1 -const uint32_t vdo_dp_modes[1] = { +const uint32_t vdo_dp_modes[1] = { VDO_MODE_DP(/* Must support C and E. D is required for 2 lanes */ MODE_DP_PIN_C | MODE_DP_PIN_D | MODE_DP_PIN_E, - 0, /* DFP pin cfg supported */ - 0, /* usb2.0 signalling in AMode may be req */ - CABLE_RECEPTACLE, /* its a receptacle */ - MODE_DP_V13, /* DPv1.3 Support, no Gen2 */ - MODE_DP_SNK) /* Its a sink only */ + 0, /* DFP pin + cfg + supported + */ + 0, /* usb2.0 signalling in AMode may be req */ + CABLE_RECEPTACLE, /* its a receptacle */ + MODE_DP_V13, /* DPv1.3 Support, no Gen2 */ + MODE_DP_SNK) /* Its a sink only */ }; static int svdm_response_modes(int port, uint32_t *payload) @@ -508,13 +499,12 @@ static int amode_dp_status(int port, uint32_t *payload) if (opos != OPOS_DP) return 0; /* nak */ - payload[1] = VDO_DP_STATUS(0, /* IRQ_HPD */ - (hpd == 1), /* HPD_HI|LOW */ - 0, /* request exit DP */ - 0, /* request exit USB */ - mf, /* MF pref */ - vdm_is_dp_enabled(port), - 0, /* power low */ + payload[1] = VDO_DP_STATUS(0, /* IRQ_HPD */ + (hpd == 1), /* HPD_HI|LOW */ + 0, /* request exit DP */ + 0, /* request exit USB */ + mf, /* MF pref */ + vdm_is_dp_enabled(port), 0, /* power low */ 0x2); return 2; } @@ -536,8 +526,8 @@ static void svdm_configure_demux(int port, int enable, int mf) * stored in bit 0 of CBI fw_config. */ baseboard_set_mst_lane_control(mf); - CPRINTS("DP[%d]: DFP-D selected pin config %s", - port, mf ? "D" : "C"); + CPRINTS("DP[%d]: DFP-D selected pin config %s", port, + mf ? "D" : "C"); } else { demux &= ~USB_PD_MUX_DP_ENABLED; demux |= USB_PD_MUX_USB_ENABLED; @@ -573,7 +563,6 @@ static int svdm_enter_mode(int port, uint32_t *payload) /* SID & mode request is valid */ if ((PD_VDO_VID(payload[0]) == USB_SID_DISPLAYPORT) && (PD_VDO_OPOS(payload[0]) == OPOS_DP)) { - /* Store valid object position to indicate mode is active */ pd_ufp_set_dp_opos(port, OPOS_DP); @@ -623,8 +612,7 @@ const struct svdm_response svdm_rsp = { .exit_mode = &svdm_exit_mode, }; -int pd_custom_vdm(int port, int cnt, uint32_t *payload, - uint32_t **rpayload) +int pd_custom_vdm(int port, int cnt, uint32_t *payload, uint32_t **rpayload) { /* We don't support, so ignore this message */ return 0; diff --git a/baseboard/honeybuns/usbc_support.c b/baseboard/honeybuns/usbc_support.c index c03e94f076..db68ad527c 100644 --- a/baseboard/honeybuns/usbc_support.c +++ b/baseboard/honeybuns/usbc_support.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -23,8 +23,8 @@ #include "registers.h" #include "ucpd-stm32gx.h" -#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ## args) +#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ##args) enum usbc_states { UNATTACHED_SNK, @@ -39,7 +39,7 @@ static int usbc_vbus; static enum tcpc_cc_voltage_status cc1_v; static enum tcpc_cc_voltage_status cc2_v; -__maybe_unused static __const_data const char * const usbc_state_names[] = { +__maybe_unused static __const_data const char *const usbc_state_names[] = { [UNATTACHED_SNK] = "Unattached.SNK", [ATTACH_WAIT_SNK] = "AttachWait.SNK", [ATTACHED_SNK] = "Attached.SNK", @@ -48,17 +48,13 @@ __maybe_unused static __const_data const char * const usbc_state_names[] = { static int read_reg(uint8_t port, int reg, int *regval) { return i2c_read8(ppc_chips[port].i2c_port, - ppc_chips[port].i2c_addr_flags, - reg, - regval); + ppc_chips[port].i2c_addr_flags, reg, regval); } static int write_reg(uint8_t port, int reg, int regval) { return i2c_write8(ppc_chips[port].i2c_port, - ppc_chips[port].i2c_addr_flags, - reg, - regval); + ppc_chips[port].i2c_addr_flags, reg, regval); } static int baseboard_ppc_enable_sink_path(int port) @@ -126,9 +122,9 @@ static void baseboard_ucpd_apply_rd(int port) */ cfgr1_reg = STM32_UCPD_CFGR1_PSC_CLK_VAL(UCPD_PSC_DIV - 1) | - STM32_UCPD_CFGR1_TRANSWIN_VAL(UCPD_TRANSWIN_CNT - 1) | - STM32_UCPD_CFGR1_IFRGAP_VAL(UCPD_IFRGAP_CNT - 1) | - STM32_UCPD_CFGR1_HBITCLKD_VAL(UCPD_HBIT_DIV - 1); + STM32_UCPD_CFGR1_TRANSWIN_VAL(UCPD_TRANSWIN_CNT - 1) | + STM32_UCPD_CFGR1_IFRGAP_VAL(UCPD_IFRGAP_CNT - 1) | + STM32_UCPD_CFGR1_HBITCLKD_VAL(UCPD_HBIT_DIV - 1); STM32_UCPD_CFGR1(port) = cfgr1_reg; /* Enable ucpd */ @@ -147,9 +143,8 @@ static void baseboard_ucpd_apply_rd(int port) STM32_PWR_CR3 |= STM32_PWR_CR3_UCPD1_DBDIS; } - static void baseboard_ucpd_get_cc(int port, enum tcpc_cc_voltage_status *cc1, - enum tcpc_cc_voltage_status *cc2) + enum tcpc_cc_voltage_status *cc2) { int vstate_cc1; int vstate_cc2; @@ -163,7 +158,7 @@ static void baseboard_ucpd_get_cc(int port, enum tcpc_cc_voltage_status *cc1, * * vstate_cc maps directly to cc_state from tcpci spec when ANAMODE = 1, * but needs to be modified slightly for case ANAMODE = 0. - * + * * If presenting Rp (source), then need to to a circular shift of * vstate_ccx value: * vstate_cc | cc_state @@ -178,9 +173,9 @@ static void baseboard_ucpd_get_cc(int port, enum tcpc_cc_voltage_status *cc1, /* Get Rp or Rd active */ anamode = !!(STM32_UCPD_CR(port) & STM32_UCPD_CR_ANAMODE); vstate_cc1 = (sr & STM32_UCPD_SR_VSTATE_CC1_MASK) >> - STM32_UCPD_SR_VSTATE_CC1_SHIFT; + STM32_UCPD_SR_VSTATE_CC1_SHIFT; vstate_cc2 = (sr & STM32_UCPD_SR_VSTATE_CC2_MASK) >> - STM32_UCPD_SR_VSTATE_CC2_SHIFT; + STM32_UCPD_SR_VSTATE_CC2_SHIFT; /* Do circular shift if port == source */ if (anamode) { @@ -325,10 +320,8 @@ int c1_ps8805_is_sourcing_vbus(int port) return level; } - int c1_ps8805_vbus_source_enable(int port, int enable) { - return ps8805_gpio_set_level(port, PS8805_GPIO_1, enable); } @@ -358,12 +351,13 @@ static void baseboard_usb3_manage_vbus(void) ppc_ocp_count = 0; #ifdef GPIO_USB_HUB_OCP_NOTIFY - /* - * In the case of an OCP event on this port, the usb hub should be - * notified via a GPIO signal. Following, an OCP, the attached.src state - * for the usb3 only port is checked again. If it's attached, then make - * sure the OCP notify signal is reset. - */ + /* + * In the case of an OCP event on this port, the usb hub should + * be notified via a GPIO signal. Following, an OCP, the + * attached.src state for the usb3 only port is checked again. + * If it's attached, then make sure the OCP notify signal is + * reset. + */ gpio_set_level(GPIO_USB_HUB_OCP_NOTIFY, 1); #endif } @@ -436,8 +430,9 @@ static void baseboard_usbc_usb3_handle_interrupt(void) CPRINTS("usb3_ppc: VBUS OC!"); gpio_set_level(GPIO_USB_HUB_OCP_NOTIFY, 0); if (++ppc_ocp_count < 5) - hook_call_deferred(&baseboard_usb3_manage_vbus_data, - USB_HUB_OCP_RESET_MSEC); + hook_call_deferred( + &baseboard_usb3_manage_vbus_data, + USB_HUB_OCP_RESET_MSEC); else CPRINTS("usb3_ppc: VBUS OC limit reached!"); } @@ -466,7 +461,6 @@ static void baseboard_usbc_usb3_handle_interrupt(void) /* Clear the interrupt sources. */ write_reg(port, SN5S330_INT_TRIP_RISE_REG2, rise); write_reg(port, SN5S330_INT_TRIP_FALL_REG2, fall); - } } DECLARE_DEFERRED(baseboard_usbc_usb3_handle_interrupt); |