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Diffstat (limited to 'baseboard/intelrvp/npcx_ec.h')
-rw-r--r--baseboard/intelrvp/npcx_ec.h18
1 files changed, 9 insertions, 9 deletions
diff --git a/baseboard/intelrvp/npcx_ec.h b/baseboard/intelrvp/npcx_ec.h
index 52bcb2dae6..5fe6aa9786 100644
--- a/baseboard/intelrvp/npcx_ec.h
+++ b/baseboard/intelrvp/npcx_ec.h
@@ -1,4 +1,4 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -19,20 +19,20 @@ enum mft_channel {
#endif /* __ASSEMBLER__ */
/* ADC channels */
-#define ADC_MAX_MVOLT ADC_MAX_VOLT
-#define ADC_TEMP_SNS_AMBIENT_CHANNEL NPCX_ADC_CH3
-#define ADC_TEMP_SNS_DDR_CHANNEL NPCX_ADC_CH4
-#define ADC_TEMP_SNS_SKIN_CHANNEL NPCX_ADC_CH2
-#define ADC_TEMP_SNS_VR_CHANNEL NPCX_ADC_CH1
+#define ADC_MAX_MVOLT ADC_MAX_VOLT
+#define ADC_TEMP_SNS_AMBIENT_CHANNEL NPCX_ADC_CH3
+#define ADC_TEMP_SNS_DDR_CHANNEL NPCX_ADC_CH4
+#define ADC_TEMP_SNS_SKIN_CHANNEL NPCX_ADC_CH2
+#define ADC_TEMP_SNS_VR_CHANNEL NPCX_ADC_CH1
/* KSO2 is inverted */
-#define GPIO_KBD_KSO2 GPIO_EC_KSO_02_INV
+#define GPIO_KBD_KSO2 GPIO_EC_KSO_02_INV
/* Fan */
#define CONFIG_PWM
-#define PWN_FAN_CHANNEL 3
+#define PWN_FAN_CHANNEL 3
/* GPIO64/65 are used as UART pins. */
-#define NPCX_UART_MODULE2 1
+#define NPCX_UART_MODULE2 1
#endif /* __CROS_EC_NPCX_EC_H */