diff options
Diffstat (limited to 'baseboard/kalista/baseboard.h')
| -rw-r--r-- | baseboard/kalista/baseboard.h | 74 |
1 files changed, 35 insertions, 39 deletions
diff --git a/baseboard/kalista/baseboard.h b/baseboard/kalista/baseboard.h index 717d26b313..e3696ae48d 100644 --- a/baseboard/kalista/baseboard.h +++ b/baseboard/kalista/baseboard.h @@ -1,4 +1,4 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. +/* Copyright 2018 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -12,7 +12,7 @@ * Allow dangerous commands. * TODO: Remove this config before production. */ -#undef CONFIG_SYSTEM_UNLOCKED +#undef CONFIG_SYSTEM_UNLOCKED #define CONFIG_USB_PD_COMM_LOCKED /* EC */ @@ -32,7 +32,7 @@ #define CONFIG_FPU #define CONFIG_I2C #define CONFIG_I2C_CONTROLLER -#undef CONFIG_LID_SWITCH +#undef CONFIG_LID_SWITCH #define CONFIG_POWER_BUTTON_IGNORE_LID #define CONFIG_PWM #define CONFIG_LTO @@ -47,7 +47,7 @@ #define WIRELESS_GPIO_WLAN_POWER GPIO_PP3300_DX_WLAN #define WIRELESS_GPIO_WWAN GPIO_PP3300_DX_LTE #define CEC_GPIO_OUT GPIO_CEC_OUT -#define CEC_GPIO_IN GPIO_CEC_IN +#define CEC_GPIO_IN GPIO_CEC_IN #define CEC_GPIO_PULL_UP GPIO_CEC_PULL_UP #define CONFIG_FANS 1 #define CONFIG_FAN_RPM_CUSTOM @@ -64,13 +64,13 @@ #define CONFIG_CHIPSET_HAS_PRE_INIT_CALLBACK #define CONFIG_CHIPSET_RESET_HOOK #define CONFIG_HOST_INTERFACE_ESPI -#define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 -#define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 +#define CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S3 +#define CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S4 #define GPIO_PG_EC_RSMRST_ODL GPIO_RSMRST_L_PGOOD #define CONFIG_HOSTCMD_PD_CONTROL #define CONFIG_EXTPOWER_GPIO -#undef CONFIG_EXTPOWER_DEBOUNCE_MS +#undef CONFIG_EXTPOWER_DEBOUNCE_MS #define CONFIG_EXTPOWER_DEBOUNCE_MS 1000 #define CONFIG_POWER_BUTTON #define CONFIG_POWER_BUTTON_X86 @@ -105,20 +105,20 @@ #define USB_PORT_COUNT 4 /* Optional feature to configure npcx chip */ -#define NPCX_UART_MODULE2 1 /* 1:GPIO64/65 as UART */ -#define NPCX_JTAG_MODULE2 0 /* 0:GPIO21/17/16/20 as JTAG */ -#define NPCX_TACH_SEL2 1 /* 0:GPIO40/73 1:GPIO93/A6 as TACH */ +#define NPCX_UART_MODULE2 1 /* 1:GPIO64/65 as UART */ +#define NPCX_JTAG_MODULE2 0 /* 0:GPIO21/17/16/20 as JTAG */ +#define NPCX_TACH_SEL2 1 /* 0:GPIO40/73 1:GPIO93/A6 as TACH */ /* I2C ports */ -#define I2C_PORT_TCPC0 NPCX_I2C_PORT0_0 -#define I2C_PORT_EEPROM NPCX_I2C_PORT0_1 -#define I2C_PORT_BACKLIGHT NPCX_I2C_PORT1 -#define I2C_PORT_PMIC NPCX_I2C_PORT2 -#define I2C_PORT_THERMAL NPCX_I2C_PORT3 +#define I2C_PORT_TCPC0 NPCX_I2C_PORT0_0 +#define I2C_PORT_EEPROM NPCX_I2C_PORT0_1 +#define I2C_PORT_BACKLIGHT NPCX_I2C_PORT1 +#define I2C_PORT_PMIC NPCX_I2C_PORT2 +#define I2C_PORT_THERMAL NPCX_I2C_PORT3 /* I2C addresses */ -#define I2C_ADDR_TCPC0_FLAGS 0x0b -#define I2C_ADDR_EEPROM_FLAGS 0x50 +#define I2C_ADDR_TCPC0_FLAGS 0x0b +#define I2C_ADDR_EEPROM_FLAGS 0x50 /* Verify and jump to RW image on boot */ #define CONFIG_VBOOT_EFS @@ -140,23 +140,22 @@ * end of RW_A and RW_B, respectively. */ #define CONFIG_RW_B -#define CONFIG_RW_B_MEM_OFF CONFIG_RO_MEM_OFF -#undef CONFIG_RO_SIZE -#define CONFIG_RO_SIZE (CONFIG_FLASH_SIZE_BYTES / 4) -#undef CONFIG_RW_SIZE -#define CONFIG_RW_SIZE CONFIG_RO_SIZE -#define CONFIG_RW_A_STORAGE_OFF CONFIG_RW_STORAGE_OFF -#define CONFIG_RW_B_STORAGE_OFF (CONFIG_RW_A_STORAGE_OFF + \ - CONFIG_RW_SIZE) -#define CONFIG_RW_A_SIGN_STORAGE_OFF (CONFIG_RW_A_STORAGE_OFF + \ - CONFIG_RW_SIZE - CONFIG_RW_SIG_SIZE) -#define CONFIG_RW_B_SIGN_STORAGE_OFF (CONFIG_RW_B_STORAGE_OFF + \ - CONFIG_RW_SIZE - CONFIG_RW_SIG_SIZE) +#define CONFIG_RW_B_MEM_OFF CONFIG_RO_MEM_OFF +#undef CONFIG_RO_SIZE +#define CONFIG_RO_SIZE (CONFIG_FLASH_SIZE_BYTES / 4) +#undef CONFIG_RW_SIZE +#define CONFIG_RW_SIZE CONFIG_RO_SIZE +#define CONFIG_RW_A_STORAGE_OFF CONFIG_RW_STORAGE_OFF +#define CONFIG_RW_B_STORAGE_OFF (CONFIG_RW_A_STORAGE_OFF + CONFIG_RW_SIZE) +#define CONFIG_RW_A_SIGN_STORAGE_OFF \ + (CONFIG_RW_A_STORAGE_OFF + CONFIG_RW_SIZE - CONFIG_RW_SIG_SIZE) +#define CONFIG_RW_B_SIGN_STORAGE_OFF \ + (CONFIG_RW_B_STORAGE_OFF + CONFIG_RW_SIZE - CONFIG_RW_SIG_SIZE) #undef CONFIG_EC_PROTECTED_STORAGE_SIZE -#define CONFIG_EC_PROTECTED_STORAGE_SIZE CONFIG_RO_SIZE +#define CONFIG_EC_PROTECTED_STORAGE_SIZE CONFIG_RO_SIZE #undef CONFIG_EC_WRITABLE_STORAGE_SIZE -#define CONFIG_EC_WRITABLE_STORAGE_SIZE CONFIG_RW_SIZE +#define CONFIG_EC_WRITABLE_STORAGE_SIZE CONFIG_RW_SIZE #define CONFIG_RWSIG #define CONFIG_RWSIG_TYPE_RWSIG @@ -182,15 +181,12 @@ enum charge_port { }; enum temp_sensor_id { - TEMP_SENSOR_CHARGER, /* BD99992GW SYSTHERM1 */ - TEMP_SENSOR_DRAM, /* BD99992GW SYSTHERM2 */ + TEMP_SENSOR_CHARGER, /* BD99992GW SYSTHERM1 */ + TEMP_SENSOR_DRAM, /* BD99992GW SYSTHERM2 */ TEMP_SENSOR_COUNT }; -enum adc_channel { - ADC_VBUS, - ADC_CH_COUNT -}; +enum adc_channel { ADC_VBUS, ADC_CH_COUNT }; enum pwm_channel { PWM_CH_LED_RED, @@ -223,8 +219,8 @@ enum OEM_ID { * delay to turn on the power supply max is ~16ms. * delay to turn off the power supply max is about ~180ms. */ -#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ -#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */ +#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ +#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */ /* delay to turn on/off vconn */ |