diff options
Diffstat (limited to 'baseboard/zork')
| -rw-r--r-- | baseboard/zork/baseboard.c | 51 | ||||
| -rw-r--r-- | baseboard/zork/baseboard.h | 120 | ||||
| -rw-r--r-- | baseboard/zork/build.mk | 2 | ||||
| -rw-r--r-- | baseboard/zork/cbi_ec_fw_config.c | 39 | ||||
| -rw-r--r-- | baseboard/zork/cbi_ec_fw_config.h | 76 | ||||
| -rw-r--r-- | baseboard/zork/cbi_ssfc.c | 7 | ||||
| -rw-r--r-- | baseboard/zork/cbi_ssfc.h | 2 | ||||
| -rw-r--r-- | baseboard/zork/usb_pd_policy.c | 6 | ||||
| -rw-r--r-- | baseboard/zork/variant_dalboz.c | 4 | ||||
| -rw-r--r-- | baseboard/zork/variant_trembyle.c | 102 |
10 files changed, 187 insertions, 222 deletions
diff --git a/baseboard/zork/baseboard.c b/baseboard/zork/baseboard.c index 0b48d1075b..593bcf1168 100644 --- a/baseboard/zork/baseboard.c +++ b/baseboard/zork/baseboard.c @@ -1,4 +1,4 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. +/* Copyright 2019 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -31,6 +31,7 @@ #include "motion_sense.h" #include "power.h" #include "power_button.h" +#include "printf.h" #include "pwm.h" #include "pwm_chip.h" #include "registers.h" @@ -59,15 +60,15 @@ const enum gpio_signal hibernate_wake_pins[] = { GPIO_POWER_BUTTON_L, GPIO_EC_RST_ODL, }; -const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); +const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); /* * In the AOZ1380 PPC, there are no programmable features. We use * the attached NCT3807 to control a GPIO to indicate 1A5 or 3A0 * current limits. */ -__overridable int board_aoz1380_set_vbus_source_current_limit(int port, - enum tcpc_rp_value rp) +__overridable int +board_aoz1380_set_vbus_source_current_limit(int port, enum tcpc_rp_value rp) { int rv; @@ -96,11 +97,10 @@ static void baseboard_chipset_resume(void) DECLARE_HOOK(HOOK_CHIPSET_RESUME, baseboard_chipset_resume, HOOK_PRIO_DEFAULT); __overridable void board_set_charge_limit(int port, int supplier, int charge_ma, - int max_ma, int charge_mv) + int max_ma, int charge_mv) { - charge_set_input_current_limit(MAX(charge_ma, - CONFIG_CHARGER_INPUT_CURRENT), - charge_mv); + charge_set_input_current_limit( + MAX(charge_ma, CONFIG_CHARGER_INPUT_CURRENT), charge_mv); } /* Keyboard scan setting */ @@ -134,19 +134,19 @@ __override struct keyboard_scan_config keyscan_config = { * Murata page for part NCP15WB473F03RC. Vdd=3.3V, R=30.9Kohm. */ const struct thermistor_data_pair thermistor_data[] = { - { 2761 / THERMISTOR_SCALING_FACTOR, 0}, - { 2492 / THERMISTOR_SCALING_FACTOR, 10}, - { 2167 / THERMISTOR_SCALING_FACTOR, 20}, - { 1812 / THERMISTOR_SCALING_FACTOR, 30}, - { 1462 / THERMISTOR_SCALING_FACTOR, 40}, - { 1146 / THERMISTOR_SCALING_FACTOR, 50}, - { 878 / THERMISTOR_SCALING_FACTOR, 60}, - { 665 / THERMISTOR_SCALING_FACTOR, 70}, - { 500 / THERMISTOR_SCALING_FACTOR, 80}, - { 434 / THERMISTOR_SCALING_FACTOR, 85}, - { 376 / THERMISTOR_SCALING_FACTOR, 90}, - { 326 / THERMISTOR_SCALING_FACTOR, 95}, - { 283 / THERMISTOR_SCALING_FACTOR, 100} + { 2761 / THERMISTOR_SCALING_FACTOR, 0 }, + { 2492 / THERMISTOR_SCALING_FACTOR, 10 }, + { 2167 / THERMISTOR_SCALING_FACTOR, 20 }, + { 1812 / THERMISTOR_SCALING_FACTOR, 30 }, + { 1462 / THERMISTOR_SCALING_FACTOR, 40 }, + { 1146 / THERMISTOR_SCALING_FACTOR, 50 }, + { 878 / THERMISTOR_SCALING_FACTOR, 60 }, + { 665 / THERMISTOR_SCALING_FACTOR, 70 }, + { 500 / THERMISTOR_SCALING_FACTOR, 80 }, + { 434 / THERMISTOR_SCALING_FACTOR, 85 }, + { 376 / THERMISTOR_SCALING_FACTOR, 90 }, + { 326 / THERMISTOR_SCALING_FACTOR, 95 }, + { 283 / THERMISTOR_SCALING_FACTOR, 100 } }; const struct thermistor_info thermistor_info = { @@ -263,8 +263,10 @@ void board_print_temps(void) { int t, i; int rv; + char ts_str[PRINTF_TIMESTAMP_BUF_SIZE]; - cprintf(CC_THERMAL, "[%pT ", PRINTF_TIMESTAMP_NOW); + snprintf_timestamp_now(ts_str, sizeof(ts_str)); + cprintf(CC_THERMAL, "[%s ", ts_str); for (i = 0; i < TEMP_SENSOR_COUNT; ++i) { rv = temp_sensor_read(i, &t); if (rv == EC_SUCCESS) @@ -278,7 +280,7 @@ void board_print_temps(void) temps_interval * SECOND); } -static int command_temps_log(int argc, char **argv) +static int command_temps_log(int argc, const char **argv) { char *e = NULL; @@ -293,8 +295,7 @@ static int command_temps_log(int argc, char **argv) return EC_SUCCESS; } -DECLARE_CONSOLE_COMMAND(tempslog, command_temps_log, - "seconds", +DECLARE_CONSOLE_COMMAND(tempslog, command_temps_log, "seconds", "Print temp sensors periodically"); /* diff --git a/baseboard/zork/baseboard.h b/baseboard/zork/baseboard.h index e97bcb4e45..2289c1891b 100644 --- a/baseboard/zork/baseboard.h +++ b/baseboard/zork/baseboard.h @@ -1,4 +1,4 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. +/* Copyright 2019 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,22 +8,21 @@ #ifndef __CROS_EC_BASEBOARD_H #define __CROS_EC_BASEBOARD_H -#if (defined(VARIANT_ZORK_TREMBYLE) \ - + defined(VARIANT_ZORK_DALBOZ)) != 1 +#if (defined(VARIANT_ZORK_TREMBYLE) + defined(VARIANT_ZORK_DALBOZ)) != 1 #error Must choose VARIANT_ZORK_TREMBYLE or VARIANT_ZORK_DALBOZ #endif /* NPCX7 config */ -#define NPCX_UART_MODULE2 1 /* GPIO64/65 are used as UART pins. */ -#define NPCX_TACH_SEL2 0 /* No tach. */ -#define NPCX7_PWM1_SEL 0 /* GPIO C2 is not used as PWM1. */ +#define NPCX_UART_MODULE2 1 /* GPIO64/65 are used as UART pins. */ +#define NPCX_TACH_SEL2 0 /* No tach. */ +#define NPCX7_PWM1_SEL 0 /* GPIO C2 is not used as PWM1. */ /* Internal SPI flash on NPCX7 */ #define CONFIG_FLASH_SIZE_BYTES (512 * 1024) #define CONFIG_SPI_FLASH_REGS #define CONFIG_SPI_FLASH_W25Q40 /* Internal SPI flash type. */ -#define CC_DEFAULT (CC_ALL & ~(CC_MASK(CC_HOSTCMD) | CC_MASK(CC_LPC))) +#define CC_DEFAULT (CC_ALL & ~(CC_MASK(CC_HOSTCMD) | CC_MASK(CC_LPC))) /* * Enable 1 slot of secure temporary storage to support @@ -92,7 +91,7 @@ #define CONFIG_CHIPSET_CAN_THROTTLE #define CONFIG_CHIPSET_RESET_HOOK -#undef CONFIG_EXTPOWER_DEBOUNCE_MS +#undef CONFIG_EXTPOWER_DEBOUNCE_MS #define CONFIG_EXTPOWER_DEBOUNCE_MS 200 #define CONFIG_EXTPOWER_GPIO #define CONFIG_POWER_COMMON @@ -102,9 +101,9 @@ #define CONFIG_THROTTLE_AP #ifdef VARIANT_ZORK_TREMBYLE - #define CONFIG_FANS FAN_CH_COUNT - #undef CONFIG_FAN_INIT_SPEED - #define CONFIG_FAN_INIT_SPEED 50 +#define CONFIG_FANS FAN_CH_COUNT +#undef CONFIG_FAN_INIT_SPEED +#define CONFIG_FAN_INIT_SPEED 50 #endif #define CONFIG_LED_COMMON @@ -122,10 +121,9 @@ #define CONFIG_IO_EXPANDER #define CONFIG_IO_EXPANDER_NCT38XX - #define CONFIG_KEYBOARD_COL2_INVERTED #define CONFIG_KEYBOARD_PROTOCOL_8042 -#undef CONFIG_KEYBOARD_VIVALDI +#undef CONFIG_KEYBOARD_VIVALDI /* * USB ID @@ -141,14 +139,14 @@ #define CONFIG_USB_PD_TCPMV2 #ifndef CONFIG_USB_PD_TCPMV2 - #define CONFIG_USB_PD_TCPMV1 +#define CONFIG_USB_PD_TCPMV1 #else - #define CONFIG_USB_PD_DECODE_SOP - #define CONFIG_USB_DRP_ACC_TRYSRC +#define CONFIG_USB_PD_DECODE_SOP +#define CONFIG_USB_DRP_ACC_TRYSRC - /* Enable TCPMv2 Fast Role Swap */ - /* Turn off until FRSwap is working */ - #undef CONFIG_USB_PD_FRS_TCPC +/* Enable TCPMv2 Fast Role Swap */ +/* Turn off until FRSwap is working */ +#undef CONFIG_USB_PD_FRS_TCPC #endif #define CONFIG_HOSTCMD_PD_CONTROL @@ -165,7 +163,7 @@ * Use a custom HPD function that supports HPD on IO expander. * TODO(b/165622386) remove this when HPD is on EC GPIO. */ -# define CONFIG_USB_PD_DP_HPD_GPIO_CUSTOM +#define CONFIG_USB_PD_DP_HPD_GPIO_CUSTOM #endif #define CONFIG_USB_PD_DUAL_ROLE #define CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE @@ -187,19 +185,19 @@ #define CONFIG_USB_MUX_AMD_FP5 #if defined(VARIANT_ZORK_TREMBYLE) - #define CONFIG_USB_PD_PORT_MAX_COUNT 2 - #define CONFIG_USBC_PPC_NX20P3483 - #define CONFIG_USBC_RETIMER_PS8802 - #define CONFIG_USBC_RETIMER_PS8818 - #define CONFIG_IO_EXPANDER_PORT_COUNT USBC_PORT_COUNT - #define CONFIG_USB_MUX_RUNTIME_CONFIG - /* USB-A config */ - #define GPIO_USB1_ILIM_SEL IOEX_USB_A0_CHARGE_EN_L - #define GPIO_USB2_ILIM_SEL IOEX_USB_A1_CHARGE_EN_DB_L - /* PS8818 RX Input Termination - default value */ - #define ZORK_PS8818_RX_INPUT_TERM PS8818_RX_INPUT_TERM_112_OHM +#define CONFIG_USB_PD_PORT_MAX_COUNT 2 +#define CONFIG_USBC_PPC_NX20P3483 +#define CONFIG_USBC_RETIMER_PS8802 +#define CONFIG_USBC_RETIMER_PS8818 +#define CONFIG_IO_EXPANDER_PORT_COUNT USBC_PORT_COUNT +#define CONFIG_USB_MUX_RUNTIME_CONFIG +/* USB-A config */ +#define GPIO_USB1_ILIM_SEL IOEX_USB_A0_CHARGE_EN_L +#define GPIO_USB2_ILIM_SEL IOEX_USB_A1_CHARGE_EN_DB_L +/* PS8818 RX Input Termination - default value */ +#define ZORK_PS8818_RX_INPUT_TERM PS8818_RX_INPUT_TERM_112_OHM #elif defined(VARIANT_ZORK_DALBOZ) - #define CONFIG_IO_EXPANDER_PORT_COUNT IOEX_PORT_COUNT +#define CONFIG_IO_EXPANDER_PORT_COUNT IOEX_PORT_COUNT #endif /* USB-A config */ @@ -209,13 +207,13 @@ #define CONFIG_USB_PORT_POWER_SMART_DEFAULT_MODE USB_CHARGE_MODE_CDP #define CONFIG_USB_PORT_POWER_SMART_INVERTED -#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ -#define PD_POWER_SUPPLY_TURN_OFF_DELAY 30000 /* us */ +#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ +#define PD_POWER_SUPPLY_TURN_OFF_DELAY 30000 /* us */ -#define PD_OPERATING_POWER_MW 15000 -#define PD_MAX_POWER_MW 65000 -#define PD_MAX_CURRENT_MA 3250 -#define PD_MAX_VOLTAGE_MV 20000 +#define PD_OPERATING_POWER_MW 15000 +#define PD_MAX_POWER_MW 65000 +#define PD_MAX_CURRENT_MA 3250 +#define PD_MAX_VOLTAGE_MV 20000 /* Round up 3250 max current to multiple of 128mA for ISL9241 AC prochot. */ #define ZORK_AC_PROCHOT_CURRENT_MA 3328 @@ -225,7 +223,7 @@ * CONFIG_CHARGER_LIMIT_* is not set, so there is no additional restriction on * Depthcharge to boot OS. */ -#define CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON 50000 +#define CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON 50000 /* Increase length of history buffer for port80 messages. */ #undef CONFIG_PORT80_HISTORY_LEN @@ -235,30 +233,30 @@ #undef CONFIG_UART_TX_BUF_SIZE #define CONFIG_UART_TX_BUF_SIZE 4096 -#define I2C_PORT_TCPC0 NPCX_I2C_PORT0_0 -#define I2C_PORT_USBA0 NPCX_I2C_PORT0_0 -#define I2C_PORT_TCPC1 NPCX_I2C_PORT1_0 -#define I2C_PORT_USBA1 NPCX_I2C_PORT1_0 -#define I2C_PORT_USB_AP_MUX NPCX_I2C_PORT3_0 -#define I2C_PORT_THERMAL_AP NPCX_I2C_PORT4_1 -#define I2C_PORT_SENSOR NPCX_I2C_PORT5_0 -#define I2C_PORT_ACCEL I2C_PORT_SENSOR -#define I2C_PORT_EEPROM I2C_PORT_SENSOR -#define I2C_PORT_AP_AUDIO NPCX_I2C_PORT6_1 +#define I2C_PORT_TCPC0 NPCX_I2C_PORT0_0 +#define I2C_PORT_USBA0 NPCX_I2C_PORT0_0 +#define I2C_PORT_TCPC1 NPCX_I2C_PORT1_0 +#define I2C_PORT_USBA1 NPCX_I2C_PORT1_0 +#define I2C_PORT_USB_AP_MUX NPCX_I2C_PORT3_0 +#define I2C_PORT_THERMAL_AP NPCX_I2C_PORT4_1 +#define I2C_PORT_SENSOR NPCX_I2C_PORT5_0 +#define I2C_PORT_ACCEL I2C_PORT_SENSOR +#define I2C_PORT_EEPROM I2C_PORT_SENSOR +#define I2C_PORT_AP_AUDIO NPCX_I2C_PORT6_1 #if defined(VARIANT_ZORK_TREMBYLE) - #define CONFIG_CHARGER_RUNTIME_CONFIG - #define I2C_PORT_BATTERY NPCX_I2C_PORT2_0 - #define I2C_PORT_CHARGER_V0 NPCX_I2C_PORT2_0 - #define I2C_PORT_CHARGER_V1 NPCX_I2C_PORT4_1 - #define I2C_PORT_AP_HDMI NPCX_I2C_PORT7_0 +#define CONFIG_CHARGER_RUNTIME_CONFIG +#define I2C_PORT_BATTERY NPCX_I2C_PORT2_0 +#define I2C_PORT_CHARGER_V0 NPCX_I2C_PORT2_0 +#define I2C_PORT_CHARGER_V1 NPCX_I2C_PORT4_1 +#define I2C_PORT_AP_HDMI NPCX_I2C_PORT7_0 #elif defined(VARIANT_ZORK_DALBOZ) - #define I2C_PORT_BATTERY_V0 NPCX_I2C_PORT2_0 - #define I2C_PORT_BATTERY_V1 NPCX_I2C_PORT7_0 - #define I2C_PORT_CHARGER NPCX_I2C_PORT2_0 +#define I2C_PORT_BATTERY_V0 NPCX_I2C_PORT2_0 +#define I2C_PORT_BATTERY_V1 NPCX_I2C_PORT7_0 +#define I2C_PORT_CHARGER NPCX_I2C_PORT2_0 #endif -#define I2C_ADDR_EEPROM_FLAGS 0x50 +#define I2C_ADDR_EEPROM_FLAGS 0x50 #define CONFIG_MKBP_EVENT /* Host event is required to wake from sleep */ @@ -310,11 +308,7 @@ enum fan_channel { }; #ifdef VARIANT_ZORK_TREMBYLE -enum usbc_port { - USBC_PORT_C0 = 0, - USBC_PORT_C1, - USBC_PORT_COUNT -}; +enum usbc_port { USBC_PORT_C0 = 0, USBC_PORT_C1, USBC_PORT_COUNT }; #endif enum sensor_id { diff --git a/baseboard/zork/build.mk b/baseboard/zork/build.mk index e79d60cc91..6cf67a1a39 100644 --- a/baseboard/zork/build.mk +++ b/baseboard/zork/build.mk @@ -1,5 +1,5 @@ # -*- makefile -*- -# Copyright 2019 The Chromium OS Authors. All rights reserved. +# Copyright 2019 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. # diff --git a/baseboard/zork/cbi_ec_fw_config.c b/baseboard/zork/cbi_ec_fw_config.c index 50a29d3634..4482a5cf40 100644 --- a/baseboard/zork/cbi_ec_fw_config.c +++ b/baseboard/zork/cbi_ec_fw_config.c @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -28,8 +28,7 @@ uint32_t get_cbi_fw_config(void) */ enum ec_cfg_usb_db_type ec_config_get_usb_db(void) { - return ((get_cbi_fw_config() & EC_CFG_USB_DB_MASK) - >> EC_CFG_USB_DB_L); + return ((get_cbi_fw_config() & EC_CFG_USB_DB_MASK) >> EC_CFG_USB_DB_L); } /* @@ -37,8 +36,7 @@ enum ec_cfg_usb_db_type ec_config_get_usb_db(void) */ enum ec_cfg_usb_mb_type ec_config_get_usb_mb(void) { - return ((get_cbi_fw_config() & EC_CFG_USB_MB_MASK) - >> EC_CFG_USB_MB_L); + return ((get_cbi_fw_config() & EC_CFG_USB_MB_MASK) >> EC_CFG_USB_MB_L); } /* @@ -46,8 +44,8 @@ enum ec_cfg_usb_mb_type ec_config_get_usb_mb(void) */ enum ec_cfg_lid_accel_sensor_type ec_config_has_lid_accel_sensor(void) { - return ((get_cbi_fw_config() & EC_CFG_LID_ACCEL_SENSOR_MASK) - >> EC_CFG_LID_ACCEL_SENSOR_L); + return ((get_cbi_fw_config() & EC_CFG_LID_ACCEL_SENSOR_MASK) >> + EC_CFG_LID_ACCEL_SENSOR_L); } /* @@ -55,28 +53,27 @@ enum ec_cfg_lid_accel_sensor_type ec_config_has_lid_accel_sensor(void) */ enum ec_ssfc_base_gyro_sensor ec_config_has_base_gyro_sensor(void) { - return ((get_cbi_fw_config() & EC_CFG_BASE_GYRO_SENSOR_MASK) - >> EC_CFG_BASE_GYRO_SENSOR_L); + return ((get_cbi_fw_config() & EC_CFG_BASE_GYRO_SENSOR_MASK) >> + EC_CFG_BASE_GYRO_SENSOR_L); } /* * ec_config_has_pwm_keyboard_backlight() will return 1 is present or 0 */ -enum ec_cfg_pwm_keyboard_backlight_type ec_config_has_pwm_keyboard_backlight( - void) +enum ec_cfg_pwm_keyboard_backlight_type +ec_config_has_pwm_keyboard_backlight(void) { - return ((get_cbi_fw_config() & EC_CFG_PWM_KEYBOARD_BACKLIGHT_MASK) - >> EC_CFG_PWM_KEYBOARD_BACKLIGHT_L); + return ((get_cbi_fw_config() & EC_CFG_PWM_KEYBOARD_BACKLIGHT_MASK) >> + EC_CFG_PWM_KEYBOARD_BACKLIGHT_L); } /* * ec_config_has_lid_angle_tablet_mode() will return 1 is present or 0 */ -enum ec_cfg_lid_angle_tablet_mode_type ec_config_has_lid_angle_tablet_mode( - void) +enum ec_cfg_lid_angle_tablet_mode_type ec_config_has_lid_angle_tablet_mode(void) { - return ((get_cbi_fw_config() & EC_CFG_LID_ANGLE_TABLET_MODE_MASK) - >> EC_CFG_LID_ANGLE_TABLET_MODE_L); + return ((get_cbi_fw_config() & EC_CFG_LID_ANGLE_TABLET_MODE_MASK) >> + EC_CFG_LID_ANGLE_TABLET_MODE_L); } /* @@ -84,8 +81,8 @@ enum ec_cfg_lid_angle_tablet_mode_type ec_config_has_lid_angle_tablet_mode( */ enum ec_cfg_lte_present_type ec_config_lte_present(void) { - return ((get_cbi_fw_config() & EC_CFG_LTE_PRESENT_MASK) - >> EC_CFG_LTE_PRESENT_L); + return ((get_cbi_fw_config() & EC_CFG_LTE_PRESENT_MASK) >> + EC_CFG_LTE_PRESENT_L); } /* @@ -93,6 +90,6 @@ enum ec_cfg_lte_present_type ec_config_lte_present(void) */ enum ec_cfg_keyboard_layout_type ec_config_keyboard_layout(void) { - return ((get_cbi_fw_config() & EC_CFG_KEYBOARD_LAYOUT_MASK) - >> EC_CFG_KEYBOARD_LAYOUT_L); + return ((get_cbi_fw_config() & EC_CFG_KEYBOARD_LAYOUT_MASK) >> + EC_CFG_KEYBOARD_LAYOUT_L); } diff --git a/baseboard/zork/cbi_ec_fw_config.h b/baseboard/zork/cbi_ec_fw_config.h index c3ed5b654c..a73e4504bb 100644 --- a/baseboard/zork/cbi_ec_fw_config.h +++ b/baseboard/zork/cbi_ec_fw_config.h @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -19,11 +19,9 @@ * get_cbi_ec_cfg_usb_db() will return the DB option number. * The option number will be defined in a variant or board level enumeration */ -#define EC_CFG_USB_DB_L 0 -#define EC_CFG_USB_DB_H 3 -#define EC_CFG_USB_DB_MASK \ - GENMASK(EC_CFG_USB_DB_H,\ - EC_CFG_USB_DB_L) +#define EC_CFG_USB_DB_L 0 +#define EC_CFG_USB_DB_H 3 +#define EC_CFG_USB_DB_MASK GENMASK(EC_CFG_USB_DB_H, EC_CFG_USB_DB_L) /* * USB Main Board (4 bits) @@ -31,11 +29,9 @@ * get_cbi_ec_cfg_usb_mb() will return the MB option number. * The option number will be defined in a variant or board level enumeration */ -#define EC_CFG_USB_MB_L 4 -#define EC_CFG_USB_MB_H 7 -#define EC_CFG_USB_MB_MASK \ - GENMASK(EC_CFG_USB_MB_H,\ - EC_CFG_USB_MB_L) +#define EC_CFG_USB_MB_L 4 +#define EC_CFG_USB_MB_H 7 +#define EC_CFG_USB_MB_MASK GENMASK(EC_CFG_USB_MB_H, EC_CFG_USB_MB_L) /* * Lid Accelerometer Sensor (3 bits) @@ -47,22 +43,20 @@ enum ec_cfg_lid_accel_sensor_type { LID_ACCEL_KX022 = 1, LID_ACCEL_LIS2DWL = 2, }; -#define EC_CFG_LID_ACCEL_SENSOR_L 8 -#define EC_CFG_LID_ACCEL_SENSOR_H 10 -#define EC_CFG_LID_ACCEL_SENSOR_MASK \ - GENMASK(EC_CFG_LID_ACCEL_SENSOR_H,\ - EC_CFG_LID_ACCEL_SENSOR_L) +#define EC_CFG_LID_ACCEL_SENSOR_L 8 +#define EC_CFG_LID_ACCEL_SENSOR_H 10 +#define EC_CFG_LID_ACCEL_SENSOR_MASK \ + GENMASK(EC_CFG_LID_ACCEL_SENSOR_H, EC_CFG_LID_ACCEL_SENSOR_L) /* * Base Gyro Sensor (3 bits) * * ec_config_has_base_gyro_sensor() will return ec_cfg_base_gyro_sensor_type */ -#define EC_CFG_BASE_GYRO_SENSOR_L 11 -#define EC_CFG_BASE_GYRO_SENSOR_H 13 -#define EC_CFG_BASE_GYRO_SENSOR_MASK \ - GENMASK(EC_CFG_BASE_GYRO_SENSOR_H,\ - EC_CFG_BASE_GYRO_SENSOR_L) +#define EC_CFG_BASE_GYRO_SENSOR_L 11 +#define EC_CFG_BASE_GYRO_SENSOR_H 13 +#define EC_CFG_BASE_GYRO_SENSOR_MASK \ + GENMASK(EC_CFG_BASE_GYRO_SENSOR_H, EC_CFG_BASE_GYRO_SENSOR_L) /* * PWM Keyboard Backlight (1 bit) @@ -73,11 +67,11 @@ enum ec_cfg_pwm_keyboard_backlight_type { PWM_KEYBOARD_BACKLIGHT_NO = 0, PWM_KEYBOARD_BACKLIGHT_YES = 1, }; -#define EC_CFG_PWM_KEYBOARD_BACKLIGHT_L 14 -#define EC_CFG_PWM_KEYBOARD_BACKLIGHT_H 14 -#define EC_CFG_PWM_KEYBOARD_BACKLIGHT_MASK \ - GENMASK(EC_CFG_PWM_KEYBOARD_BACKLIGHT_H,\ - EC_CFG_PWM_KEYBOARD_BACKLIGHT_L) +#define EC_CFG_PWM_KEYBOARD_BACKLIGHT_L 14 +#define EC_CFG_PWM_KEYBOARD_BACKLIGHT_H 14 +#define EC_CFG_PWM_KEYBOARD_BACKLIGHT_MASK \ + GENMASK(EC_CFG_PWM_KEYBOARD_BACKLIGHT_H, \ + EC_CFG_PWM_KEYBOARD_BACKLIGHT_L) /* * Lid Angle Tablet Mode (1 bit) @@ -88,11 +82,10 @@ enum ec_cfg_lid_angle_tablet_mode_type { LID_ANGLE_TABLET_MODE_NO = 0, LID_ANGLE_TABLET_MODE_YES = 1, }; -#define EC_CFG_LID_ANGLE_TABLET_MODE_L 15 -#define EC_CFG_LID_ANGLE_TABLET_MODE_H 15 +#define EC_CFG_LID_ANGLE_TABLET_MODE_L 15 +#define EC_CFG_LID_ANGLE_TABLET_MODE_H 15 #define EC_CFG_LID_ANGLE_TABLET_MODE_MASK \ - GENMASK(EC_CFG_LID_ANGLE_TABLET_MODE_H,\ - EC_CFG_LID_ANGLE_TABLET_MODE_L) + GENMASK(EC_CFG_LID_ANGLE_TABLET_MODE_H, EC_CFG_LID_ANGLE_TABLET_MODE_L) /* * LTE Modem Present (1 bit) @@ -103,11 +96,10 @@ enum ec_cfg_lte_present_type { LTE_NONE = 0, LTE_PRESENT = 1, }; -#define EC_CFG_LTE_PRESENT_L 29 -#define EC_CFG_LTE_PRESENT_H 29 +#define EC_CFG_LTE_PRESENT_L 29 +#define EC_CFG_LTE_PRESENT_H 29 #define EC_CFG_LTE_PRESENT_MASK \ - GENMASK(EC_CFG_LTE_PRESENT_H,\ - EC_CFG_LTE_PRESENT_L) + GENMASK(EC_CFG_LTE_PRESENT_H, EC_CFG_LTE_PRESENT_L) /* * Keyboard Layout (2 bit) @@ -118,22 +110,20 @@ enum ec_cfg_keyboard_layout_type { KB_LAYOUT_DEFAULT = 0, KB_LAYOUT_1 = 1, }; -#define EC_CFG_KEYBOARD_LAYOUT_L 30 -#define EC_CFG_KEYBOARD_LAYOUT_H 31 +#define EC_CFG_KEYBOARD_LAYOUT_L 30 +#define EC_CFG_KEYBOARD_LAYOUT_H 31 #define EC_CFG_KEYBOARD_LAYOUT_MASK \ - GENMASK(EC_CFG_KEYBOARD_LAYOUT_H,\ - EC_CFG_KEYBOARD_LAYOUT_L) - + GENMASK(EC_CFG_KEYBOARD_LAYOUT_H, EC_CFG_KEYBOARD_LAYOUT_L) uint32_t get_cbi_fw_config(void); enum ec_cfg_usb_db_type ec_config_get_usb_db(void); enum ec_cfg_usb_mb_type ec_config_get_usb_mb(void); enum ec_cfg_lid_accel_sensor_type ec_config_has_lid_accel_sensor(void); enum ec_ssfc_base_gyro_sensor ec_config_has_base_gyro_sensor(void); -enum ec_cfg_pwm_keyboard_backlight_type ec_config_has_pwm_keyboard_backlight( - void); -enum ec_cfg_lid_angle_tablet_mode_type ec_config_has_lid_angle_tablet_mode( - void); +enum ec_cfg_pwm_keyboard_backlight_type +ec_config_has_pwm_keyboard_backlight(void); +enum ec_cfg_lid_angle_tablet_mode_type +ec_config_has_lid_angle_tablet_mode(void); enum ec_cfg_lte_present_type ec_config_lte_present(void); enum ec_cfg_keyboard_layout_type ec_config_keyboard_layout(void); diff --git a/baseboard/zork/cbi_ssfc.c b/baseboard/zork/cbi_ssfc.c index 1078ec6486..9cc2fdcef3 100644 --- a/baseboard/zork/cbi_ssfc.c +++ b/baseboard/zork/cbi_ssfc.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -38,11 +38,10 @@ enum ec_ssfc_spkr_auto_mode get_cbi_ssfc_spkr_auto_mode(void) enum ec_ssfc_edp_phy_alt_tuning get_cbi_ssfc_edp_phy_alt_tuning(void) { return (cached_ssfc & SSFC_EDP_PHY_ALT_TUNING_MASK) >> - SSFC_EDP_PHY_ALT_TUNING_OFFSET; + SSFC_EDP_PHY_ALT_TUNING_OFFSET; } enum ec_ssfc_c1_mux get_cbi_ssfc_c1_mux(void) { - return (cached_ssfc & SSFC_C1_MUX_MASK) >> - SSFC_C1_MUX_OFFSET; + return (cached_ssfc & SSFC_C1_MUX_MASK) >> SSFC_C1_MUX_OFFSET; } diff --git a/baseboard/zork/cbi_ssfc.h b/baseboard/zork/cbi_ssfc.h index 1d201594b0..95bf5ba6e4 100644 --- a/baseboard/zork/cbi_ssfc.h +++ b/baseboard/zork/cbi_ssfc.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/baseboard/zork/usb_pd_policy.c b/baseboard/zork/usb_pd_policy.c index 8dcdfa7635..aeca706eb2 100644 --- a/baseboard/zork/usb_pd_policy.c +++ b/baseboard/zork/usb_pd_policy.c @@ -1,4 +1,4 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. +/* Copyright 2019 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -18,8 +18,8 @@ #include "usbc_ppc.h" #include "util.h" -#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) -#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) +#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ##args) +#define CPRINTS(format, args...) cprints(CC_USBPD, format, ##args) int pd_check_vconn_swap(int port) { diff --git a/baseboard/zork/variant_dalboz.c b/baseboard/zork/variant_dalboz.c index 10058bb8bc..599f29618b 100644 --- a/baseboard/zork/variant_dalboz.c +++ b/baseboard/zork/variant_dalboz.c @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -58,7 +58,7 @@ int board_get_temp(int idx, int *temp_k) /* adc power not ready when transition to S5 */ if (chipset_in_or_transitioning_to_state( - CHIPSET_STATE_SOFT_OFF)) + CHIPSET_STATE_SOFT_OFF)) return EC_ERROR_NOT_POWERED; channel = ADC_TEMP_SENSOR_SOC; diff --git a/baseboard/zork/variant_trembyle.c b/baseboard/zork/variant_trembyle.c index f9173df05a..9c29e057cc 100644 --- a/baseboard/zork/variant_trembyle.c +++ b/baseboard/zork/variant_trembyle.c @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,10 +9,10 @@ #include "console.h" #include "driver/bc12/pi3usb9201.h" #include "driver/charger/isl9241.h" -#include "driver/ppc/aoz1380.h" +#include "driver/ppc/aoz1380_public.h" #include "driver/ppc/nx20p348x.h" #include "driver/retimer/ps8802.h" -#include "driver/retimer/ps8818.h" +#include "driver/retimer/ps8818_public.h" #include "driver/retimer/tusb544.h" #include "driver/tcpm/nct38xx.h" #include "driver/usb_mux/amd_fp5.h" @@ -28,8 +28,8 @@ #include "usb_pd_tcpm.h" #include "usbc_ppc.h" -#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ## args) -#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ## args) +#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ##args) const struct i2c_port_t i2c_ports[] = { { @@ -160,8 +160,7 @@ __overridable void ppc_interrupt(enum gpio_signal signal) int board_set_active_charge_port(int port) { - int is_valid_port = (port >= 0 && - port < CONFIG_USB_PD_PORT_MAX_COUNT); + int is_valid_port = (port >= 0 && port < CONFIG_USB_PD_PORT_MAX_COUNT); int i; if (port == CHARGE_PORT_NONE) { @@ -182,7 +181,6 @@ int board_set_active_charge_port(int port) return EC_ERROR_INVAL; } - /* Check if the port is sourcing VBUS. */ if (ppc_is_sourcing_vbus(port)) { CPRINTFUSB("Skip enable C%d", port); @@ -284,7 +282,6 @@ static void reset_nct38xx_port(int port) msleep(NCT3807_RESET_POST_DELAY_MS); } - void board_reset_pd_mcu(void) { /* Reset TCPC0 */ @@ -333,18 +330,15 @@ void tcpc_alert_event(enum gpio_signal signal) schedule_deferred_pd_interrupt(port); } - int board_pd_set_frs_enable(int port, int enable) { int rv = EC_SUCCESS; /* Use the TCPC to enable fast switch when FRS included */ if (port == USBC_PORT_C0) { - rv = ioex_set_level(IOEX_USB_C0_TCPC_FASTSW_CTL_EN, - !!enable); + rv = ioex_set_level(IOEX_USB_C0_TCPC_FASTSW_CTL_EN, !!enable); } else { - rv = ioex_set_level(IOEX_USB_C1_TCPC_FASTSW_CTL_EN, - !!enable); + rv = ioex_set_level(IOEX_USB_C1_TCPC_FASTSW_CTL_EN, !!enable); } return rv; @@ -393,8 +387,7 @@ BUILD_ASSERT(CONFIG_IO_EXPANDER_PORT_COUNT == USBC_PORT_COUNT); * PS8802 set mux board tuning. * Adds in board specific gain and DP lane count configuration */ -static int board_ps8802_mux_set(const struct usb_mux *me, - mux_state_t mux_state) +static int board_ps8802_mux_set(const struct usb_mux *me, mux_state_t mux_state) { int rv = EC_SUCCESS; @@ -406,11 +399,10 @@ static int board_ps8802_mux_set(const struct usb_mux *me, /* USB specific config */ if (mux_state & USB_PD_MUX_USB_ENABLED) { /* Boost the USB gain */ - rv = ps8802_i2c_field_update16(me, - PS8802_REG_PAGE2, - PS8802_REG2_USB_SSEQ_LEVEL, - PS8802_USBEQ_LEVEL_UP_MASK, - PS8802_USBEQ_LEVEL_UP_19DB); + rv = ps8802_i2c_field_update16(me, PS8802_REG_PAGE2, + PS8802_REG2_USB_SSEQ_LEVEL, + PS8802_USBEQ_LEVEL_UP_MASK, + PS8802_USBEQ_LEVEL_UP_19DB); if (rv) return rv; } @@ -418,11 +410,10 @@ static int board_ps8802_mux_set(const struct usb_mux *me, /* DP specific config */ if (mux_state & USB_PD_MUX_DP_ENABLED) { /* Boost the DP gain */ - rv = ps8802_i2c_field_update8(me, - PS8802_REG_PAGE2, - PS8802_REG2_DPEQ_LEVEL, - PS8802_DPEQ_LEVEL_UP_MASK, - PS8802_DPEQ_LEVEL_UP_19DB); + rv = ps8802_i2c_field_update8(me, PS8802_REG_PAGE2, + PS8802_REG2_DPEQ_LEVEL, + PS8802_DPEQ_LEVEL_UP_MASK, + PS8802_DPEQ_LEVEL_UP_19DB); if (rv) return rv; } @@ -434,52 +425,46 @@ static int board_ps8802_mux_set(const struct usb_mux *me, * PS8818 set mux board tuning. * Adds in board specific gain and DP lane count configuration */ -static int board_ps8818_mux_set(const struct usb_mux *me, - mux_state_t mux_state) +static int board_ps8818_mux_set(const struct usb_mux *me, mux_state_t mux_state) { int rv = EC_SUCCESS; /* USB specific config */ if (mux_state & USB_PD_MUX_USB_ENABLED) { /* Boost the USB gain */ - rv = ps8818_i2c_field_update8(me, - PS8818_REG_PAGE1, - PS8818_REG1_APTX1EQ_10G_LEVEL, - PS8818_EQ_LEVEL_UP_MASK, - PS8818_EQ_LEVEL_UP_19DB); + rv = ps8818_i2c_field_update8(me, PS8818_REG_PAGE1, + PS8818_REG1_APTX1EQ_10G_LEVEL, + PS8818_EQ_LEVEL_UP_MASK, + PS8818_EQ_LEVEL_UP_19DB); if (rv) return rv; - rv = ps8818_i2c_field_update8(me, - PS8818_REG_PAGE1, - PS8818_REG1_APTX2EQ_10G_LEVEL, - PS8818_EQ_LEVEL_UP_MASK, - PS8818_EQ_LEVEL_UP_19DB); + rv = ps8818_i2c_field_update8(me, PS8818_REG_PAGE1, + PS8818_REG1_APTX2EQ_10G_LEVEL, + PS8818_EQ_LEVEL_UP_MASK, + PS8818_EQ_LEVEL_UP_19DB); if (rv) return rv; - rv = ps8818_i2c_field_update8(me, - PS8818_REG_PAGE1, - PS8818_REG1_APTX1EQ_5G_LEVEL, - PS8818_EQ_LEVEL_UP_MASK, - PS8818_EQ_LEVEL_UP_19DB); + rv = ps8818_i2c_field_update8(me, PS8818_REG_PAGE1, + PS8818_REG1_APTX1EQ_5G_LEVEL, + PS8818_EQ_LEVEL_UP_MASK, + PS8818_EQ_LEVEL_UP_19DB); if (rv) return rv; - rv = ps8818_i2c_field_update8(me, - PS8818_REG_PAGE1, - PS8818_REG1_APTX2EQ_5G_LEVEL, - PS8818_EQ_LEVEL_UP_MASK, - PS8818_EQ_LEVEL_UP_19DB); + rv = ps8818_i2c_field_update8(me, PS8818_REG_PAGE1, + PS8818_REG1_APTX2EQ_5G_LEVEL, + PS8818_EQ_LEVEL_UP_MASK, + PS8818_EQ_LEVEL_UP_19DB); if (rv) return rv; /* Set the RX input termination */ - rv = ps8818_i2c_field_update8(me, - PS8818_REG_PAGE1, - PS8818_REG1_RX_PHY, - PS8818_RX_INPUT_TERM_MASK, - ZORK_PS8818_RX_INPUT_TERM); + rv = ps8818_i2c_field_update8(me, PS8818_REG_PAGE1, + PS8818_REG1_RX_PHY, + PS8818_RX_INPUT_TERM_MASK, + ZORK_PS8818_RX_INPUT_TERM); if (rv) return rv; } @@ -487,11 +472,10 @@ static int board_ps8818_mux_set(const struct usb_mux *me, /* DP specific config */ if (mux_state & USB_PD_MUX_DP_ENABLED) { /* Boost the DP gain */ - rv = ps8818_i2c_field_update8(me, - PS8818_REG_PAGE1, - PS8818_REG1_DPEQ_LEVEL, - PS8818_DPEQ_LEVEL_UP_MASK, - PS8818_DPEQ_LEVEL_UP_19DB); + rv = ps8818_i2c_field_update8(me, PS8818_REG_PAGE1, + PS8818_REG1_DPEQ_LEVEL, + PS8818_DPEQ_LEVEL_UP_MASK, + PS8818_DPEQ_LEVEL_UP_19DB); if (rv) return rv; @@ -505,7 +489,7 @@ static int board_ps8818_mux_set(const struct usb_mux *me, return rv; } -const struct usb_mux usbc1_ps8802 = { +struct usb_mux usbc1_ps8802 = { .usb_port = USBC_PORT_C1, .i2c_port = I2C_PORT_TCPC1, .i2c_addr_flags = PS8802_I2C_ADDR_FLAGS, |