diff options
Diffstat (limited to 'board/agah')
| -rw-r--r-- | board/agah/battery.c | 2 | ||||
| -rw-r--r-- | board/agah/board.c | 54 | ||||
| -rw-r--r-- | board/agah/board.h | 156 | ||||
| -rw-r--r-- | board/agah/build.mk | 2 | ||||
| -rw-r--r-- | board/agah/charger_isl9241.c | 236 | ||||
| -rw-r--r-- | board/agah/ec.tasklist | 3 | ||||
| -rw-r--r-- | board/agah/fans.c | 6 | ||||
| -rw-r--r-- | board/agah/fw_config.c | 4 | ||||
| -rw-r--r-- | board/agah/fw_config.h | 8 | ||||
| -rw-r--r-- | board/agah/gpio.inc | 23 | ||||
| -rw-r--r-- | board/agah/i2c.c | 4 | ||||
| -rw-r--r-- | board/agah/keyboard.c | 3 | ||||
| -rw-r--r-- | board/agah/led.c | 221 | ||||
| -rw-r--r-- | board/agah/pwm.c | 16 | ||||
| -rw-r--r-- | board/agah/sensors.c | 64 | ||||
| -rw-r--r-- | board/agah/usbc_config.c | 65 | ||||
| -rw-r--r-- | board/agah/usbc_config.h | 10 |
17 files changed, 511 insertions, 366 deletions
diff --git a/board/agah/battery.c b/board/agah/battery.c index b9adcb4db9..92e2ad4b07 100644 --- a/board/agah/battery.c +++ b/board/agah/battery.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * diff --git a/board/agah/board.c b/board/agah/board.c index d1cc519402..c8c98621d3 100644 --- a/board/agah/board.c +++ b/board/agah/board.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -15,19 +15,32 @@ #include "hooks.h" #include "fw_config.h" #include "hooks.h" +#include "keyboard_scan.h" #include "lid_switch.h" #include "power_button.h" #include "power.h" #include "registers.h" #include "switch.h" +#include "system.h" #include "throttle_ap.h" #include "usbc_config.h" +#include "util.h" + +#include "driver/nvidia_gpu.h" #include "gpio_list.h" /* Must come after other header files. */ /* Console output macros */ -#define CPRINTF(format, args...) cprintf(CC_CHARGER, format, ## args) -#define CPRINTS(format, args...) cprints(CC_CHARGER, format, ## args) +#define CPRINTF(format, args...) cprintf(CC_CHARGER, format, ##args) +#define CPRINTS(format, args...) cprints(CC_CHARGER, format, ##args) + +static int block_sequence; + +struct d_notify_policy d_notify_policies[] = { + AC_ATLEAST_W(100), AC_ATLEAST_W(65), AC_DC, + DC_ATLEAST_SOC(20), DC_ATLEAST_SOC(5), +}; +BUILD_ASSERT(ARRAY_SIZE(d_notify_policies) == D_NOTIFY_COUNT); __override void board_cbi_init(void) { @@ -51,8 +64,15 @@ DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT); static void board_init(void) { + if ((system_get_reset_flags() & EC_RESET_FLAG_AP_OFF) || + (keyboard_scan_get_boot_keys() & BOOT_KEY_DOWN_ARROW)) { + CPRINTS("PG_PP3300_S5_OD block is enabled"); + block_sequence = 1; + } gpio_enable_interrupt(GPIO_PG_PP3300_S5_OD); gpio_enable_interrupt(GPIO_BJ_ADP_PRESENT_ODL); + + nvidia_gpu_init_policy(d_notify_policies); } DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); @@ -61,9 +81,13 @@ DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); */ static void bypass_pp3300_s5_deferred(void) { - int pg_pp3300_s5 = gpio_get_level(GPIO_PG_PP3300_S5_OD); + if (block_sequence) { + CPRINTS("PG_PP3300_S5_OD is blocked."); + return; + } - gpio_set_level(GPIO_PG_PP3300_S5_EC_SEQ_OD, pg_pp3300_s5); + gpio_set_level(GPIO_PG_PP3300_S5_EC_SEQ_OD, + gpio_get_level(GPIO_PG_PP3300_S5_OD)); } DECLARE_DEFERRED(bypass_pp3300_s5_deferred); @@ -72,3 +96,23 @@ void board_power_interrupt(enum gpio_signal signal) /* Trigger deferred notification of gpio PG_PP3300_S5_OD change */ hook_call_deferred(&bypass_pp3300_s5_deferred_data, 0); } + +static int cc_blockseq(int argc, const char *argv[]) +{ + if (argc > 1) { + if (!parse_bool(argv[1], &block_sequence)) { + ccprintf("Invalid argument: %s\n", argv[1]); + return EC_ERROR_INVAL; + } + } + + ccprintf("PG_PP3300_S5_OD block is %s\n", + block_sequence ? "enabled" : "disabled"); + return EC_SUCCESS; +} +DECLARE_CONSOLE_COMMAND(blockseq, cc_blockseq, "[on/off]", NULL); + +void gpu_overt_interrupt(enum gpio_signal signal) +{ + nvidia_gpu_over_temp(gpio_get_level(signal)); +} diff --git a/board/agah/board.h b/board/agah/board.h index 7655f9a4fe..0622e33df3 100644 --- a/board/agah/board.h +++ b/board/agah/board.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -14,6 +14,11 @@ #include "baseboard.h" /* + * Nvidia GPU + */ +#define CONFIG_GPU_NVIDIA + +/* * This will happen automatically on NPCX9 ES2 and later. Do not remove * until we can confirm all earlier chips are out of service. */ @@ -24,18 +29,6 @@ */ #undef CONFIG_CHIPSET_X86_RSMRST_AFTER_S5 -/* LED */ -#define CONFIG_LED_PWM -#define CONFIG_LED_PWM_COUNT 1 -#undef CONFIG_LED_PWM_NEAR_FULL_COLOR -#undef CONFIG_LED_PWM_SOC_ON_COLOR -#undef CONFIG_LED_PWM_SOC_SUSPEND_COLOR -#undef CONFIG_LED_PWM_LOW_BATT_COLOR -#define CONFIG_LED_PWM_NEAR_FULL_COLOR EC_LED_COLOR_WHITE -#define CONFIG_LED_PWM_SOC_ON_COLOR EC_LED_COLOR_WHITE -#define CONFIG_LED_PWM_SOC_SUSPEND_COLOR EC_LED_COLOR_WHITE -#define CONFIG_LED_PWM_LOW_BATT_COLOR EC_LED_COLOR_AMBER - /* Sensors */ #undef CONFIG_TABLET_MODE #undef CONFIG_TABLET_MODE_SWITCH @@ -45,7 +38,7 @@ #undef CONFIG_VOLUME_BUTTONS /* USB Type A Features */ -#define USB_PORT_COUNT 1 +#define USB_PORT_COUNT 1 #define CONFIG_USB_PORT_POWER_DUMB /* USB Type C and USB PD defines */ @@ -61,18 +54,20 @@ #define CONFIG_USBC_PPC_SYV682X #define CONFIG_USB_PD_FRS_PPC +#undef CONFIG_SYV682X_HV_ILIM +#define CONFIG_SYV682X_HV_ILIM SYV682X_HV_ILIM_5_50 -#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ -#define PD_POWER_SUPPLY_TURN_OFF_DELAY 30000 /* us */ -#define PD_VCONN_SWAP_DELAY 5000 /* us */ +#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ +#define PD_POWER_SUPPLY_TURN_OFF_DELAY 30000 /* us */ +#define PD_VCONN_SWAP_DELAY 5000 /* us */ -/* - * Passive USB-C cables only support up to 60W. - */ -#define PD_OPERATING_POWER_MW 15000 -#define PD_MAX_POWER_MW 60000 -#define PD_MAX_CURRENT_MA 3000 -#define PD_MAX_VOLTAGE_MV 20000 +#define PD_OPERATING_POWER_MW 15000 +#define PD_MAX_POWER_MW 100000 +#define PD_MAX_CURRENT_MA 5000 +#define PD_MAX_VOLTAGE_MV 20000 + +#undef CONFIG_EXTPOWER_DEBOUNCE_MS +#define CONFIG_EXTPOWER_DEBOUNCE_MS 500 /* * Macros for GPIO signals used in common code that don't match the @@ -80,73 +75,77 @@ * then redefined here to so it's more clear which signal is being used for * which purpose. */ -#define GPIO_AC_PRESENT GPIO_ACOK_OD -#define GPIO_CPU_PROCHOT GPIO_EC_PROCHOT_ODL -#define GPIO_EC_INT_L GPIO_EC_PCH_INT_ODL -#define GPIO_ENABLE_BACKLIGHT GPIO_EC_EN_EDP_BL -#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW -#define GPIO_KBD_KSO2 GPIO_EC_KSO_02_INV -#define GPIO_PACKET_MODE_EN GPIO_EC_GSC_PACKET_MODE -#define GPIO_PCH_PWRBTN_L GPIO_EC_PCH_PWR_BTN_ODL -#define GPIO_PCH_RSMRST_L GPIO_EC_PCH_RSMRST_L -#define GPIO_PCH_RTCRST GPIO_EC_PCH_RTCRST -#define GPIO_PCH_SLP_S0_L GPIO_SYS_SLP_S0IX_L -#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L +#define GPIO_AC_PRESENT GPIO_ACOK_OD +#define GPIO_CPU_PROCHOT GPIO_EC_PROCHOT_ODL +#define GPIO_EC_INT_L GPIO_EC_PCH_INT_ODL +#define GPIO_ENABLE_BACKLIGHT GPIO_EC_EN_EDP_BL +#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW +#define GPIO_KBD_KSO2 GPIO_EC_KSO_02_INV +#define GPIO_PACKET_MODE_EN GPIO_EC_GSC_PACKET_MODE +#define GPIO_PCH_PWRBTN_L GPIO_EC_PCH_PWR_BTN_ODL +#define GPIO_PCH_RSMRST_L GPIO_EC_PCH_RSMRST_L +#define GPIO_PCH_RTCRST GPIO_EC_PCH_RTCRST +#define GPIO_PCH_SLP_S0_L GPIO_SYS_SLP_S0IX_L +#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L +#define GPIO_TEMP_SENSOR_POWER GPIO_SEQ_EC_DSW_PWROK /* * GPIO_EC_PCH_INT_ODL is used for MKBP events as well as a PCH wakeup * signal. */ -#define GPIO_PCH_WAKE_L GPIO_EC_PCH_INT_ODL -#define GPIO_PG_EC_ALL_SYS_PWRGD GPIO_SEQ_EC_ALL_SYS_PG -#define GPIO_PG_EC_DSW_PWROK GPIO_SEQ_EC_DSW_PWROK -#define GPIO_PG_EC_RSMRST_ODL GPIO_SEQ_EC_RSMRST_ODL -#define GPIO_POWER_BUTTON_L GPIO_GSC_EC_PWR_BTN_ODL -#define GPIO_SYS_RESET_L GPIO_SYS_RST_ODL -#define GPIO_WP_L GPIO_EC_WP_ODL +#define GPIO_PCH_WAKE_L GPIO_EC_PCH_INT_ODL +#define GPIO_PG_EC_ALL_SYS_PWRGD GPIO_SEQ_EC_ALL_SYS_PG +#define GPIO_PG_EC_DSW_PWROK GPIO_SEQ_EC_DSW_PWROK +#define GPIO_PG_EC_RSMRST_ODL GPIO_SEQ_EC_RSMRST_ODL +#define GPIO_POWER_BUTTON_L GPIO_GSC_EC_PWR_BTN_ODL +#define GPIO_SYS_RESET_L GPIO_SYS_RST_ODL +#define GPIO_WP_L GPIO_EC_WP_ODL /* System has back-lit keyboard */ #define CONFIG_PWM_KBLIGHT /* I2C Bus Configuration */ -#define I2C_PORT_SENSOR NPCX_I2C_PORT0_0 +#define I2C_PORT_SENSOR NPCX_I2C_PORT0_0 -#define I2C_PORT_USB_C0_TCPC NPCX_I2C_PORT1_0 -#define I2C_PORT_USB_C2_TCPC NPCX_I2C_PORT2_0 +#define I2C_PORT_USB_C0_TCPC NPCX_I2C_PORT1_0 +#define I2C_PORT_USB_C2_TCPC NPCX_I2C_PORT2_0 -#define I2C_PORT_USB_C0_PPC NPCX_I2C_PORT1_0 -#define I2C_PORT_USB_C2_PPC NPCX_I2C_PORT2_0 +#define I2C_PORT_USB_C0_PPC NPCX_I2C_PORT1_0 +#define I2C_PORT_USB_C2_PPC NPCX_I2C_PORT2_0 -#define I2C_PORT_USB_C0_BC12 NPCX_I2C_PORT1_0 -#define I2C_PORT_USB_C2_BC12 NPCX_I2C_PORT2_0 +#define I2C_PORT_USB_C0_BC12 NPCX_I2C_PORT1_0 +#define I2C_PORT_USB_C2_BC12 NPCX_I2C_PORT2_0 -#define I2C_PORT_USBA1_RT NPCX_I2C_PORT6_1 +#define I2C_PORT_USBA1_RT NPCX_I2C_PORT6_1 -#define I2C_PORT_BATTERY NPCX_I2C_PORT5_0 -#define I2C_PORT_CHARGER NPCX_I2C_PORT7_0 -#define I2C_PORT_EEPROM NPCX_I2C_PORT7_0 +#define I2C_PORT_BATTERY NPCX_I2C_PORT5_0 +#define I2C_PORT_CHARGER NPCX_I2C_PORT7_0 +#define I2C_PORT_EEPROM NPCX_I2C_PORT7_0 -#define I2C_ADDR_EEPROM_FLAGS 0x50 +#define I2C_ADDR_EEPROM_FLAGS 0x50 /* Thermal features */ #define CONFIG_THERMISTOR #define CONFIG_TEMP_SENSOR -#define CONFIG_TEMP_SENSOR_POWER_GPIO GPIO_SEQ_EC_DSW_PWROK +#define CONFIG_TEMP_SENSOR_POWER +#define CONFIG_TEMP_SENSOR_FIRST_READ_DELAY_MS 500 #define CONFIG_STEINHART_HART_3V3_30K9_47K_4050B -#define CONFIG_FANS FAN_CH_COUNT +#define CONFIG_FANS FAN_CH_COUNT /* Charger defines */ #define CONFIG_CHARGER_ISL9241 -#define CONFIG_CHARGER_SENSE_RESISTOR 10 -#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 +#define CONFIG_CHARGER_SENSE_RESISTOR 10 +#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 +/* Round down 7700 max current to multiple of 128mA for ISL9241 AC prochot. */ +#define AGAH_AC_PROCHOT_CURRENT_MA 7680 /* Barrel jack adapter settings */ -#undef CONFIG_DEDICATED_CHARGE_PORT_COUNT -#define CONFIG_DEDICATED_CHARGE_PORT_COUNT 1 +#undef CONFIG_DEDICATED_CHARGE_PORT_COUNT +#define CONFIG_DEDICATED_CHARGE_PORT_COUNT 1 /* This is the next available port # after USB-C ports. */ -#define DEDICATED_CHARGE_PORT 2 +#define DEDICATED_CHARGE_PORT 2 /* * Older boards have a different ADC assignment. @@ -156,23 +155,23 @@ #ifndef __ASSEMBLER__ -#include "gpio_signal.h" /* needed by registers.h */ +#include "gpio_signal.h" /* needed by registers.h */ #include "registers.h" #include "usbc_config.h" enum adc_channel { ADC_TEMP_SENSOR_1_DDR_SOC, - ADC_TEMP_SENSOR_2_AMBIENT, + ADC_TEMP_SENSOR_2_GPU, ADC_TEMP_SENSOR_3_CHARGER, - ADC_TEMP_SENSOR_4_WWAN, + ADC_CHARGER_IADP, + ADC_ADP_TYP, ADC_CH_COUNT }; enum temp_sensor_id { TEMP_SENSOR_1_DDR_SOC, - TEMP_SENSOR_2_AMBIENT, + TEMP_SENSOR_2_GPU, TEMP_SENSOR_3_CHARGER, - TEMP_SENSOR_4_WWAN, TEMP_SENSOR_COUNT }; @@ -183,25 +182,15 @@ enum battery_type { }; enum pwm_channel { - PWM_CH_LED2 = 0, /* PWM0 (white charger) */ - PWM_CH_LED1, /* PWM2 (orange charger) */ - PWM_CH_KBLIGHT, /* PWM3 */ - PWM_CH_FAN, /* PWM5 */ - PWM_CH_FAN2, /* PWM4 */ + PWM_CH_KBLIGHT = 0, /* PWM3 */ + PWM_CH_FAN, /* PWM5 */ + PWM_CH_FAN2, /* PWM4 */ PWM_CH_COUNT }; -enum fan_channel { - FAN_CH_0 = 0, - FAN_CH_1, - FAN_CH_COUNT -}; +enum fan_channel { FAN_CH_0 = 0, FAN_CH_1, FAN_CH_COUNT }; -enum mft_channel { - MFT_CH_0 = 0, - MFT_CH_1, - MFT_CH_COUNT -}; +enum mft_channel { MFT_CH_0 = 0, MFT_CH_1, MFT_CH_COUNT }; enum charge_port { CHARGE_PORT_TYPEC0, @@ -219,6 +208,9 @@ void board_power_interrupt(enum gpio_signal signal); /* IRQ for BJ plug/unplug. */ void bj_present_interrupt(enum gpio_signal signal); +/* IRQ for over temperature. */ +void gpu_overt_interrupt(enum gpio_signal signal); + #endif /* !__ASSEMBLER__ */ #endif /* __CROS_EC_BOARD_H */ diff --git a/board/agah/build.mk b/board/agah/build.mk index fbdd503bc4..d2f2db68df 100644 --- a/board/agah/build.mk +++ b/board/agah/build.mk @@ -1,5 +1,5 @@ # -*- makefile -*- -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. # diff --git a/board/agah/charger_isl9241.c b/board/agah/charger_isl9241.c index 6f041a7455..47e8261f78 100644 --- a/board/agah/charger_isl9241.c +++ b/board/agah/charger_isl9241.c @@ -1,8 +1,38 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ +/* + * + * We need to deal with plug / unplug of AC chargers: + * + * +---------+ +USB +---------+ + * | BATTERY |------------>| BATTERY | + * | |<------------| +USB | + * +---------+ -USB +---------+ + * | ^ | ^ + * +BJ | | -BJ +BJ | | -BJ + * v | v | + * +---------+ +USB +---------+ + * | BATTERY |------------>| BATTERY | + * | +BJ |<------------| +BJ+USB | + * +---------+ -USB +---------+ + * + * Depending on available battery charge, power rating of the new charger, and + * the system power state, transition/throttling may or may not occur but + * switching chargers is handled as follows: + * + * 1. Detects a new charger or removal of an existing charger. + * 2. charge_manager_update_charge is called with new charger's info. + * 3. board_set_active_charge_port is called. + * 3.1 It triggers hard & soft throttling for AP & GPU. + * 3.2 It disable active port then enables the new port. + * 4. HOOK_POWER_SUPPLY_CHANGE is called. We disables hard throttling. + * 5. charger task wakes up on HOOK_POWER_SUPPLY_CHANGE, enables (or disables) + * bypass mode. + */ + #include "common.h" #include "charge_manager.h" @@ -15,12 +45,13 @@ #include "gpio.h" #include "hooks.h" #include "stdbool.h" +#include "throttle_ap.h" #include "usbc_ppc.h" #include "usb_pd.h" #include "util.h" -#define CPRINTF(format, args...) cprintf(CC_CHARGER, format, ## args) -#define CPRINTS(format, args...) cprints(CC_CHARGER, format, ## args) +#define CPRINTF(format, args...) cprintf(CC_CHARGER, format, ##args) +#define CPRINTS(format, args...) cprints(CC_CHARGER, format, ##args) /* Charger Chip Configuration */ const struct charger_config_t chg_chips[] = { @@ -32,71 +63,42 @@ const struct charger_config_t chg_chips[] = { }; BUILD_ASSERT(ARRAY_SIZE(chg_chips) == CHARGER_NUM); -static int board_disable_bj_port(void) +static int board_enable_bj_port(bool enable) { - gpio_set_level(GPIO_EN_PPVAR_BJ_ADP_L, 1); - /* If the current port is BJ, disable bypass mode. */ - if (charge_manager_get_supplier() == CHARGE_SUPPLIER_DEDICATED) - return charger_enable_bypass_mode(0, 0); + if (enable) { + if (gpio_get_level(GPIO_BJ_ADP_PRESENT_ODL)) + return EC_ERROR_INVAL; + gpio_set_level(GPIO_EN_PPVAR_BJ_ADP_L, 0); + } else { + gpio_set_level(GPIO_EN_PPVAR_BJ_ADP_L, 1); + } - CPRINTS("BJ power is disabled"); + CPRINTS("BJ power is %sabled", enable ? "en" : "dis"); return EC_SUCCESS; } -static int board_enable_bj_port(void) -{ - if (gpio_get_level(GPIO_BJ_ADP_PRESENT_ODL)) - return EC_ERROR_INVAL; - gpio_set_level(GPIO_EN_PPVAR_BJ_ADP_L, 0); - - CPRINTS("BJ power is enabled"); - - return charger_enable_bypass_mode(0, 1); -} - -/* - * TODO: - * - * When AC is being plugged in (including switching source port), - * 1. Deassert NVIDIA_GPU_ACOFF_ODL. - * 2. Call evaluate_d_notify. - * - * When AC is being lost, - * 1. Assert NVIDIA_GPU_ACOFF_ODL. - * 2. Set D-Notify to D5. - * 3. Differ-call - * a. Deassert NVIDIA_GPU_ACOFF_ODL. - * b. evaluate_d_notify - */ -static int board_throttle_ap_gpu(bool enable) +static void board_throttle_ap_gpu(void) { - int rv = EC_SUCCESS; - - if (!chipset_in_state(CHIPSET_STATE_ON)) - return EC_SUCCESS; - - CPRINTS("TODO: %s to %s AP & GPU (%d)", rv ? "Failed" : "Succeeded", - enable ? "throttle" : "unthrottle", rv); - - return rv; + throttle_ap(THROTTLE_ON, THROTTLE_HARD, THROTTLE_SRC_AC); + throttle_gpu(THROTTLE_ON, THROTTLE_HARD, THROTTLE_SRC_AC); } /* Disable all VBUS sink ports except <port>. <port> = -1 disables all ports. */ -static int board_disable_vbus_sink(int port) +static int board_disable_other_vbus_sink(int except_port) { int i, r, rv = EC_SUCCESS; for (i = 0; i < ppc_cnt; i++) { - if (i == port) + if (i == except_port) continue; /* * Do not return early if one fails otherwise we can get into a * boot loop assertion failure. */ r = ppc_vbus_sink_enable(i, 0); - CPRINTS("%s to disable sink path C%d (%d).", - r ? "Failed" : "Succeeded", i, r); + if (r) + CPRINTS("Failed to disable sink path C%d (%d)", i, r); rv |= r; } @@ -104,77 +106,74 @@ static int board_disable_vbus_sink(int port) } /* Minimum battery SoC required for switching source port. */ -#define MIN_BATT_FOR_SWITCHING_SOURCE_PORT 1 +#define MIN_BATT_FOR_SWITCHING_SOURCE_PORT 1 /* - * It should also work on POR with/without a battery: - * - * 1. EC gathers power info of all ports. - * 2. Identify the highest power port. - * 3. If - * 1. battery soc = 0% --> Exit - * 2. BJ_ADP_PRESENT_ODL = 1 --> Exit - * 3. highest power port == active port --> Exit - * 4. If - * 1. in S0, throttle AP & GPU to the DC rating. - * 5. Turn off the current active port. - * 6. Turn on the highest power port. - * 7. If - * 1. in S0, throttle AP & GPU back. - * - * TODO: Are the following cases covered? - * 1. Two AC adapters are plugged. Then, the active adapter is removed. - * * TODO: Recover from incomplete execution: - * 1. Failed to turn on/off PPC. */ int board_set_active_charge_port(int port) { - enum charge_supplier supplier = charge_manager_get_supplier(); + enum charge_supplier active_supplier = charge_manager_get_supplier(); int active_port = charge_manager_get_active_charge_port(); - CPRINTS("Changing charge port to %d (current port=%d supplier=%d)", - port, active_port, supplier); + CPRINTS("Switching charger from P%d (supplier=%d) to P%d", active_port, + active_supplier, port); if (port == CHARGE_PORT_NONE) { CPRINTS("Disabling all charger ports"); - board_throttle_ap_gpu(1); - - board_disable_bj_port(); - board_disable_vbus_sink(-1); + board_enable_bj_port(false); + board_disable_other_vbus_sink(-1); return EC_SUCCESS; } + /* Return on invalid or no-op call. */ if (port < 0 || CHARGE_PORT_COUNT <= port) { return EC_ERROR_INVAL; } else if (port == active_port) { return EC_SUCCESS; } else if (board_vbus_source_enabled(port)) { /* Don't charge from a USBC source port */ - CPRINTS("Don't enable C%d. It's sourcing.", port); + CPRINTS("Don't enable P%d. It's sourcing.", port); return EC_ERROR_INVAL; } /* + * If we're in S0, throttle AP and GPU. They'll be unthrottled when + * a port/supply switch completes (via HOOK_POWER_SUPPLY_CHANGE). + * + * If we're running currently on a battery (active_supplier == NONE), we + * don't need to throttle because we're not disabling any port. + */ + if (chipset_in_state(CHIPSET_STATE_ON) && + active_supplier != CHARGE_SUPPLIER_NONE) + board_throttle_ap_gpu(); + + /* + * We're here for the two cases: + * 1. A new charger was connected. + * 2. One charger was disconnected and we're switching to another. + */ + + /* * We need to check the battery if we're switching a source port. If * we're just starting up or no AC was previously plugged, we shouldn't * check the battery. Both cases can be caught by supplier == NONE. */ - if (supplier != CHARGE_SUPPLIER_NONE) { + if (active_supplier != CHARGE_SUPPLIER_NONE) { if (charge_get_percent() < MIN_BATT_FOR_SWITCHING_SOURCE_PORT) return EC_ERROR_NOT_POWERED; } /* Turn off other ports' sink paths before enabling requested port. */ - if (port == CHARGE_PORT_TYPEC0 || port == CHARGE_PORT_TYPEC1) { + if (is_pd_port(port)) { /* - * BJ port is on POR. So, we need to turn it off even if we're - * not previously on BJ. + * BJ port is enabled on start-up. So, we need to turn it off + * even if we were not previously on BJ. */ - board_disable_bj_port(); - if (board_disable_vbus_sink(port)) + board_enable_bj_port(false); + if (board_disable_other_vbus_sink(port)) return EC_ERROR_UNCHANGED; /* Enable requested USBC charge port. */ @@ -187,26 +186,21 @@ int board_set_active_charge_port(int port) * We can't proceed unless both ports are successfully * disconnected as sources. */ - if (board_disable_vbus_sink(-1)) + if (board_disable_other_vbus_sink(-1)) return EC_ERROR_UNKNOWN; - board_enable_bj_port(); + board_enable_bj_port(true); } - /* Switching port is complete. Turn off throttling. */ - if (supplier != CHARGE_SUPPLIER_NONE) - board_throttle_ap_gpu(0); - - CPRINTS("New charger p%d", port); + CPRINTS("New charger P%d", port); return EC_SUCCESS; } -void board_set_charge_limit(int port, int supplier, int charge_ma, - int max_ma, int charge_mv) +void board_set_charge_limit(int port, int supplier, int charge_ma, int max_ma, + int charge_mv) { - charge_set_input_current_limit(MAX(charge_ma, - CONFIG_CHARGER_INPUT_CURRENT), - charge_mv); + charge_set_input_current_limit( + MAX(charge_ma, CONFIG_CHARGER_INPUT_CURRENT), charge_mv); } static const struct charge_port_info bj_power = { @@ -216,32 +210,62 @@ static const struct charge_port_info bj_power = { }; /* Debounce time for BJ plug/unplug */ -#define BJ_DEBOUNCE_MS 1000 +#define BJ_DEBOUNCE_MS CONFIG_EXTPOWER_DEBOUNCE_MS + +int board_should_charger_bypass(void) +{ + return charge_manager_get_active_charge_port() == DEDICATED_CHARGE_PORT; +} -static void bj_connect_deferred(void) +static void bj_connect(void) { static int8_t bj_connected = -1; - const struct charge_port_info *pi = NULL; int connected = !gpio_get_level(GPIO_BJ_ADP_PRESENT_ODL); + /* Debounce */ if (connected == bj_connected) return; - if (connected) - pi = &bj_power; + bj_connected = connected; + CPRINTS("BJ %sconnected", connected ? "" : "dis"); charge_manager_update_charge(CHARGE_SUPPLIER_DEDICATED, - DEDICATED_CHARGE_PORT, pi); - bj_connected = connected; - CPRINTS("BJ %s", connected ? "connected" : "disconnected"); + DEDICATED_CHARGE_PORT, + connected ? &bj_power : NULL); } -DECLARE_DEFERRED(bj_connect_deferred); +DECLARE_DEFERRED(bj_connect); +/* This handler shouldn't be needed if ACOK from isl9241 is working. */ void bj_present_interrupt(enum gpio_signal signal) { - hook_call_deferred(&bj_connect_deferred_data, BJ_DEBOUNCE_MS * MSEC); + hook_call_deferred(&bj_connect_data, BJ_DEBOUNCE_MS * MSEC); } +void ac_change(void) +{ + /* + * Serialize. We don't handle USB-C here because we'll get a + * notification from TCPC. + */ + hook_call_deferred(&bj_connect_data, 0); +} +DECLARE_HOOK(HOOK_AC_CHANGE, ac_change, HOOK_PRIO_DEFAULT); + +static void power_supply_changed(void) +{ + /* + * We've switched to a new charge port (or no port). Hardware throttles + * can be removed now. Software throttles may stay enabled and change + * as the situation changes. + */ + throttle_ap(THROTTLE_OFF, THROTTLE_HARD, THROTTLE_SRC_AC); + /* + * Unthrottling GPU is done through a deferred call scheduled when it + * was throttled. + */ +} +DECLARE_HOOK(HOOK_POWER_SUPPLY_CHANGE, power_supply_changed, HOOK_PRIO_DEFAULT); + static void bj_state_init(void) { /* @@ -253,6 +277,8 @@ static void bj_state_init(void) charge_manager_update_charge(j, i, NULL); } - bj_connect_deferred(); + bj_connect(); + + isl9241_set_ac_prochot(CHARGER_SOLO, AGAH_AC_PROCHOT_CURRENT_MA); } DECLARE_HOOK(HOOK_INIT, bj_state_init, HOOK_PRIO_INIT_CHARGE_MANAGER + 1); diff --git a/board/agah/ec.tasklist b/board/agah/ec.tasklist index 7286caf6c6..ebbfd239f9 100644 --- a/board/agah/ec.tasklist +++ b/board/agah/ec.tasklist @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -12,6 +12,7 @@ #define CONFIG_TASK_LIST \ TASK_ALWAYS(HOOKS, hook_task, NULL, HOOKS_TASK_STACK_SIZE) \ + TASK_ALWAYS(LED, led_task, NULL, TASK_STACK_SIZE) \ TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, TASK_STACK_SIZE) \ TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 0, TASK_STACK_SIZE) \ TASK_ALWAYS(CHARGER, charger_task, NULL, BASEBOARD_CHARGER_TASK_STACK_SIZE) \ diff --git a/board/agah/fans.c b/board/agah/fans.c index df6102b460..45533d9e8c 100644 --- a/board/agah/fans.c +++ b/board/agah/fans.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -30,14 +30,14 @@ BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT); static const struct fan_conf fan_conf_0 = { .flags = FAN_USE_RPM_MODE, - .ch = MFT_CH_0, /* Use MFT id to control fan */ + .ch = MFT_CH_0, /* Use MFT id to control fan */ .pgood_gpio = -1, .enable_gpio = GPIO_EN_PP5000_FAN, }; static const struct fan_conf fan_conf_1 = { .flags = FAN_USE_RPM_MODE, - .ch = MFT_CH_1, /* Use MFT id to control fan */ + .ch = MFT_CH_1, /* Use MFT id to control fan */ .pgood_gpio = -1, .enable_gpio = GPIO_EN_PP5000_FAN, }; diff --git a/board/agah/fw_config.c b/board/agah/fw_config.c index 7a08e187a6..a16cf10d5a 100644 --- a/board/agah/fw_config.c +++ b/board/agah/fw_config.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -10,7 +10,7 @@ #include "cros_board_info.h" #include "fw_config.h" -#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args) +#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ##args) static union agah_cbi_fw_config fw_config; BUILD_ASSERT(sizeof(fw_config) == sizeof(uint32_t)); diff --git a/board/agah/fw_config.h b/board/agah/fw_config.h index fe9fa24135..7efdae51ac 100644 --- a/board/agah/fw_config.h +++ b/board/agah/fw_config.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -21,9 +21,9 @@ enum ec_cfg_keyboard_backlight_type { union agah_cbi_fw_config { struct { - enum ec_cfg_keyboard_backlight_type kb_bl : 1; - uint32_t audio : 3; - uint32_t reserved_1 : 21; + enum ec_cfg_keyboard_backlight_type kb_bl : 1; + uint32_t audio : 3; + uint32_t reserved_1 : 21; }; uint32_t raw_value; }; diff --git a/board/agah/gpio.inc b/board/agah/gpio.inc index 41a8f2a4d8..a3a6610ac8 100644 --- a/board/agah/gpio.inc +++ b/board/agah/gpio.inc @@ -1,6 +1,6 @@ /* -*- mode:c -*- * - * Copyright 2021 The Chromium OS Authors. All rights reserved. + * Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -27,6 +27,7 @@ GPIO_INT(USB_C2_BC12_INT_ODL, PIN(8, 3), GPIO_INT_FALLING, bc12_inter GPIO_INT(USB_C2_TCPC_INT_ODL, PIN(A, 7), GPIO_INT_FALLING, tcpc_alert_event) GPIO_INT(USB_C2_PPC_INT_ODL, PIN(7, 0), GPIO_INT_FALLING, ppc_interrupt) GPIO_INT(BJ_ADP_PRESENT_ODL, PIN(5, 6), GPIO_INT_BOTH | GPIO_PULL_UP, bj_present_interrupt) +GPIO_INT(GPU_OVERT_ODL, PIN(5, 0), GPIO_INT_BOTH, gpu_overt_interrupt) /* USED GPIOs: */ GPIO(CCD_MODE_ODL, PIN(E, 5), GPIO_INPUT) @@ -54,7 +55,7 @@ GPIO(EC_PCH_RTCRST, PIN(7, 6), GPIO_OUT_LOW) GPIO(EC_PCH_SYS_PWROK, PIN(3, 7), GPIO_OUT_LOW) GPIO(EC_PCH_WAKE_R_ODL, PIN(C, 0), GPIO_ODR_HIGH) GPIO(EC_PROCHOT_ODL, PIN(6, 3), GPIO_ODR_HIGH) -GPIO(EN_PP5000_FAN, PIN(6, 1), GPIO_OUT_HIGH) +GPIO(EN_PP5000_FAN, PIN(6, 1), GPIO_OUT_LOW) GPIO(EN_PP5000_USBA_R, PIN(D, 7), GPIO_OUT_LOW) GPIO(EN_S5_RAILS, PIN(9, 6), GPIO_OUT_LOW) GPIO(IMVP9_VRRDY_OD, PIN(4, 3), GPIO_INPUT) @@ -67,8 +68,15 @@ GPIO(VCCST_PWRGD_OD, PIN(A, 4), GPIO_ODR_LOW) GPIO(EN_USB_A_LOW_POWER, PIN(9, 3), GPIO_OUT_LOW) GPIO(PG_PP3300_S5_EC_SEQ_OD, PIN(B, 5), GPIO_OUT_LOW) GPIO(USB_C2_FRS_EN, PIN(D, 4), GPIO_OUT_LOW) +GPIO(NVIDIA_GPU_ACOFF_ODL, PIN(9, 5), GPIO_ODR_HIGH) +GPIO(LED_2_L, PIN(C, 3), GPIO_OUT_LOW) +GPIO(LED_1_L, PIN(C, 4), GPIO_OUT_LOW) -/* Barreljack */ +/* + * Barrel-jack adapter enable switch. When starting up on a depleted battery, + * we'll be powered by either BJ or USB-C but not both. The EC will detect BJ + * or USBC and disable the other ports. + */ GPIO(EN_PPVAR_BJ_ADP_L, PIN(A, 2), GPIO_OUT_LOW) /* @@ -95,12 +103,10 @@ ALTERNATE(PIN_MASK(4, 0x01), 0, MODULE_PWM, 0) /* GPIO40/TA1 */ ALTERNATE(PIN_MASK(7, 0x08), 0, MODULE_PWM, 0) /* GPIO73/TA2 */ ALTERNATE(PIN_MASK(8, 0x01), 0, MODULE_PWM, 0) /* GPIO80/PWM3 */ ALTERNATE(PIN_MASK(B, 0xC0), 0, MODULE_PWM, 0) /* GPIOB7/PWM5, GPIOB6/PWM4 */ -ALTERNATE(PIN_MASK(C, 0x18), 0, MODULE_PWM, 0) /* GPIOC4/PWM2, GPIOC3/PWM0 */ /* ADC alternate functions */ ALTERNATE(PIN_MASK(3, 0x10), 0, MODULE_ADC, 0) /* GPIO34/PS2_DAT2/ADC6 */ -ALTERNATE(PIN_MASK(4, 0x34), 0, MODULE_ADC, 0) /* GPIO42/ADC3/RI_L, GPIO45/ADC0, GPIO44/ADC1 */ -ALTERNATE(PIN_MASK(E, 0x02), 0, MODULE_ADC, 0) /* GPIOE1/ADC7 */ +ALTERNATE(PIN_MASK(4, 0x36), 0, MODULE_ADC, 0) /* GPIO42/ADC3/RI_L, GPIO45/ADC0, GPIO44/ADC1, GPIO41/ADC4 */ /* KB alternate functions */ ALTERNATE(PIN_MASK(0, 0xf0), 0, MODULE_KB, GPIO_ODR_HIGH) /* KSO10&P80_CLK/GPIO07, KSO11&P80_DAT/GPIO06, KSO12/GPIO05, KSO13/GPIO04 */ @@ -123,9 +129,6 @@ UNUSED(PIN(0, 2)) /* GPIO02 */ UNUSED(PIN(6, 6)) /* GPIO66 */ UNUSED(PIN(5, 7)) /* GPIO57/SER_IRQ/ESPI_ALERT_L */ UNUSED(PIN(8, 1)) /* GPIO81 */ -UNUSED(PIN(9, 5)) /* GPIO95 */ -UNUSED(PIN(7, 3)) /* GPIO73 */ -UNUSED(PIN(4, 1)) /* GPIO41 */ -UNUSED(PIN(5, 0)) /* GPIO50 */ UNUSED(PIN(6, 0)) /* GPIO60 */ UNUSED(PIN(C, 2)) /* GPIOC2 */ +UNUSED(PIN(E, 1)) /* GPIOE1 */ diff --git a/board/agah/i2c.c b/board/agah/i2c.c index dedf3b4c4f..5bdf6936c1 100644 --- a/board/agah/i2c.c +++ b/board/agah/i2c.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,7 +8,7 @@ #include "hooks.h" #include "i2c.h" -#define BOARD_ID_FAST_PLUS_CAPABLE 2 +#define BOARD_ID_FAST_PLUS_CAPABLE 2 /* I2C port map configuration */ const struct i2c_port_t i2c_ports[] = { diff --git a/board/agah/keyboard.c b/board/agah/keyboard.c index d234dfd64e..cb34543db8 100644 --- a/board/agah/keyboard.c +++ b/board/agah/keyboard.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -45,7 +45,6 @@ static const struct ec_response_keybd_config keybd = { .capabilities = KEYBD_CAP_NUMERIC_KEYPAD, }; - __override const struct ec_response_keybd_config * board_vivaldi_keybd_config(void) { diff --git a/board/agah/led.c b/board/agah/led.c index 12a7c3e09f..e16b3df5d6 100644 --- a/board/agah/led.c +++ b/board/agah/led.c @@ -1,83 +1,192 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. - */ - -/* Agah specific PWM LED settings: there are 2 LEDs on each side of the board, - * each one can be controlled separately. The LED colors are white or amber, - * and the default behavior is tied to the charging process: both sides are - * amber while charging the battery and white when the battery is charged. + * + * Battery LED control for Agah */ #include <stdint.h> -#include "common.h" -#include "compile_time_macros.h" +#include "battery.h" +#include "charge_manager.h" +#include "charge_state.h" +#include "chipset.h" #include "ec_commands.h" -#include "led_pwm.h" -#include "pwm.h" -#include "util.h" +#include "gpio.h" +#include "host_command.h" +#include "led_common.h" +#include "task.h" -const enum ec_led_id supported_led_ids[] = { - EC_LED_ID_LEFT_LED, - EC_LED_ID_RIGHT_LED, -}; +#define BAT_LED_ON 0 +#define BAT_LED_OFF 1 + +#define BATT_LOW_BCT 10 + +#define LED_TICK_INTERVAL_MS (500 * MSEC) +#define LED_CYCLE_TIME_MS (2000 * MSEC) +#define LED_TICKS_PER_CYCLE (LED_CYCLE_TIME_MS / LED_TICK_INTERVAL_MS) +#define LED_ON_TIME_MS (1000 * MSEC) +#define LED_ON_TICKS (LED_ON_TIME_MS / LED_TICK_INTERVAL_MS) + +const enum ec_led_id supported_led_ids[] = { EC_LED_ID_BATTERY_LED }; const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); -/* - * We only have a white and an amber LED, so setting any other color results in - * both LEDs being off. Cap at 50% to save power. - */ -struct pwm_led_color_map led_color_map[EC_LED_COLOR_COUNT] = { - /* Amber, White */ - [EC_LED_COLOR_RED] = { 0, 0 }, - [EC_LED_COLOR_GREEN] = { 0, 0 }, - [EC_LED_COLOR_BLUE] = { 0, 0 }, - [EC_LED_COLOR_YELLOW] = { 0, 0 }, - [EC_LED_COLOR_WHITE] = { 0, 50 }, - [EC_LED_COLOR_AMBER] = { 50, 0 }, +enum led_color { + LED_OFF = 0, + LED_AMBER, + LED_WHITE, + LED_COLOR_COUNT /* Number of colors, not a color itself */ }; -/* Two logical LEDs with amber and white channels. */ -struct pwm_led pwm_leds[CONFIG_LED_PWM_COUNT] = { - { - .ch0 = PWM_CH_LED1, - .ch1 = PWM_CH_LED2, - .ch2 = PWM_LED_NO_CHANNEL, - .enable = &pwm_enable, - .set_duty = &pwm_set_duty, - }, -}; +static void led_set_color_battery(enum led_color color) +{ + enum gpio_signal amber_led, white_led; + + amber_led = GPIO_LED_1_L; + white_led = GPIO_LED_2_L; + + switch (color) { + case LED_WHITE: + gpio_set_level(white_led, BAT_LED_ON); + gpio_set_level(amber_led, BAT_LED_OFF); + break; + case LED_AMBER: + gpio_set_level(white_led, BAT_LED_OFF); + gpio_set_level(amber_led, BAT_LED_ON); + break; + case LED_OFF: + gpio_set_level(white_led, BAT_LED_OFF); + gpio_set_level(amber_led, BAT_LED_OFF); + break; + default: + break; + } +} void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) { - memset(brightness_range, '\0', - sizeof(*brightness_range) * EC_LED_COLOR_COUNT); - brightness_range[EC_LED_COLOR_AMBER] = 100; - brightness_range[EC_LED_COLOR_WHITE] = 100; + switch (led_id) { + case EC_LED_ID_BATTERY_LED: + brightness_range[EC_LED_COLOR_WHITE] = 1; + brightness_range[EC_LED_COLOR_AMBER] = 1; + break; + default: + break; + } } int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) { - enum pwm_led_id pwm_id; - - /* Convert ec_led_id to pwm_led_id. */ switch (led_id) { - case EC_LED_ID_LEFT_LED: - pwm_id = PWM_LED0; + case EC_LED_ID_BATTERY_LED: + if (brightness[EC_LED_COLOR_WHITE] != 0) + led_set_color_battery(LED_WHITE); + else if (brightness[EC_LED_COLOR_AMBER] != 0) + led_set_color_battery(LED_AMBER); + else + led_set_color_battery(LED_OFF); break; default: - return EC_ERROR_UNKNOWN; + return EC_ERROR_PARAM1; } - if (brightness[EC_LED_COLOR_WHITE]) - set_pwm_led_color(pwm_id, EC_LED_COLOR_WHITE); - else if (brightness[EC_LED_COLOR_AMBER]) - set_pwm_led_color(pwm_id, EC_LED_COLOR_AMBER); - else - /* Otherwise, the "color" is "off". */ - set_pwm_led_color(pwm_id, -1); - return EC_SUCCESS; } + +/* + * Set active charge port color to the parameter, turn off all others. + * If no port is active (-1), turn off all LEDs. + */ +static void set_active_port_color(enum led_color color) +{ + if (led_auto_control_is_enabled(EC_LED_ID_BATTERY_LED)) + led_set_color_battery(color); +} + +static void led_set_battery(void) +{ + static unsigned int battery_ticks; + static unsigned int suspend_ticks; + + battery_ticks++; + + if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND) && + charge_get_state() != PWR_STATE_CHARGE) { + suspend_ticks++; + + led_set_color_battery( + (suspend_ticks % LED_TICKS_PER_CYCLE < LED_ON_TICKS) ? + LED_WHITE : + LED_OFF); + + return; + } + + switch (charge_get_state()) { + case PWR_STATE_CHARGE: + /* Always indicate when charging, even in suspend. */ + set_active_port_color(LED_AMBER); + break; + case PWR_STATE_DISCHARGE: + /* + * Blinking amber LEDs slowly if battery is lower 10 + * percentage. + */ + if (led_auto_control_is_enabled(EC_LED_ID_BATTERY_LED)) { + if (charge_get_percent() < BATT_LOW_BCT) + led_set_color_battery( + (battery_ticks % LED_TICKS_PER_CYCLE < + LED_ON_TICKS) ? + LED_AMBER : + LED_OFF); + else + led_set_color_battery(LED_OFF); + } + + break; + case PWR_STATE_ERROR: + if (led_auto_control_is_enabled(EC_LED_ID_BATTERY_LED)) { + led_set_color_battery( + (battery_ticks & 0x1) ? LED_AMBER : LED_OFF); + } + + break; + case PWR_STATE_CHARGE_NEAR_FULL: + set_active_port_color(LED_WHITE); + break; + case PWR_STATE_IDLE: /* External power connected in IDLE */ + set_active_port_color(LED_WHITE); + break; + case PWR_STATE_FORCED_IDLE: + set_active_port_color( + (battery_ticks % LED_TICKS_PER_CYCLE < LED_ON_TICKS) ? + LED_AMBER : + LED_OFF); + break; + default: + /* Other states don't alter LED behavior */ + break; + } +} + +void led_task(void *u) +{ + uint32_t start_time; + uint32_t task_duration; + + while (1) { + start_time = get_time().le.lo; + + led_set_battery(); + + /* Compute time for this iteration */ + task_duration = get_time().le.lo - start_time; + /* + * Compute wait time required to for next desired LED tick. If + * the duration exceeds the tick time, then don't sleep. + */ + if (task_duration < LED_TICK_INTERVAL_MS) + usleep(LED_TICK_INTERVAL_MS - task_duration); + } +} diff --git a/board/agah/pwm.c b/board/agah/pwm.c index 1b704bc71e..9fa0f41eff 100644 --- a/board/agah/pwm.c +++ b/board/agah/pwm.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -11,16 +11,6 @@ #include "pwm_chip.h" const struct pwm_t pwm_channels[] = { - [PWM_CH_LED2] = { - .channel = 0, - .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP, - .freq = 4800, - }, - [PWM_CH_LED1] = { - .channel = 2, - .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP, - .freq = 4800, - }, [PWM_CH_KBLIGHT] = { .channel = 3, .flags = 0, @@ -51,10 +41,6 @@ static void board_pwm_init(void) * Turn off all the LEDs. * Turn on the fan at 100%. */ - pwm_enable(PWM_CH_LED1, 1); - pwm_set_duty(PWM_CH_LED1, 0); - pwm_enable(PWM_CH_LED2, 1); - pwm_set_duty(PWM_CH_LED2, 0); pwm_enable(PWM_CH_KBLIGHT, 1); pwm_set_duty(PWM_CH_KBLIGHT, 50); diff --git a/board/agah/sensors.c b/board/agah/sensors.c index b68984c95c..046787872d 100644 --- a/board/agah/sensors.c +++ b/board/agah/sensors.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -19,8 +19,8 @@ struct adc_t adc_channels[] = { .factor_div = ADC_READ_MAX + 1, .shift = 0, }, - [ADC_TEMP_SENSOR_2_AMBIENT] = { - .name = "TEMP_AMBIENT", + [ADC_TEMP_SENSOR_2_GPU] = { + .name = "TEMP_GPU", .input_ch = NPCX_ADC_CH1, .factor_mul = ADC_MAX_VOLT, .factor_div = ADC_READ_MAX + 1, @@ -33,9 +33,16 @@ struct adc_t adc_channels[] = { .factor_div = ADC_READ_MAX + 1, .shift = 0, }, - [ADC_TEMP_SENSOR_4_WWAN] = { - .name = "TEMP_WWAN", - .input_ch = NPCX_ADC_CH7, + [ADC_CHARGER_IADP] = { + .name = "CHARGER_IADP", + .input_ch = NPCX_ADC_CH3, + .factor_mul = ADC_MAX_VOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + }, + [ADC_ADP_TYP] = { + .name = "ADP_TYP", + .input_ch = NPCX_ADC_CH4, .factor_mul = ADC_MAX_VOLT, .factor_div = ADC_READ_MAX + 1, .shift = 0, @@ -51,11 +58,11 @@ const struct temp_sensor_t temp_sensors[] = { .read = get_temp_3v3_30k9_47k_4050b, .idx = ADC_TEMP_SENSOR_1_DDR_SOC, }, - [TEMP_SENSOR_2_AMBIENT] = { - .name = "Ambient", + [TEMP_SENSOR_2_GPU] = { + .name = "GPU", .type = TEMP_SENSOR_TYPE_BOARD, .read = get_temp_3v3_30k9_47k_4050b, - .idx = ADC_TEMP_SENSOR_2_AMBIENT, + .idx = ADC_TEMP_SENSOR_2_GPU, }, [TEMP_SENSOR_3_CHARGER] = { .name = "Charger", @@ -63,17 +70,11 @@ const struct temp_sensor_t temp_sensors[] = { .read = get_temp_3v3_30k9_47k_4050b, .idx = ADC_TEMP_SENSOR_3_CHARGER, }, - [TEMP_SENSOR_4_WWAN] = { - .name = "WWAN", - .type = TEMP_SENSOR_TYPE_BOARD, - .read = get_temp_3v3_30k9_47k_4050b, - .idx = ADC_TEMP_SENSOR_4_WWAN, - }, }; BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); -#define THERMAL_CPU \ - { \ +#define THERMAL_CPU \ + { \ .temp_host = { \ [EC_TEMP_THRESH_HIGH] = C_TO_K(85), \ [EC_TEMP_THRESH_HALT] = C_TO_K(90), \ @@ -86,8 +87,8 @@ BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); } __maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; -#define THERMAL_AMBIENT \ - { \ +#define THERMAL_GPU \ + { \ .temp_host = { \ [EC_TEMP_THRESH_HIGH] = C_TO_K(85), \ [EC_TEMP_THRESH_HALT] = C_TO_K(90), \ @@ -98,8 +99,7 @@ __maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; .temp_fan_off = C_TO_K(35), \ .temp_fan_max = C_TO_K(60), \ } -__maybe_unused static const struct ec_thermal_config thermal_ambient = - THERMAL_AMBIENT; +__maybe_unused static const struct ec_thermal_config thermal_gpu = THERMAL_GPU; /* * Inductor limits - used for both charger and PP3300 regulator @@ -112,8 +112,8 @@ __maybe_unused static const struct ec_thermal_config thermal_ambient = * Inductors: limit of 125c * PCB: limit is 80c */ -#define THERMAL_CHARGER \ - { \ +#define THERMAL_CHARGER \ + { \ .temp_host = { \ [EC_TEMP_THRESH_HIGH] = C_TO_K(105), \ [EC_TEMP_THRESH_HALT] = C_TO_K(120), \ @@ -127,25 +127,9 @@ __maybe_unused static const struct ec_thermal_config thermal_ambient = __maybe_unused static const struct ec_thermal_config thermal_charger = THERMAL_CHARGER; -#define THERMAL_WWAN \ - { \ - .temp_host = { \ - [EC_TEMP_THRESH_HIGH] = C_TO_K(130), \ - [EC_TEMP_THRESH_HALT] = C_TO_K(130), \ - }, \ - .temp_host_release = { \ - [EC_TEMP_THRESH_HIGH] = C_TO_K(100), \ - }, \ - .temp_fan_off = C_TO_K(35), \ - .temp_fan_max = C_TO_K(60), \ - } -__maybe_unused static const struct ec_thermal_config thermal_wwan = - THERMAL_WWAN; - struct ec_thermal_config thermal_params[] = { [TEMP_SENSOR_1_DDR_SOC] = THERMAL_CPU, - [TEMP_SENSOR_2_AMBIENT] = THERMAL_AMBIENT, + [TEMP_SENSOR_2_GPU] = THERMAL_GPU, [TEMP_SENSOR_3_CHARGER] = THERMAL_CHARGER, - [TEMP_SENSOR_4_WWAN] = THERMAL_WWAN, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/agah/usbc_config.c b/board/agah/usbc_config.c index 0902f2f799..a8bad0f121 100644 --- a/board/agah/usbc_config.c +++ b/board/agah/usbc_config.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -14,7 +14,7 @@ #include "console.h" #include "driver/bc12/pi3usb9201_public.h" #include "driver/ppc/syv682x_public.h" -#include "driver/retimer/ps8818.h" +#include "driver/retimer/ps8818_public.h" #include "driver/tcpm/rt1715.h" #include "driver/tcpm/tcpci.h" #include "ec_commands.h" @@ -33,8 +33,8 @@ #include "usb_pd.h" #include "usb_pd_tcpm.h" -#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) -#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) +#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ##args) +#define CPRINTS(format, args...) cprints(CC_USBPD, format, ##args) /* USBC TCPC configuration */ const struct tcpc_config_t tcpc_config[] = { @@ -116,18 +116,17 @@ const static struct ps8818_reg_val equalizer_default_table[] = { #define NUM_EQ_DEFAULT_ARRAY ARRAY_SIZE(equalizer_default_table) -int board_ps8818_mux_set(const struct usb_mux *me, - mux_state_t mux_state) +int board_ps8818_mux_set(const struct usb_mux *me, mux_state_t mux_state) { int rv = EC_SUCCESS; int i; /* USB specific config */ if (mux_state & USB_PD_MUX_USB_ENABLED) { - /* Boost the USB gain */ for (i = 0; i < NUM_EQ_DEFAULT_ARRAY; i++) - rv |= ps8818_i2c_field_update8(me, PS8818_REG_PAGE1, + rv |= ps8818_i2c_field_update8( + me, PS8818_REG_PAGE1, equalizer_default_table[i].reg, equalizer_default_table[i].mask, equalizer_default_table[i].val); @@ -136,36 +135,42 @@ int board_ps8818_mux_set(const struct usb_mux *me, /* DP specific config */ if (mux_state & USB_PD_MUX_DP_ENABLED) { /* Boost the DP gain */ - rv |= ps8818_i2c_field_update8(me, - PS8818_REG_PAGE1, - PS8818_REG1_DPEQ_LEVEL, - PS8818_DPEQ_LEVEL_UP_MASK, - PS8818_DPEQ_LEVEL_UP_19DB); + rv |= ps8818_i2c_field_update8(me, PS8818_REG_PAGE1, + PS8818_REG1_DPEQ_LEVEL, + PS8818_DPEQ_LEVEL_UP_MASK, + PS8818_DPEQ_LEVEL_UP_19DB); } return rv; } -const static struct usb_mux usbc2_ps8818 = { - .usb_port = USBC_PORT_C2, - .i2c_port = I2C_PORT_USB_C2_TCPC, - .i2c_addr_flags = PS8818_I2C_ADDR_FLAGS, - .driver = &ps8818_usb_retimer_driver, - .board_set = &board_ps8818_mux_set, +const static struct usb_mux_chain usbc2_ps8818 = { + .mux = + &(const struct usb_mux){ + .usb_port = USBC_PORT_C2, + .i2c_port = I2C_PORT_USB_C2_TCPC, + .i2c_addr_flags = PS8818_I2C_ADDR_FLAGS, + .driver = &ps8818_usb_retimer_driver, + .board_set = &board_ps8818_mux_set, + }, }; /* USBC mux configuration - Alder Lake includes internal mux */ -const struct usb_mux usb_muxes[] = { +const struct usb_mux_chain usb_muxes[] = { [USBC_PORT_C0] = { - .usb_port = USBC_PORT_C0, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, + .mux = &(const struct usb_mux) { + .usb_port = USBC_PORT_C0, + .driver = &virtual_usb_mux_driver, + .hpd_update = &virtual_hpd_update, + }, }, [USBC_PORT_C2] = { - .usb_port = USBC_PORT_C2, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, - .next_mux = &usbc2_ps8818, + .mux = &(const struct usb_mux) { + .usb_port = USBC_PORT_C2, + .driver = &virtual_usb_mux_driver, + .hpd_update = &virtual_hpd_update, + }, + .next = &usbc2_ps8818, }, }; BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == USBC_PORT_COUNT); @@ -203,8 +208,8 @@ int board_is_vbus_too_low(int port, enum chg_ramp_vbus_state ramp_state) } if (voltage < BC12_MIN_VOLTAGE) { - CPRINTS("%s: port %d: vbus %d lower than %d", __func__, - port, voltage, BC12_MIN_VOLTAGE); + CPRINTS("%s: port %d: vbus %d lower than %d", __func__, port, + voltage, BC12_MIN_VOLTAGE); return 1; } @@ -215,7 +220,7 @@ int board_is_vbus_too_low(int port, enum chg_ramp_vbus_state ramp_state) void board_reset_pd_mcu(void) { - /* There's no reset pin on TCPC */ + /* There's no reset pin on TCPC */ } static void board_tcpc_init(void) diff --git a/board/agah/usbc_config.h b/board/agah/usbc_config.h index e5b7576d72..e353263f5f 100644 --- a/board/agah/usbc_config.h +++ b/board/agah/usbc_config.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,13 +8,9 @@ #ifndef __CROS_EC_USBC_CONFIG_H #define __CROS_EC_USBC_CONFIG_H -#define CONFIG_USB_PD_PORT_MAX_COUNT 2 +#define CONFIG_USB_PD_PORT_MAX_COUNT 2 -enum usbc_port { - USBC_PORT_C0 = 0, - USBC_PORT_C2, - USBC_PORT_COUNT -}; +enum usbc_port { USBC_PORT_C0 = 0, USBC_PORT_C2, USBC_PORT_COUNT }; struct ps8818_reg_val { uint8_t reg; |