diff options
Diffstat (limited to 'board/ambassador')
| -rw-r--r-- | board/ambassador/board.c | 191 | ||||
| -rw-r--r-- | board/ambassador/board.h | 108 | ||||
| -rw-r--r-- | board/ambassador/build.mk | 2 | ||||
| -rw-r--r-- | board/ambassador/ec.tasklist | 2 | ||||
| -rw-r--r-- | board/ambassador/gpio.inc | 6 | ||||
| -rw-r--r-- | board/ambassador/led.c | 14 | ||||
| -rw-r--r-- | board/ambassador/usb_pd_policy.c | 7 |
7 files changed, 153 insertions, 177 deletions
diff --git a/board/ambassador/board.c b/board/ambassador/board.c index 5cf319bc79..f2bc7557ec 100644 --- a/board/ambassador/board.c +++ b/board/ambassador/board.c @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -45,8 +45,8 @@ #include "usbc_ppc.h" #include "util.h" -#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args) +#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ##args) static void power_monitor(void); DECLARE_DEFERRED(power_monitor); @@ -88,8 +88,8 @@ uint16_t tcpc_get_alert_status(void) } /* Called when the charge manager has switched to a new port. */ -void board_set_charge_limit(int port, int supplier, int charge_ma, - int max_ma, int charge_mv) +void board_set_charge_limit(int port, int supplier, int charge_ma, int max_ma, + int charge_mv) { /* Blink alert if insufficient power per system_can_boot_ap(). */ int insufficient_power = @@ -105,14 +105,14 @@ static int32_t base_5v_power; * Power usage for each port as measured or estimated. * Units are milliwatts (5v x ma current) */ -#define PWR_BASE_LOAD (5*1335) -#define PWR_FRONT_HIGH (5*1603) -#define PWR_FRONT_LOW (5*963) -#define PWR_REAR (5*1075) -#define PWR_HDMI (5*562) -#define PWR_C_HIGH (5*3740) -#define PWR_C_LOW (5*2090) -#define PWR_MAX (5*10000) +#define PWR_BASE_LOAD (5 * 1335) +#define PWR_FRONT_HIGH (5 * 1603) +#define PWR_FRONT_LOW (5 * 963) +#define PWR_REAR (5 * 1075) +#define PWR_HDMI (5 * 562) +#define PWR_C_HIGH (5 * 3740) +#define PWR_C_LOW (5 * 2090) +#define PWR_MAX (5 * 10000) /* * Update the 5V power usage, assuming no throttling, @@ -185,16 +185,14 @@ static const struct { int current; } bj_power[] = { { /* 0 - 65W (also default) */ - .voltage = 19000, - .current = 3420 - }, + .voltage = 19000, + .current = 3420 }, { /* 1 - 90W */ - .voltage = 19000, - .current = 4740 - }, + .voltage = 19000, + .current = 4740 }, }; -#define ADP_DEBOUNCE_MS 1000 /* Debounce time for BJ plug/unplug */ +#define ADP_DEBOUNCE_MS 1000 /* Debounce time for BJ plug/unplug */ /* Debounced connection state of the barrel jack */ static int8_t adp_connected = -1; static void adp_connect_deferred(void) @@ -239,27 +237,25 @@ static void adp_state_init(void) } DECLARE_HOOK(HOOK_INIT, adp_state_init, HOOK_PRIO_INIT_CHARGE_MANAGER + 1); - #include "gpio_list.h" /* Must come after other header files. */ /******************************************************************************/ /* SPI devices */ -const struct spi_device_t spi_devices[] = { -}; +const struct spi_device_t spi_devices[] = {}; const unsigned int spi_devices_used = ARRAY_SIZE(spi_devices); /******************************************************************************/ /* PWM channels. Must be in the exactly same order as in enum pwm_channel. */ const struct pwm_t pwm_channels[] = { - [PWM_CH_FAN] = { .channel = 5, - .flags = PWM_CONFIG_OPEN_DRAIN, - .freq = 25000}, - [PWM_CH_LED_RED] = { .channel = 0, - .flags = PWM_CONFIG_DSLEEP, - .freq = 2000 }, - [PWM_CH_LED_WHITE] = { .channel = 2, - .flags = PWM_CONFIG_DSLEEP, - .freq = 2000 }, + [PWM_CH_FAN] = { .channel = 5, + .flags = PWM_CONFIG_OPEN_DRAIN, + .freq = 25000 }, + [PWM_CH_LED_RED] = { .channel = 0, + .flags = PWM_CONFIG_DSLEEP, + .freq = 2000 }, + [PWM_CH_LED_WHITE] = { .channel = 2, + .flags = PWM_CONFIG_DSLEEP, + .freq = 2000 }, }; /******************************************************************************/ @@ -275,52 +271,44 @@ const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = { .flags = TCPC_FLAGS_RESET_ACTIVE_HIGH, }, }; -const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { +const struct usb_mux_chain usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { [USB_PD_PORT_TCPC_0] = { - .usb_port = USB_PD_PORT_TCPC_0, - .driver = &anx7447_usb_mux_driver, - .hpd_update = &anx7447_tcpc_update_hpd_status, + .mux = &(const struct usb_mux) { + .usb_port = USB_PD_PORT_TCPC_0, + .driver = &anx7447_usb_mux_driver, + .hpd_update = &anx7447_tcpc_update_hpd_status, + }, }, }; /******************************************************************************/ /* I2C port map configuration */ const struct i2c_port_t i2c_ports[] = { - { - .name = "ina", - .port = I2C_PORT_INA, - .kbps = 400, - .scl = GPIO_I2C0_SCL, - .sda = GPIO_I2C0_SDA - }, - { - .name = "ppc0", - .port = I2C_PORT_PPC0, - .kbps = 400, - .scl = GPIO_I2C1_SCL, - .sda = GPIO_I2C1_SDA - }, - { - .name = "tcpc0", - .port = I2C_PORT_TCPC0, - .kbps = 400, - .scl = GPIO_I2C3_SCL, - .sda = GPIO_I2C3_SDA - }, - { - .name = "power", - .port = I2C_PORT_POWER, - .kbps = 400, - .scl = GPIO_I2C5_SCL, - .sda = GPIO_I2C5_SDA - }, - { - .name = "eeprom", - .port = I2C_PORT_EEPROM, - .kbps = 400, - .scl = GPIO_I2C7_SCL, - .sda = GPIO_I2C7_SDA - }, + { .name = "ina", + .port = I2C_PORT_INA, + .kbps = 400, + .scl = GPIO_I2C0_SCL, + .sda = GPIO_I2C0_SDA }, + { .name = "ppc0", + .port = I2C_PORT_PPC0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA }, + { .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 400, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA }, + { .name = "power", + .port = I2C_PORT_POWER, + .kbps = 400, + .scl = GPIO_I2C5_SCL, + .sda = GPIO_I2C5_SDA }, + { .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 400, + .scl = GPIO_I2C7_SCL, + .sda = GPIO_I2C7_SDA }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); @@ -376,15 +364,14 @@ BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); /******************************************************************************/ /* Wake up pins */ -const enum gpio_signal hibernate_wake_pins[] = { -}; +const enum gpio_signal hibernate_wake_pins[] = {}; const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); /******************************************************************************/ /* Physical fans. These are logically separate from pwm_channels. */ const struct fan_conf fan_conf_0 = { .flags = FAN_USE_RPM_MODE, - .ch = MFT_CH_0, /* Use MFT id to control fan */ + .ch = MFT_CH_0, /* Use MFT id to control fan */ .pgood_gpio = -1, .enable_gpio = -1, }; @@ -403,7 +390,7 @@ BUILD_ASSERT(ARRAY_SIZE(fans) == FAN_CH_COUNT); /******************************************************************************/ /* MFT channels. These are logically separate from pwm_channels. */ const struct mft_t mft_channels[] = { - [MFT_CH_0] = {NPCX_MFT_MODULE_2, TCKC_LFCLK, PWM_CH_FAN}, + [MFT_CH_0] = { NPCX_MFT_MODULE_2, TCKC_LFCLK, PWM_CH_FAN }, }; BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT); @@ -412,8 +399,8 @@ BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT); /* * TODO(b/202062363): Remove when clang is fixed. */ -#define THERMAL_A \ - { \ +#define THERMAL_A \ + { \ .temp_host = { \ [EC_TEMP_THRESH_WARN] = 0, \ [EC_TEMP_THRESH_HIGH] = C_TO_K(78), \ @@ -432,8 +419,8 @@ __maybe_unused static const struct ec_thermal_config thermal_a = THERMAL_A; /* * TODO(b/202062363): Remove when clang is fixed. */ -#define THERMAL_B \ - { \ +#define THERMAL_B \ + { \ .temp_host = { \ [EC_TEMP_THRESH_WARN] = 0, \ [EC_TEMP_THRESH_HIGH] = C_TO_K(78), \ @@ -535,16 +522,13 @@ static void board_chipset_startup(void) if (ppc_is_sourcing_vbus(0)) ppc_vbus_source_enable(0, 1); } -DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_chipset_startup, - HOOK_PRIO_DEFAULT); +DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_chipset_startup, HOOK_PRIO_DEFAULT); /******************************************************************************/ /* USB-C PPC Configuration */ struct ppc_config_t ppc_chips[CONFIG_USB_PD_PORT_MAX_COUNT] = { - [USB_PD_PORT_TCPC_0] = { - .i2c_port = I2C_PORT_PPC0, - .i2c_addr_flags = SN5S330_ADDR0_FLAGS, - .drv = &sn5s330_drv - }, + [USB_PD_PORT_TCPC_0] = { .i2c_port = I2C_PORT_PPC0, + .i2c_addr_flags = SN5S330_ADDR0_FLAGS, + .drv = &sn5s330_drv }, }; unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); @@ -577,14 +561,12 @@ static void board_tcpc_init(void) /* * By default configured as output low. */ - gpio_set_flags(GPIO_USB_A4_OC_ODL, - GPIO_INPUT | GPIO_INT_BOTH); + gpio_set_flags(GPIO_USB_A4_OC_ODL, GPIO_INPUT | GPIO_INT_BOTH); gpio_enable_interrupt(GPIO_USB_A4_OC_ODL); } else { /* Ensure no interrupts from pin */ gpio_disable_interrupt(GPIO_USB_A4_OC_ODL); } - } /* Make sure this is called after fw_config is initialised */ DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C + 2); @@ -703,8 +685,8 @@ void board_enable_s0_rails(int enable) unsigned int ec_config_get_bj_power(void) { - unsigned int bj = - (fw_config & EC_CFG_BJ_POWER_MASK) >> EC_CFG_BJ_POWER_L; + unsigned int bj = (fw_config & EC_CFG_BJ_POWER_MASK) >> + EC_CFG_BJ_POWER_L; /* Out of range value defaults to 0 */ if (bj >= ARRAY_SIZE(bj_power)) bj = 0; @@ -779,23 +761,23 @@ DECLARE_HOOK(HOOK_INIT, setup_thermal, HOOK_PRIO_DEFAULT - 1); * * All measurements are in milliwatts. */ -#define THROT_TYPE_A BIT(0) -#define THROT_TYPE_C BIT(1) -#define THROT_PROCHOT BIT(2) +#define THROT_TYPE_A BIT(0) +#define THROT_TYPE_C BIT(1) +#define THROT_PROCHOT BIT(2) /* * Power gain if front USB A ports are limited. */ -#define POWER_GAIN_TYPE_A 3200 +#define POWER_GAIN_TYPE_A 3200 /* * Power gain if Type C port is limited. */ -#define POWER_GAIN_TYPE_C 8800 +#define POWER_GAIN_TYPE_C 8800 /* * Power is averaged over 10 ms, with a reading every 2 ms. */ -#define POWER_DELAY_MS 2 -#define POWER_READINGS (10/POWER_DELAY_MS) +#define POWER_DELAY_MS 2 +#define POWER_READINGS (10 / POWER_DELAY_MS) static void power_monitor(void) { @@ -810,8 +792,7 @@ static void power_monitor(void) * If CPU is off or suspended, no need to throttle * or restrict power. */ - if (chipset_in_state(CHIPSET_STATE_ANY_OFF | - CHIPSET_STATE_SUSPEND)) { + if (chipset_in_state(CHIPSET_STATE_ANY_OFF | CHIPSET_STATE_SUSPEND)) { /* * Slow down monitoring, assume no throttling required. */ @@ -839,7 +820,7 @@ static void power_monitor(void) */ power = (adc_read_channel(ADC_VBUS) * adc_read_channel(ADC_PPVAR_IMON)) / - 1000; + 1000; /* Init power table */ if (history[0] == 0) { for (i = 0; i < POWER_READINGS; i++) @@ -866,8 +847,7 @@ static void power_monitor(void) * For barrel-jack supplies, the rating can be * exceeded briefly, so use the average. */ - if (charge_manager_get_supplier() == - CHARGE_SUPPLIER_PD) + if (charge_manager_get_supplier() == CHARGE_SUPPLIER_PD) power = max; else power = total / POWER_READINGS; @@ -959,8 +939,9 @@ static void power_monitor(void) gpio_set_level(GPIO_EC_PROCHOT_ODL, prochot); } if (diff & THROT_TYPE_C) { - enum tcpc_rp_value rp = (new_state & THROT_TYPE_C) - ? TYPEC_RP_1A5 : TYPEC_RP_3A0; + enum tcpc_rp_value rp = (new_state & THROT_TYPE_C) ? + TYPEC_RP_1A5 : + TYPEC_RP_3A0; ppc_set_vbus_source_current_limit(0, rp); tcpm_select_rp_value(0, rp); diff --git a/board/ambassador/board.h b/board/ambassador/board.h index c6aac262c5..fb9659bda7 100644 --- a/board/ambassador/board.h +++ b/board/ambassador/board.h @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -12,8 +12,8 @@ #define CONFIG_UART_TX_BUF_SIZE 4096 /* NPCX7 config */ -#define NPCX7_PWM1_SEL 0 /* GPIO C2 is not used as PWM1. */ -#define NPCX_UART_MODULE2 1 /* GPIO64/65 are used as UART pins. */ +#define NPCX7_PWM1_SEL 0 /* GPIO C2 is not used as PWM1. */ +#define NPCX_UART_MODULE2 1 /* GPIO64/65 are used as UART pins. */ /* Internal SPI flash on NPCX796FC is 512 kB */ #define CONFIG_FLASH_SIZE_BYTES (512 * 1024) @@ -40,7 +40,7 @@ #undef CONFIG_HIBERNATE #define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_LED_COMMON -#undef CONFIG_LID_SWITCH +#undef CONFIG_LID_SWITCH #define CONFIG_LTO #define CONFIG_PWM #define CONFIG_VBOOT_EFS2 @@ -85,7 +85,7 @@ #define CONFIG_CPU_PROCHOT_ACTIVE_LOW /* Dedicated barreljack charger port */ -#undef CONFIG_DEDICATED_CHARGE_PORT_COUNT +#undef CONFIG_DEDICATED_CHARGE_PORT_COUNT #define CONFIG_DEDICATED_CHARGE_PORT_COUNT 1 #define DEDICATED_CHARGE_PORT 1 @@ -104,15 +104,15 @@ #define CONFIG_INA3221 /* b/143501304 */ -#define PD_POWER_SUPPLY_TURN_ON_DELAY 4000 /* us */ -#define PD_POWER_SUPPLY_TURN_OFF_DELAY 2000 /* us */ +#define PD_POWER_SUPPLY_TURN_ON_DELAY 4000 /* us */ +#define PD_POWER_SUPPLY_TURN_OFF_DELAY 2000 /* us */ #undef CONFIG_USBC_VCONN_SWAP_DELAY_US -#define CONFIG_USBC_VCONN_SWAP_DELAY_US 8000 /* us */ +#define CONFIG_USBC_VCONN_SWAP_DELAY_US 8000 /* us */ -#define PD_OPERATING_POWER_MW CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON -#define PD_MAX_POWER_MW 100000 -#define PD_MAX_CURRENT_MA 5000 -#define PD_MAX_VOLTAGE_MV 20000 +#define PD_OPERATING_POWER_MW CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON +#define PD_MAX_POWER_MW 100000 +#define PD_MAX_CURRENT_MA 5000 +#define PD_MAX_VOLTAGE_MV 20000 /* Fan and temp. */ #define CONFIG_FANS 1 @@ -136,7 +136,7 @@ #define CONFIG_USB_PD_DECODE_SOP #undef CONFIG_USB_CHARGER #define CONFIG_USB_POWER_DELIVERY -#define CONFIG_USB_PID 0x5040 +#define CONFIG_USB_PID 0x5040 #define CONFIG_USB_PD_ALT_MODE #define CONFIG_USB_PD_ALT_MODE_DFP #define CONFIG_USB_PD_DISCHARGE_PPC @@ -156,7 +156,7 @@ #define CONFIG_USBC_VCONN #define CONFIG_USBC_VCONN_SWAP -#define USB_PD_PORT_TCPC_0 0 +#define USB_PD_PORT_TCPC_0 0 #define BOARD_TCPC_C0_RESET_HOLD_DELAY ANX74XX_RESET_HOLD_MS #define BOARD_TCPC_C0_RESET_POST_DELAY ANX74XX_RESET_HOLD_MS @@ -168,12 +168,12 @@ /* I2C Bus Configuration */ #define CONFIG_I2C #define CONFIG_I2C_CONTROLLER -#define I2C_PORT_INA NPCX_I2C_PORT0_0 -#define I2C_PORT_PPC0 NPCX_I2C_PORT1_0 -#define I2C_PORT_TCPC0 NPCX_I2C_PORT3_0 -#define I2C_PORT_POWER NPCX_I2C_PORT5_0 -#define I2C_PORT_EEPROM NPCX_I2C_PORT7_0 -#define I2C_ADDR_EEPROM_FLAGS 0x50 +#define I2C_PORT_INA NPCX_I2C_PORT0_0 +#define I2C_PORT_PPC0 NPCX_I2C_PORT1_0 +#define I2C_PORT_TCPC0 NPCX_I2C_PORT3_0 +#define I2C_PORT_POWER NPCX_I2C_PORT5_0 +#define I2C_PORT_EEPROM NPCX_I2C_PORT7_0 +#define I2C_ADDR_EEPROM_FLAGS 0x50 #define PP5000_PGOOD_POWER_SIGNAL_MASK POWER_SIGNAL_MASK(PP5000_A_PGOOD) @@ -191,11 +191,11 @@ enum charge_port { }; enum adc_channel { - ADC_SNS_PP3300, /* ADC2 */ - ADC_SNS_PP1050, /* ADC7 */ - ADC_VBUS, /* ADC4 */ - ADC_PPVAR_IMON, /* ADC9 */ - ADC_TEMP_SENSOR_1, /* ADC0 */ + ADC_SNS_PP3300, /* ADC2 */ + ADC_SNS_PP1050, /* ADC7 */ + ADC_VBUS, /* ADC4 */ + ADC_PPVAR_IMON, /* ADC9 */ + ADC_TEMP_SENSOR_1, /* ADC0 */ /* Number of ADC channels */ ADC_CH_COUNT }; @@ -220,11 +220,7 @@ enum mft_channel { MFT_CH_COUNT, }; -enum temp_sensor_id { - TEMP_SENSOR_CORE, - TEMP_SENSOR_COUNT -}; - +enum temp_sensor_id { TEMP_SENSOR_CORE, TEMP_SENSOR_COUNT }; /* Board specific handlers */ void board_reset_pd_mcu(void); @@ -238,20 +234,20 @@ void show_critical_error(void); /* * Barrel-jack power (4 bits). */ -#define EC_CFG_BJ_POWER_L 0 -#define EC_CFG_BJ_POWER_H 3 +#define EC_CFG_BJ_POWER_L 0 +#define EC_CFG_BJ_POWER_H 3 #define EC_CFG_BJ_POWER_MASK GENMASK(EC_CFG_BJ_POWER_H, EC_CFG_BJ_POWER_L) /* * USB Connector 4 not present (1 bit). */ -#define EC_CFG_NO_USB4_L 4 -#define EC_CFG_NO_USB4_H 4 +#define EC_CFG_NO_USB4_L 4 +#define EC_CFG_NO_USB4_H 4 #define EC_CFG_NO_USB4_MASK GENMASK(EC_CFG_NO_USB4_H, EC_CFG_NO_USB4_L) /* * Thermal solution config (3 bits). */ -#define EC_CFG_THERMAL_L 5 -#define EC_CFG_THERMAL_H 7 +#define EC_CFG_THERMAL_L 5 +#define EC_CFG_THERMAL_H 7 #define EC_CFG_THERMAL_MASK GENMASK(EC_CFG_THERMAL_H, EC_CFG_THERMAL_L) unsigned int ec_config_get_bj_power(void); @@ -261,30 +257,30 @@ unsigned int ec_config_get_thermal_solution(void); #endif /* !__ASSEMBLER__ */ /* Pin renaming */ -#define GPIO_WP_L GPIO_EC_WP_ODL -#define GPIO_PP5000_A_PG_OD GPIO_PG_PP5000_A_OD -#define GPIO_EN_PP5000 GPIO_EN_PP5000_A -#define GPIO_RECOVERY_L GPIO_EC_RECOVERY_BTN_ODL -#define GPIO_RECOVERY_L_2 GPIO_H1_EC_RECOVERY_BTN_ODL -#define GPIO_POWER_BUTTON_L GPIO_H1_EC_PWR_BTN_ODL -#define GPIO_PCH_WAKE_L GPIO_EC_PCH_WAKE_ODL -#define GPIO_PCH_PWRBTN_L GPIO_EC_PCH_PWR_BTN_ODL -#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW -#define GPIO_SYS_RESET_L GPIO_SYS_RST_ODL -#define GPIO_PCH_RSMRST_L GPIO_EC_PCH_RSMRST_L -#define GPIO_CPU_PROCHOT GPIO_EC_PROCHOT_ODL -#define GPIO_PCH_RTCRST GPIO_EC_PCH_RTCRST -#define GPIO_PCH_SYS_PWROK GPIO_EC_PCH_SYS_PWROK -#define GPIO_PCH_SLP_S0_L GPIO_SLP_S0_L -#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L -#define GPIO_PCH_SLP_S4_L GPIO_SLP_S4_L -#define GPIO_TEMP_SENSOR_POWER GPIO_EN_ROA_RAILS -#define GPIO_AC_PRESENT GPIO_BJ_ADP_PRESENT_L +#define GPIO_WP_L GPIO_EC_WP_ODL +#define GPIO_PP5000_A_PG_OD GPIO_PG_PP5000_A_OD +#define GPIO_EN_PP5000 GPIO_EN_PP5000_A +#define GPIO_RECOVERY_L GPIO_EC_RECOVERY_BTN_ODL +#define GPIO_RECOVERY_L_2 GPIO_H1_EC_RECOVERY_BTN_ODL +#define GPIO_POWER_BUTTON_L GPIO_H1_EC_PWR_BTN_ODL +#define GPIO_PCH_WAKE_L GPIO_EC_PCH_WAKE_ODL +#define GPIO_PCH_PWRBTN_L GPIO_EC_PCH_PWR_BTN_ODL +#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW +#define GPIO_SYS_RESET_L GPIO_SYS_RST_ODL +#define GPIO_PCH_RSMRST_L GPIO_EC_PCH_RSMRST_L +#define GPIO_CPU_PROCHOT GPIO_EC_PROCHOT_ODL +#define GPIO_PCH_RTCRST GPIO_EC_PCH_RTCRST +#define GPIO_PCH_SYS_PWROK GPIO_EC_PCH_SYS_PWROK +#define GPIO_PCH_SLP_S0_L GPIO_SLP_S0_L +#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L +#define GPIO_PCH_SLP_S4_L GPIO_SLP_S4_L +#define GPIO_TEMP_SENSOR_POWER GPIO_EN_ROA_RAILS +#define GPIO_AC_PRESENT GPIO_BJ_ADP_PRESENT_L /* * There is no RSMRST input, so alias it to the output. This short-circuits * common_intel_x86_handle_rsmrst. */ -#define GPIO_PG_EC_RSMRST_ODL GPIO_PCH_RSMRST_L +#define GPIO_PG_EC_RSMRST_ODL GPIO_PCH_RSMRST_L #endif /* __CROS_EC_BOARD_H */ diff --git a/board/ambassador/build.mk b/board/ambassador/build.mk index 0f55c45f77..f9096c64ff 100644 --- a/board/ambassador/build.mk +++ b/board/ambassador/build.mk @@ -1,5 +1,5 @@ # -*- makefile -*- -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. # diff --git a/board/ambassador/ec.tasklist b/board/ambassador/ec.tasklist index f820cf903c..42b9542d96 100644 --- a/board/ambassador/ec.tasklist +++ b/board/ambassador/ec.tasklist @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/board/ambassador/gpio.inc b/board/ambassador/gpio.inc index 871031ebf9..46b6118ce2 100644 --- a/board/ambassador/gpio.inc +++ b/board/ambassador/gpio.inc @@ -1,6 +1,6 @@ /* -*- mode:c -*- * - * Copyright 2020 The Chromium OS Authors. All rights reserved. + * Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -25,12 +25,12 @@ GPIO_INT(PG_VPRIM_CORE_A_OD, PIN(2, 3), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(PG_PP1050_A_OD, PIN(2, 2), GPIO_INT_BOTH, power_signal_interrupt) /* EC output, but also interrupt so this can be polled as a power signal */ GPIO_INT(EC_PCH_RSMRST_L, PIN(A, 6), GPIO_OUTPUT | GPIO_INT_F_RISING | GPIO_INT_F_FALLING, power_signal_interrupt) -#ifndef CONFIG_HOSTCMD_ESPI_VW_SLP_S4 +#ifndef CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S4 GPIO_INT(SLP_S4_L, PIN(D, 4), GPIO_INT_BOTH, power_signal_interrupt) #endif GPIO_INT(PG_PP2500_DRAM_U_OD, PIN(2, 0), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(PG_PP1200_U_OD, PIN(2, 1), GPIO_INT_BOTH, power_signal_interrupt) -#ifndef CONFIG_HOSTCMD_ESPI_VW_SLP_S3 +#ifndef CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S3 GPIO_INT(SLP_S3_L, PIN(A, 5), GPIO_INT_BOTH, slp_s3_interrupt) #endif GPIO_INT(PG_PP950_VCCIO_OD, PIN(1, 7), GPIO_INT_BOTH, power_signal_interrupt) diff --git a/board/ambassador/led.c b/board/ambassador/led.c index 659a63a483..3baf867580 100644 --- a/board/ambassador/led.c +++ b/board/ambassador/led.c @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -19,16 +19,16 @@ #include "timer.h" #include "util.h" -#define CPRINTS(format, args...) cprints(CC_GPIO, format, ## args) +#define CPRINTS(format, args...) cprints(CC_GPIO, format, ##args) /* * Due to the CSME-Lite processing, upon startup the CPU transitions through * S0->S3->S5->S3->S0, causing the LED to turn on/off/on, so * delay turning off the LED during suspend/shutdown. */ -#define LED_CPU_DELAY_MS (2000 * MSEC) +#define LED_CPU_DELAY_MS (2000 * MSEC) -const enum ec_led_id supported_led_ids[] = {EC_LED_ID_POWER_LED}; +const enum ec_led_id supported_led_ids[] = { EC_LED_ID_POWER_LED }; const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); enum led_color { @@ -89,9 +89,9 @@ static int set_color(enum ec_led_id id, enum led_color color, int duty) } } -#define LED_PULSE_US (2 * SECOND) +#define LED_PULSE_US (2 * SECOND) /* 40 msec for nice and smooth transition. */ -#define LED_PULSE_TICK_US (40 * MSEC) +#define LED_PULSE_TICK_US (40 * MSEC) /* When pulsing is enabled, brightness is incremented by <duty_inc> every * <interval> usec from 0 to 100% in LED_PULSE_US usec. Then it's decremented @@ -216,7 +216,7 @@ void show_critical_error(void) set_color(EC_LED_ID_POWER_LED, LED_RED, 100); } -static int command_led(int argc, char **argv) +static int command_led(int argc, const char **argv) { enum ec_led_id id = EC_LED_ID_POWER_LED; diff --git a/board/ambassador/usb_pd_policy.c b/board/ambassador/usb_pd_policy.c index 5bc754453a..fbb4edf23e 100644 --- a/board/ambassador/usb_pd_policy.c +++ b/board/ambassador/usb_pd_policy.c @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -19,9 +19,8 @@ #include "usbc_ppc.h" #include "util.h" -#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) -#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) - +#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ##args) +#define CPRINTS(format, args...) cprints(CC_USBPD, format, ##args) int pd_check_vconn_swap(int port) { |