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-rw-r--r--board/anahera/battery.c94
-rw-r--r--board/anahera/board.c63
-rw-r--r--board/anahera/board.h199
-rw-r--r--board/anahera/build.mk25
l---------board/anahera/charger.c1
-rw-r--r--board/anahera/ec.tasklist28
-rw-r--r--board/anahera/fans.c46
-rw-r--r--board/anahera/fw_config.c55
-rw-r--r--board/anahera/fw_config.h55
-rw-r--r--board/anahera/gpio.inc149
-rw-r--r--board/anahera/i2c.c70
-rw-r--r--board/anahera/keyboard.c75
-rw-r--r--board/anahera/led.c244
-rw-r--r--board/anahera/pwm.c31
-rw-r--r--board/anahera/sensors.c145
-rw-r--r--board/anahera/usbc_config.c299
-rw-r--r--board/anahera/usbc_config.h19
-rw-r--r--board/anahera/vif_override.xml3
18 files changed, 0 insertions, 1601 deletions
diff --git a/board/anahera/battery.c b/board/anahera/battery.c
deleted file mode 100644
index 95ca9be206..0000000000
--- a/board/anahera/battery.c
+++ /dev/null
@@ -1,94 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- *
- * Battery pack vendor provided charging profile
- */
-
-#include "battery_fuel_gauge.h"
-#include "common.h"
-#include "compile_time_macros.h"
-
-/*
- * Battery info for all Anahera battery types. Note that the fields
- * start_charging_min/max and charging_min/max are not used for the charger.
- * The effective temperature limits are given by discharging_min/max_c.
- *
- * Fuel Gauge (FG) parameters which are used for determining if the battery
- * is connected, the appropriate ship mode (battery cutoff) command, and the
- * charge/discharge FETs status.
- *
- * Ship mode (battery cutoff) requires 2 writes to the appropriate smart battery
- * register. For some batteries, the charge/discharge FET bits are set when
- * charging/discharging is active, in other types, these bits set mean that
- * charging/discharging is disabled. Therefore, in addition to the mask for
- * these bits, a disconnect value must be specified. Note that for TI fuel
- * gauge, the charge/discharge FET status is found in Operation Status (0x54),
- * but a read of Manufacturer Access (0x00) will return the lower 16 bits of
- * Operation status which contains the FET status bits.
- *
- * The assumption for battery types supported is that the charge/discharge FET
- * status can be read with a sb_read() command and therefore, only the register
- * address, mask, and disconnect value need to be provided.
- */
-const struct board_batt_params board_battery_info[] = {
- /* 996QA193H Simplo HIGHPOWER Battery Information */
- [BATTERY_SIMPLO_HIGHPOWER] = {
- .fuel_gauge = {
- .manuf_name = "333-1D-11-A",
- .ship_mode = {
- .reg_addr = 0x0,
- .reg_data = { 0x0010, 0x0010 },
- },
- .fet = {
- .mfgacc_support = 1,
- .reg_addr = 0x0,
- .reg_mask = 0x0006,
- .disconnect_val = 0x0,
- },
- },
- .batt_info = {
- .voltage_max = 13200, /* mV */
- .voltage_normal = 11550, /* mV */
- .voltage_min = 9000, /* mV */
- .precharge_current = 256, /* mA */
- .start_charging_min_c = 0,
- .start_charging_max_c = 45,
- .charging_min_c = 0,
- .charging_max_c = 45,
- .discharging_min_c = -20,
- .discharging_max_c = 60,
- },
- },
- /* B00C407792D0001 CosMX Battery Information */
- [BATTERY_COSMX] = {
- .fuel_gauge = {
- .manuf_name = "333-AC-11-A",
- .ship_mode = {
- .reg_addr = 0x0,
- .reg_data = { 0x0010, 0x0010 },
- },
- .fet = {
- .mfgacc_support = 1,
- .reg_addr = 0x0,
- .reg_mask = 0x0006,
- .disconnect_val = 0x0,
- },
- },
- .batt_info = {
- .voltage_max = 13200, /* mV */
- .voltage_normal = 11550, /* mV */
- .voltage_min = 9000, /* mV */
- .precharge_current = 256, /* mA */
- .start_charging_min_c = 0,
- .start_charging_max_c = 45,
- .charging_min_c = 0,
- .charging_max_c = 45,
- .discharging_min_c = -10,
- .discharging_max_c = 60,
- },
- },
-};
-BUILD_ASSERT(ARRAY_SIZE(board_battery_info) == BATTERY_TYPE_COUNT);
-
-const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_SIMPLO_HIGHPOWER;
diff --git a/board/anahera/board.c b/board/anahera/board.c
deleted file mode 100644
index c1de2df6ac..0000000000
--- a/board/anahera/board.c
+++ /dev/null
@@ -1,63 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#include "battery.h"
-#include "button.h"
-#include "charge_ramp.h"
-#include "charger.h"
-#include "common.h"
-#include "compile_time_macros.h"
-#include "console.h"
-#include "gpio.h"
-#include "gpio_signal.h"
-#include "hooks.h"
-#include "fw_config.h"
-#include "hooks.h"
-#include "lid_switch.h"
-#include "peripheral_charger.h"
-#include "power_button.h"
-#include "power.h"
-#include "registers.h"
-#include "switch.h"
-#include "throttle_ap.h"
-#include "usbc_config.h"
-
-#include "gpio_list.h" /* Must come after other header files. */
-
-/* Console output macros */
-#define CPRINTF(format, args...) cprintf(CC_CHARGER, format, ## args)
-#define CPRINTS(format, args...) cprints(CC_CHARGER, format, ## args)
-
-/******************************************************************************/
-/* USB-A charging control */
-
-const int usb_port_enable[USB_PORT_COUNT] = {
- GPIO_EN_PP5000_USBA_R,
-};
-BUILD_ASSERT(ARRAY_SIZE(usb_port_enable) == USB_PORT_COUNT);
-
-/******************************************************************************/
-
-/* Called on AP S3 -> S0 transition */
-static void board_chipset_resume(void)
-{
- /* Allow keyboard backlight to be enabled */
- gpio_set_level(GPIO_EC_KB_BL_EN, 1);
-}
-DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_chipset_resume, HOOK_PRIO_DEFAULT);
-
-/* Called on AP S0 -> S3 transition */
-static void board_chipset_suspend(void)
-{
- /* Turn off the keyboard backlight if it's on. */
- gpio_set_level(GPIO_EC_KB_BL_EN, 0);
-}
-DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT);
-
-enum battery_present battery_hw_present(void)
-{
- /* The GPIO is low when the battery is physically present */
- return gpio_get_level(GPIO_EC_BATT_PRES_ODL) ? BP_NO : BP_YES;
-}
diff --git a/board/anahera/board.h b/board/anahera/board.h
deleted file mode 100644
index c2a2c09796..0000000000
--- a/board/anahera/board.h
+++ /dev/null
@@ -1,199 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Anahera board configuration */
-
-#ifndef __CROS_EC_BOARD_H
-#define __CROS_EC_BOARD_H
-
-#include "compile_time_macros.h"
-
-/* Baseboard features */
-#include "baseboard.h"
-
-/*
- * This will happen automatically on NPCX9 ES2 and later. Do not remove
- * until we can confirm all earlier chips are out of service.
- */
-#define CONFIG_HIBERNATE_PSL_VCC1_RST_WAKEUP
-
-/* Sensors */
-#undef CONFIG_TABLET_MODE
-#undef CONFIG_TABLET_MODE_SWITCH
-#undef CONFIG_GMR_TABLET_MODE
-
-/* USB Type A Features */
-#define USB_PORT_COUNT 1
-#define CONFIG_USB_PORT_POWER_DUMB
-
-/* USB Type C and USB PD defines */
-#define CONFIG_USB_PD_REQUIRE_AP_MODE_ENTRY
-
-#define CONFIG_IO_EXPANDER
-#define CONFIG_IO_EXPANDER_NCT38XX
-#define CONFIG_IO_EXPANDER_PORT_COUNT 2
-
-#define CONFIG_USBC_RETIMER_INTEL_BB
-
-#define CONFIG_USBC_PPC_SYV682X
-#define CONFIG_USBC_PPC_NX20P3483
-
-/* TODO: b/193452481 - measure and check these values on redrix */
-#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */
-#define PD_POWER_SUPPLY_TURN_OFF_DELAY 30000 /* us */
-#define PD_VCONN_SWAP_DELAY 5000 /* us */
-
-/*
- * Passive USB-C cables only support up to 60W.
- */
-#define PD_OPERATING_POWER_MW 15000
-#define PD_MAX_POWER_MW 60000
-#define PD_MAX_CURRENT_MA 3000
-#define PD_MAX_VOLTAGE_MV 20000
-
-/*
- * Macros for GPIO signals used in common code that don't match the
- * schematic names. Signal names in gpio.inc match the schematic and are
- * then redefined here to so it's more clear which signal is being used for
- * which purpose.
- */
-#define GPIO_AC_PRESENT GPIO_ACOK_OD
-#define GPIO_CPU_PROCHOT GPIO_EC_PROCHOT_ODL
-#define GPIO_EC_INT_L GPIO_EC_PCH_INT_ODL
-#define GPIO_ENABLE_BACKLIGHT GPIO_EC_EN_EDP_BL
-#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW
-#define GPIO_KBD_KSO2 GPIO_EC_KSO_02_INV
-#define GPIO_PACKET_MODE_EN GPIO_EC_GSC_PACKET_MODE
-#define GPIO_PCH_PWRBTN_L GPIO_EC_PCH_PWR_BTN_ODL
-#define GPIO_PCH_RSMRST_L GPIO_EC_PCH_RSMRST_L
-#define GPIO_PCH_RTCRST GPIO_EC_PCH_RTCRST
-#define GPIO_PCH_SLP_S0_L GPIO_SYS_SLP_S0IX_L
-#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L
-
-/*
- * GPIO_EC_PCH_INT_ODL is used for MKBP events as well as a PCH wakeup
- * signal.
- */
-#define GPIO_PCH_WAKE_L GPIO_EC_PCH_INT_ODL
-#define GPIO_PG_EC_ALL_SYS_PWRGD GPIO_SEQ_EC_ALL_SYS_PG
-#define GPIO_PG_EC_DSW_PWROK GPIO_SEQ_EC_DSW_PWROK
-#define GPIO_PG_EC_RSMRST_ODL GPIO_SEQ_EC_RSMRST_ODL
-#define GPIO_POWER_BUTTON_L GPIO_GSC_EC_PWR_BTN_ODL
-#define GPIO_RSMRST_L_PGOOD GPIO_SEQ_EC_RSMRST_ODL
-#define GPIO_SYS_RESET_L GPIO_SYS_RST_ODL
-#define GPIO_VOLUME_DOWN_L GPIO_EC_VOLDN_BTN_ODL
-#define GPIO_VOLUME_UP_L GPIO_EC_VOLUP_BTN_ODL
-#define GPIO_WP_L GPIO_EC_WP_ODL
-
-/* System has back-lit keyboard */
-#define CONFIG_PWM_KBLIGHT
-
-/* I2C Bus Configuration */
-#define I2C_PORT_USB_C0_TCPC NPCX_I2C_PORT1_0
-#define I2C_PORT_USB_C1_TCPC NPCX_I2C_PORT4_1
-
-#define I2C_PORT_USB_C0_PPC NPCX_I2C_PORT2_0
-#define I2C_PORT_USB_C1_PPC NPCX_I2C_PORT6_1
-
-#define I2C_PORT_USB_C0_BC12 NPCX_I2C_PORT2_0
-#define I2C_PORT_USB_C1_BC12 NPCX_I2C_PORT6_1
-
-#define I2C_PORT_USB_C0_MUX NPCX_I2C_PORT3_0
-#define I2C_PORT_USB_C1_MUX NPCX_I2C_PORT6_1
-
-#define I2C_PORT_BATTERY NPCX_I2C_PORT5_0
-#define I2C_PORT_CHARGER NPCX_I2C_PORT7_0
-#define I2C_PORT_EEPROM NPCX_I2C_PORT7_0
-
-#define I2C_ADDR_EEPROM_FLAGS 0x50
-
-/*
- * see b/174768555#comment22
- */
-#define USBC_PORT_C0_BB_RETIMER_I2C_ADDR 0x56
-#define USBC_PORT_C1_BB_RETIMER_I2C_ADDR 0x58
-
-/* Enabling Thunderbolt-compatible mode */
-#define CONFIG_USB_PD_TBT_COMPAT_MODE
-
-/* Enabling USB4 mode */
-#define CONFIG_USB_PD_USB4
-
-/* Retimer */
-#define CONFIG_USBC_RETIMER_FW_UPDATE
-
-/* Thermal features */
-#define CONFIG_THERMISTOR
-#define CONFIG_TEMP_SENSOR
-#define CONFIG_TEMP_SENSOR_POWER_GPIO GPIO_SEQ_EC_DSW_PWROK
-#define CONFIG_STEINHART_HART_3V3_30K9_47K_4050B
-
-/* Fan features */
-#define CONFIG_FANS FAN_CH_COUNT
-
-/* Charger defines */
-#define CONFIG_CHARGER_BQ25720
-#define CONFIG_CHARGER_BQ25720_VSYS_TH2_DV 70
-#define CONFIG_CHARGE_RAMP_HW
-#define CONFIG_CHARGER_SENSE_RESISTOR 10
-#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10
-
-/* Keyboard features */
-#define CONFIG_KEYBOARD_VIVALDI
-#define CONFIG_KEYBOARD_REFRESH_ROW3
-
-#ifndef __ASSEMBLER__
-
-#include "gpio_signal.h" /* needed by registers.h */
-#include "registers.h"
-#include "usbc_config.h"
-
-enum adc_channel {
- ADC_TEMP_SENSOR_1_DDR,
- ADC_TEMP_SENSOR_2_SOC,
- ADC_TEMP_SENSOR_3_CHARGER,
- ADC_TEMP_SENSOR_4_REGULATOR,
- ADC_CH_COUNT
-};
-
-enum temp_sensor_id {
- TEMP_SENSOR_1_DDR,
- TEMP_SENSOR_2_SOC,
- TEMP_SENSOR_3_CHARGER,
- TEMP_SENSOR_4_REGULATOR,
- TEMP_SENSOR_COUNT
-};
-
-enum ioex_port {
- IOEX_C0_NCT38XX = 0,
- IOEX_C1_NCT38XX,
- IOEX_PORT_COUNT
-};
-
-enum battery_type {
- BATTERY_SIMPLO_HIGHPOWER,
- BATTERY_COSMX,
- BATTERY_TYPE_COUNT
-};
-
-enum pwm_channel {
- PWM_CH_KBLIGHT = 0, /* PWM3 */
- PWM_CH_FAN, /* PWM5 */
- PWM_CH_COUNT
-};
-
-enum fan_channel {
- FAN_CH_0 = 0,
- FAN_CH_COUNT
-};
-
-enum mft_channel {
- MFT_CH_0 = 0,
- MFT_CH_COUNT
-};
-
-#endif /* !__ASSEMBLER__ */
-
-#endif /* __CROS_EC_BOARD_H */
diff --git a/board/anahera/build.mk b/board/anahera/build.mk
deleted file mode 100644
index ebfbe57fdc..0000000000
--- a/board/anahera/build.mk
+++ /dev/null
@@ -1,25 +0,0 @@
-# -*- makefile -*-
-# Copyright 2021 The Chromium OS Authors. All rights reserved.
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-#
-# Anahera board specific files build
-#
-
-CHIP:=npcx
-CHIP_FAMILY:=npcx9
-CHIP_VARIANT:=npcx9m3f
-BASEBOARD:=brya
-
-board-y=
-board-y+=battery.o
-board-y+=board.o
-board-y+=charger.o
-board-y+=fans.o
-board-y+=fw_config.o
-board-y+=i2c.o
-board-y+=keyboard.o
-board-y+=led.o
-board-y+=pwm.o
-board-y+=sensors.o
-board-y+=usbc_config.o
diff --git a/board/anahera/charger.c b/board/anahera/charger.c
deleted file mode 120000
index 476ce97df2..0000000000
--- a/board/anahera/charger.c
+++ /dev/null
@@ -1 +0,0 @@
-../../baseboard/brya/charger_bq25720.c \ No newline at end of file
diff --git a/board/anahera/ec.tasklist b/board/anahera/ec.tasklist
deleted file mode 100644
index 5cf454d4c2..0000000000
--- a/board/anahera/ec.tasklist
+++ /dev/null
@@ -1,28 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/*
- * See CONFIG_TASK_LIST in config.h for details.
- *
- * USB_CHG_Px tasks must be contiguous (see USB_CHG_PORT_TO_TASK_ID(x)).
- * PD_Cx tasks must be contiguous (see PD_PORT_TO_TASK_ID(x))
- */
-
-#define CONFIG_TASK_LIST \
- TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \
- TASK_ALWAYS(LED, led_task, NULL, TASK_STACK_SIZE) \
- TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, TASK_STACK_SIZE) \
- TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 0, TASK_STACK_SIZE) \
- TASK_ALWAYS(CHARGER, charger_task, NULL, VENTI_TASK_STACK_SIZE) \
- TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \
- TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \
- TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \
- TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \
- TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \
- TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \
- TASK_ALWAYS(PD_C0, pd_task, NULL, VENTI_TASK_STACK_SIZE) \
- TASK_ALWAYS(PD_C1, pd_task, NULL, VENTI_TASK_STACK_SIZE) \
- TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, TASK_STACK_SIZE) \
- TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, TASK_STACK_SIZE)
diff --git a/board/anahera/fans.c b/board/anahera/fans.c
deleted file mode 100644
index c177df5578..0000000000
--- a/board/anahera/fans.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Physical fans. These are logically separate from pwm_channels. */
-
-#include "common.h"
-#include "compile_time_macros.h"
-#include "console.h"
-#include "fan_chip.h"
-#include "fan.h"
-#include "hooks.h"
-#include "pwm.h"
-
-/* MFT channels. These are logically separate from pwm_channels. */
-const struct mft_t mft_channels[] = {
- [MFT_CH_0] = {
- .module = NPCX_MFT_MODULE_1,
- .clk_src = TCKC_LFCLK,
- .pwm_id = PWM_CH_FAN,
- },
-};
-BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT);
-
-static const struct fan_conf fan_conf_0 = {
- .flags = FAN_USE_RPM_MODE,
- .ch = MFT_CH_0, /* Use MFT id to control fan */
- .pgood_gpio = -1,
- .enable_gpio = GPIO_EN_PP5000_FAN,
-};
-
-/* TOOD(b/193487913): need to update for real fan */
-static const struct fan_rpm fan_rpm_0 = {
- .rpm_min = 2200,
- .rpm_start = 2200,
- .rpm_max = 7200,
-};
-
-const struct fan_t fans[FAN_CH_COUNT] = {
- [FAN_CH_0] = {
- .conf = &fan_conf_0,
- .rpm = &fan_rpm_0,
- },
-};
-
diff --git a/board/anahera/fw_config.c b/board/anahera/fw_config.c
deleted file mode 100644
index e59688b17d..0000000000
--- a/board/anahera/fw_config.c
+++ /dev/null
@@ -1,55 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#include "common.h"
-#include "compile_time_macros.h"
-#include "console.h"
-#include "cros_board_info.h"
-#include "fw_config.h"
-
-#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args)
-
-static union redrix_cbi_fw_config fw_config;
-BUILD_ASSERT(sizeof(fw_config) == sizeof(uint32_t));
-
-/*
- * FW_CONFIG defaults for redrix if the CBI.FW_CONFIG data is not
- * initialized.
- */
-static const union redrix_cbi_fw_config fw_config_defaults = {
- .kb_bl = KEYBOARD_BACKLIGHT_ENABLED,
-};
-
-/****************************************************************************
- * Redrix FW_CONFIG access
- */
-void board_init_fw_config(void)
-{
- if (cbi_get_fw_config(&fw_config.raw_value)) {
- CPRINTS("CBI: Read FW_CONFIG failed, using board defaults");
- fw_config = fw_config_defaults;
- }
-
- if (get_board_id() == 0) {
- /*
- * Early boards have a zero'd out FW_CONFIG, so replace
- * it with a sensible default value.
- */
- if (fw_config.raw_value == 0) {
- CPRINTS("CBI: FW_CONFIG is zero, using board defaults");
- fw_config = fw_config_defaults;
- }
- }
-}
-
-union redrix_cbi_fw_config get_fw_config(void)
-{
- return fw_config;
-}
-
-bool ec_cfg_has_eps(void)
-{
- return (fw_config.eps == EPS_ENABLED);
-}
diff --git a/board/anahera/fw_config.h b/board/anahera/fw_config.h
deleted file mode 100644
index 6480f07b35..0000000000
--- a/board/anahera/fw_config.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#ifndef __BOARD_BRYA_FW_CONFIG_H_
-#define __BOARD_BRYA_FW_CONFIG_H_
-
-#include <stdint.h>
-
-/****************************************************************************
- * CBI FW_CONFIG layout for Redrix board.
- *
- * Source of truth is the project/brya/redrix/config.star configuration file.
- */
-
-enum ec_cfg_keyboard_backlight_type {
- KEYBOARD_BACKLIGHT_DISABLED = 0,
- KEYBOARD_BACKLIGHT_ENABLED = 1
-};
-
-enum ec_cfg_eps_type {
- EPS_DISABLED = 0,
- EPS_ENABLED = 1
-};
-
-union redrix_cbi_fw_config {
- struct {
- uint32_t sd_db : 2;
- enum ec_cfg_keyboard_backlight_type kb_bl : 1;
- uint32_t audio : 3;
- uint32_t lte_db : 2;
- uint32_t ufc : 2;
- enum ec_cfg_eps_type eps : 1;
- uint32_t reserved_1 : 21;
- };
- uint32_t raw_value;
-};
-
-/**
- * Read the cached FW_CONFIG. Guaranteed to have valid values.
- *
- * @return the FW_CONFIG for the board.
- */
-union redrix_cbi_fw_config get_fw_config(void);
-
-/**
- * Check if the FW_CONFIG has enabled privacy screen.
- *
- * @return true if board supports privacy screen, false if the board
- * doesn't support it.
- */
-bool ec_cfg_has_eps(void);
-
-#endif /* __BOARD_BRYA_FW_CONFIG_H_ */
diff --git a/board/anahera/gpio.inc b/board/anahera/gpio.inc
deleted file mode 100644
index ceb5087bd4..0000000000
--- a/board/anahera/gpio.inc
+++ /dev/null
@@ -1,149 +0,0 @@
-/* -*- mode:c -*-
- *
- * Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#define MODULE_KB MODULE_KEYBOARD_SCAN
-
-/* INTERRUPT GPIOs: */
-GPIO_INT(ACOK_OD, PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, extpower_interrupt)
-GPIO_INT(EC_PROCHOT_IN_L, PIN(F, 0), GPIO_INT_BOTH, throttle_ap_prochot_input_interrupt)
-GPIO_INT(EC_VOLDN_BTN_ODL, PIN(9, 3), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt)
-GPIO_INT(EC_VOLUP_BTN_ODL, PIN(9, 7), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt)
-GPIO_INT(EC_WP_ODL, PIN(A, 1), GPIO_INT_BOTH, switch_interrupt)
-GPIO_INT(GSC_EC_PWR_BTN_ODL, PIN(0, 1), GPIO_INT_BOTH | GPIO_HIB_WAKE_LOW, power_button_interrupt)
-GPIO_INT(LID_OPEN, PIN(D, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, lid_interrupt)
-GPIO_INT(SEQ_EC_ALL_SYS_PG, PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(SEQ_EC_DSW_PWROK, PIN(C, 7), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(SEQ_EC_RSMRST_ODL, PIN(E, 2), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(SLP_S3_L, PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(SLP_SUS_L, PIN(F, 1), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(SYS_SLP_S0IX_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(USB_C0_BC12_INT_ODL, PIN(C, 6), GPIO_INT_FALLING, bc12_interrupt)
-GPIO_INT(USB_C0_TCPC_INT_ODL, PIN(E, 0), GPIO_INT_FALLING, tcpc_alert_event)
-GPIO_INT(USB_C0_PPC_INT_ODL, PIN(6, 2), GPIO_INT_FALLING, ppc_interrupt)
-GPIO_INT(USB_C0_RT_INT_ODL, PIN(B, 1), GPIO_INT_FALLING, retimer_interrupt)
-GPIO_INT(USB_C1_TCPC_INT_ODL, PIN(A, 2), GPIO_INT_FALLING, tcpc_alert_event)
-GPIO_INT(USB_C1_BC12_INT_ODL, PIN(8, 3), GPIO_INT_FALLING, bc12_interrupt)
-GPIO_INT(USB_C1_PPC_INT_ODL, PIN(7, 0), GPIO_INT_FALLING, ppc_interrupt)
-GPIO_INT(USB_C1_RT_INT_ODL, PIN(4, 1), GPIO_INT_FALLING, retimer_interrupt)
-
-/* USED GPIOs: */
-GPIO(CCD_MODE_ODL, PIN(E, 5), GPIO_INPUT)
-GPIO(CHARGER_VAP_OTG_EN, PIN(9, 6), GPIO_OUT_LOW)
-GPIO(CPU_C10_GATE_L, PIN(6, 7), GPIO_INPUT)
-GPIO(EC_BATT_PRES_ODL, PIN(A, 3), GPIO_INPUT)
-GPIO(EC_ENTERING_RW, PIN(0, 3), GPIO_OUT_LOW)
-GPIO(EC_EN_EDP_BL, PIN(D, 3), GPIO_OUT_HIGH)
-GPIO(EC_GSC_PACKET_MODE, PIN(7, 5), GPIO_OUT_LOW)
-GPIO(EC_I2C_BAT_SCL, PIN(3, 3), GPIO_INPUT)
-GPIO(EC_I2C_BAT_SDA, PIN(3, 6), GPIO_INPUT)
-GPIO(EC_I2C_MISC_SCL_R, PIN(B, 3), GPIO_INPUT)
-GPIO(EC_I2C_MISC_SDA_R, PIN(B, 2), GPIO_INPUT)
-GPIO(EC_I2C_USB_C0_PPC_BC_SCL, PIN(9, 2), GPIO_INPUT)
-GPIO(EC_I2C_USB_C0_PPC_BC_SDA, PIN(9, 1), GPIO_INPUT)
-GPIO(EC_I2C_USB_C0_RT_SCL, PIN(D, 1), GPIO_INPUT)
-GPIO(EC_I2C_USB_C0_RT_SDA, PIN(D, 0), GPIO_INPUT)
-GPIO(EC_I2C_USB_C0_TCPC_SCL, PIN(9, 0), GPIO_INPUT)
-GPIO(EC_I2C_USB_C0_TCPC_SDA, PIN(8, 7), GPIO_INPUT)
-GPIO(EC_I2C_USB_C1_MIX_SCL, PIN(E, 4), GPIO_INPUT)
-GPIO(EC_I2C_USB_C1_MIX_SDA, PIN(E, 3), GPIO_INPUT)
-GPIO(EC_I2C_USB_C1_TCPC_SCL, PIN(F, 3), GPIO_INPUT)
-GPIO(EC_I2C_USB_C1_TCPC_SDA, PIN(F, 2), GPIO_INPUT)
-GPIO(EC_KB_BL_EN, PIN(8, 6), GPIO_OUT_LOW)
-GPIO(EC_PCHHOT_ODL, PIN(7, 4), GPIO_INPUT)
-GPIO(EC_PCH_INT_ODL, PIN(B, 0), GPIO_ODR_HIGH)
-GPIO(EC_PCH_PWR_BTN_ODL, PIN(C, 1), GPIO_ODR_HIGH)
-GPIO(EC_PCH_RSMRST_L, PIN(A, 6), GPIO_OUT_LOW)
-GPIO(EC_PCH_RTCRST, PIN(7, 6), GPIO_OUT_LOW)
-GPIO(EC_PCH_SYS_PWROK, PIN(3, 7), GPIO_OUT_LOW)
-GPIO(EC_PCH_WAKE_R_ODL, PIN(C, 0), GPIO_ODR_HIGH)
-GPIO(EC_PROCHOT_ODL, PIN(6, 3), GPIO_ODR_HIGH)
-GPIO(EN_PP5000_FAN, PIN(6, 1), GPIO_OUT_HIGH)
-GPIO(EN_PP5000_USBA_R, PIN(D, 7), GPIO_OUT_LOW)
-GPIO(EN_S5_RAILS, PIN(B, 6), GPIO_OUT_LOW)
-GPIO(IMVP9_VRRDY_OD, PIN(4, 3), GPIO_INPUT)
-GPIO(PCH_PWROK, PIN(7, 2), GPIO_OUT_LOW)
-GPIO(SYS_RST_ODL, PIN(C, 5), GPIO_ODR_HIGH)
-GPIO(USB_C0_TCPC_RST_ODL, PIN(A, 7), GPIO_ODR_LOW)
-GPIO(USB_C1_TCPC_RST_ODL, PIN(A, 0), GPIO_ODR_LOW)
-GPIO(VCCST_PWRGD_OD, PIN(A, 4), GPIO_ODR_LOW)
-
-/* LED */
-GPIO(C0_CHARGE_LED_AMBER_L, PIN(C, 4), GPIO_OUT_HIGH) /* Amber C0 port */
-GPIO(C0_CHARGE_LED_WHITE_L, PIN(C, 3), GPIO_OUT_HIGH) /* White C0 port */
-GPIO(C1_CHARGE_LED_AMBER_L, PIN(5, 7), GPIO_OUT_HIGH) /* Amber C1 port */
-GPIO(C1_CHARGE_LED_WHITE_L, PIN(9, 4), GPIO_OUT_HIGH) /* White C1 port */
-GPIO(PWR_LED_WHITE_L, PIN(C, 2), GPIO_OUT_HIGH) /* Power LED */
-
-/* UART alternate functions */
-ALTERNATE(PIN_MASK(6, 0x30), 0, MODULE_UART, 0) /* GPIO64/CR_SIN1, GPO65/CR_SOUT1/FLPRG1_L */
-
-/* I2C alternate functions */
-ALTERNATE(PIN_MASK(3, 0x48), 0, MODULE_I2C, 0) /* GPIO33/I2C5_SCL0/CTS_L, GPIO36/RTS_L/I2C5_SDA0 */
-ALTERNATE(PIN_MASK(8, 0x80), 0, MODULE_I2C, 0) /* GPIO87/I2C1_SDA0 */
-ALTERNATE(PIN_MASK(9, 0x07), 0, MODULE_I2C, 0) /* GPIO92/I2C2_SCL0, GPIO91/I2C2_SDA0, GPIO90/I2C1_SCL0 */
-ALTERNATE(PIN_MASK(B, 0x0c), 0, MODULE_I2C, 0) /* GPIOB3/I2C7_SCL0/DCD_L, GPIOB2/I2C7_SDA0/DSR_L */
-ALTERNATE(PIN_MASK(D, 0x03), 0, MODULE_I2C, 0) /* GPIOD1/I2C3_SCL0, GPIOD0/I2C3_SDA0 */
-ALTERNATE(PIN_MASK(E, 0x18), 0, MODULE_I2C, 0) /* GPIOE4/I2C6_SCL1/I3C_SCL, GPIOE3/I2C6_SDA1/I3C_SDA */
-ALTERNATE(PIN_MASK(F, 0x0c), 0, MODULE_I2C, 0) /* GPIOF3/I2C4_SCL1, GPIOF2/I2C4_SDA1 */
-
-/* PWM alternate functions */
-ALTERNATE(PIN_MASK(4, 0x01), 0, MODULE_PWM, 0) /* GPIO40/TA1 */
-ALTERNATE(PIN_MASK(7, 0x08), 0, MODULE_PWM, 0) /* GPIO73/TA2 */
-ALTERNATE(PIN_MASK(8, 0x01), 0, MODULE_PWM, 0) /* GPIO80/PWM3 */
-ALTERNATE(PIN_MASK(B, 0x80), 0, MODULE_PWM, 0) /* GPIOB7/PWM5 */
-
-/* ADC alternate functions */
-ALTERNATE(PIN_MASK(3, 0x10), 0, MODULE_ADC, 0) /* GPIO34/PS2_DAT2/ADC6 */
-ALTERNATE(PIN_MASK(4, 0x34), 0, MODULE_ADC, 0) /* GPIO42/ADC3/RI_L, GPIO45/ADC0, GPIO44/ADC1 */
-ALTERNATE(PIN_MASK(E, 0x02), 0, MODULE_ADC, 0) /* GPIOE1/ADC7 */
-
-/* KB alternate functions */
-ALTERNATE(PIN_MASK(0, 0xf0), 0, MODULE_KB, GPIO_ODR_HIGH) /* KSO10&P80_CLK/GPIO07, KSO11&P80_DAT/GPIO06, KSO12/GPIO05, KSO13/GPIO04 */
-ALTERNATE(PIN_MASK(1, 0x7f), 0, MODULE_KB, GPIO_ODR_HIGH) /* KSO06/GPO13/GP_SEL_L, KSO07/GPO12/JEN_L, KSO03/GPIO16/JTAG_TDO0_SWO, KSO04/GPIO15/XNOR, KSO05/GPIO14, KSO08/GPIO11/CR_SOUT1, KSO09/GPIO10/CR_SIN1 */
-ALTERNATE(PIN_MASK(2, 0xfc), 0, MODULE_KB, GPIO_INPUT | GPIO_PULL_UP) /* KSI2/GPIO27/TRACEDATA1, KSI3/GPIO26/TRACEDATA0, KSI4/GPIO25/TRACECLK/GP_SCLK, KSI5/GPIO24/GP_MISO, KSI6/GPIO23/S_SBUB, KSI7/GPIO22/S_SBUA */
-ALTERNATE(PIN_MASK(2, 0x03), 0, MODULE_KB, GPIO_ODR_HIGH) /* KSO00/GPIO21/JTAG_TCK_SWCLK, KSO01/GPIO20/JTAG_TMS_SWIO */
-ALTERNATE(PIN_MASK(3, 0x03), 0, MODULE_KB, GPIO_INPUT | GPIO_PULL_UP) /* KSI0/GPIO31/TRACEDATA3/GP_MOSI, KSI1/GPIO30/TRACEDATA2/GP_CS_L */
-ALTERNATE(PIN_MASK(8, 0x04), 0, MODULE_KB, GPIO_ODR_HIGH) /* KSO14/GPIO82 */
-
-/* PMU alternate functions */
-ALTERNATE(PIN_MASK(0, 0x01), 0, MODULE_PMU, GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH) /* PSL_IN2_L&GPI00/GPIO00 */
-ALTERNATE(PIN_MASK(0, 0x02), 0, MODULE_PMU, GPIO_INT_BOTH | GPIO_HIB_WAKE_LOW) /* GPIO01/PSL_IN3_L&GPI01 */
-ALTERNATE(PIN_MASK(D, 0x04), 0, MODULE_PMU, GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH) /* PSL_IN1_L&GPID2/GPIOD2 */
-
-/* Unused Pins */
-UNUSED(PIN(D, 6)) /* GPOD6/CR_SOUT3/SHDF_ESPI_L */
-UNUSED(PIN(3, 2)) /* GPO32/TRIS_L */
-UNUSED(PIN(3, 5)) /* GPO35/CR_SOUT4/TEST_L */
-UNUSED(PIN(6, 6)) /* GPO66/ARM_L_x86 */
-UNUSED(PIN(0, 2)) /* GPIO02/PSL_IN4 */
-UNUSED(PIN(5, 0)) /* GPIO50 */
-UNUSED(PIN(5, 6)) /* GPIO56/CLKRUN_L */
-UNUSED(PIN(6, 0)) /* GPIO60/PWM7 */
-UNUSED(PIN(7, 3)) /* GPIO73/TA2 */
-UNUSED(PIN(8, 1)) /* GPIO81/PECI_DATA */
-UNUSED(PIN(9, 5)) /* GPIO95/SPIP_MISO */
-UNUSED(PIN(B, 4)) /* GPIOB4/I2C0_SDA0 */
-UNUSED(PIN(B, 5)) /* GPIOB5/I2C0_SCL0 */
-UNUSED(PIN(D, 4)) /* GPIOD4/CR_SIN3 */
-UNUSED(PIN(F, 5)) /* GPIOF5/I2C5_SCL1 */
-
-/* Pre-configured PSL balls: J8 K6 */
-
-/*
- * The NPCX keyboard driver does not use named GPIOs to access
- * keyboard scan pins, so we do not list them in *gpio.inc. However, when
- * KEYBOARD_COL2_INVERTED is defined, this name is required.
- */
-GPIO(EC_KSO_02_INV, PIN(1, 7), GPIO_OUT_LOW)
-
-IOEX(USB_C0_OC_ODL, EXPIN(IOEX_C0_NCT38XX, 0, 4), GPIO_ODR_HIGH)
-IOEX(USB_C0_FRS_EN, EXPIN(IOEX_C0_NCT38XX, 0, 6), GPIO_LOW)
-IOEX(USB_C0_RT_RST_ODL, EXPIN(IOEX_C0_NCT38XX, 0, 7), GPIO_ODR_LOW)
-
-IOEX(USB_C1_OC_ODL, EXPIN(IOEX_C1_NCT38XX, 0, 4), GPIO_ODR_HIGH)
-IOEX(USB_C1_FRS_EN, EXPIN(IOEX_C1_NCT38XX, 0, 6), GPIO_LOW)
-IOEX(USB_C1_RT_RST_ODL, EXPIN(IOEX_C1_NCT38XX, 0, 7), GPIO_ODR_LOW)
diff --git a/board/anahera/i2c.c b/board/anahera/i2c.c
deleted file mode 100644
index 74208f4575..0000000000
--- a/board/anahera/i2c.c
+++ /dev/null
@@ -1,70 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#include "common.h"
-#include "compile_time_macros.h"
-
-#include "i2c.h"
-
-/* I2C port map configuration */
-const struct i2c_port_t i2c_ports[] = {
- {
- /* I2C1 */
- .name = "tcpc0",
- .port = I2C_PORT_USB_C0_TCPC,
- .kbps = 1000,
- .scl = GPIO_EC_I2C_USB_C0_TCPC_SCL,
- .sda = GPIO_EC_I2C_USB_C0_TCPC_SDA,
- },
- {
- /* I2C2 */
- .name = "ppc0",
- .port = I2C_PORT_USB_C0_PPC,
- .kbps = 1000,
- .scl = GPIO_EC_I2C_USB_C0_PPC_BC_SCL,
- .sda = GPIO_EC_I2C_USB_C0_PPC_BC_SDA,
- },
- {
- /* I2C3 */
- .name = "retimer0",
- .port = I2C_PORT_USB_C0_MUX,
- .kbps = 1000,
- .scl = GPIO_EC_I2C_USB_C0_RT_SCL,
- .sda = GPIO_EC_I2C_USB_C0_RT_SDA,
- },
- {
- /* I2C4 C1 TCPC */
- .name = "tcpc1",
- .port = I2C_PORT_USB_C1_TCPC,
- .kbps = 400,
- .scl = GPIO_EC_I2C_USB_C1_TCPC_SCL,
- .sda = GPIO_EC_I2C_USB_C1_TCPC_SDA,
- },
- {
- /* I2C5 */
- .name = "battery",
- .port = I2C_PORT_BATTERY,
- .kbps = 100,
- .scl = GPIO_EC_I2C_BAT_SCL,
- .sda = GPIO_EC_I2C_BAT_SDA,
- },
- {
- /* I2C6 */
- .name = "ppc1,retimer1",
- .port = I2C_PORT_USB_C1_PPC,
- .kbps = 400,
- .scl = GPIO_EC_I2C_USB_C1_MIX_SCL,
- .sda = GPIO_EC_I2C_USB_C1_MIX_SDA,
- },
- {
- /* I2C7 */
- .name = "eeprom",
- .port = I2C_PORT_EEPROM,
- .kbps = 400,
- .scl = GPIO_EC_I2C_MISC_SCL_R,
- .sda = GPIO_EC_I2C_MISC_SDA_R,
- },
-};
-const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
diff --git a/board/anahera/keyboard.c b/board/anahera/keyboard.c
deleted file mode 100644
index 90506163d9..0000000000
--- a/board/anahera/keyboard.c
+++ /dev/null
@@ -1,75 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#include "common.h"
-#include "ec_commands.h"
-#include "fw_config.h"
-#include "keyboard_scan.h"
-#include "timer.h"
-
-/* Keyboard scan setting */
-__override struct keyboard_scan_config keyscan_config = {
- /* Increase from 50 us, because KSO_02 passes through the H1. */
- .output_settle_us = 80,
- /* Other values should be the same as the default configuration. */
- .debounce_down_us = 9 * MSEC,
- .debounce_up_us = 30 * MSEC,
- .scan_period_us = 3 * MSEC,
- .min_post_scan_delay_us = 1000,
- .poll_timeout_us = 100 * MSEC,
- .actual_key_mask = {
- 0x1c, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff,
- 0xa4, 0xff, 0xfe, 0x55, 0xfa, 0xca /* full set */
- },
-};
-
-static const struct ec_response_keybd_config keybd1 = {
- .num_top_row_keys = 13,
- .action_keys = {
- TK_BACK, /* T1 */
- TK_REFRESH, /* T2 */
- TK_FULLSCREEN, /* T3 */
- TK_OVERVIEW, /* T4 */
- TK_SNAPSHOT, /* T5 */
- TK_BRIGHTNESS_DOWN, /* T6 */
- TK_BRIGHTNESS_UP, /* T7 */
- TK_KBD_BKLIGHT_TOGGLE, /* T8 */
- TK_PLAY_PAUSE, /* T9 */
- TK_MICMUTE, /* T10 */
- TK_VOL_MUTE, /* T11 */
- TK_VOL_DOWN, /* T12 */
- TK_VOL_UP, /* T13 */
- },
- .capabilities = KEYBD_CAP_SCRNLOCK_KEY,
-};
-
-static const struct ec_response_keybd_config keybd2 = {
- .num_top_row_keys = 13,
- .action_keys = {
- TK_BACK, /* T1 */
- TK_REFRESH, /* T2 */
- TK_FULLSCREEN, /* T3 */
- TK_OVERVIEW, /* T4 */
- TK_SNAPSHOT, /* T5 */
- TK_BRIGHTNESS_DOWN, /* T6 */
- TK_BRIGHTNESS_UP, /* T7 */
- TK_PRIVACY_SCRN_TOGGLE, /* T8 */
- TK_KBD_BKLIGHT_TOGGLE, /* T9 */
- TK_MICMUTE, /* T10 */
- TK_VOL_MUTE, /* T11 */
- TK_VOL_DOWN, /* T12 */
- TK_VOL_UP, /* T13 */
- },
- .capabilities = KEYBD_CAP_SCRNLOCK_KEY,
-};
-
-__override const struct ec_response_keybd_config *
-board_vivaldi_keybd_config(void)
-{
- if (ec_cfg_has_eps() == 0)
- return &keybd1;
- else
- return &keybd2;
-}
diff --git a/board/anahera/led.c b/board/anahera/led.c
deleted file mode 100644
index bd088bfe97..0000000000
--- a/board/anahera/led.c
+++ /dev/null
@@ -1,244 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- *
- * Power and battery LED control for Redrix
- */
-
-#include <stdint.h>
-
-#include "battery.h"
-#include "charge_manager.h"
-#include "charge_state.h"
-#include "chipset.h"
-#include "ec_commands.h"
-#include "gpio.h"
-#include "host_command.h"
-#include "led_common.h"
-#include "task.h"
-
-#define BAT_LED_ON 0
-#define BAT_LED_OFF 1
-
-#define POWER_LED_ON 0
-#define POWER_LED_OFF 1
-
-#define LED_TICK_INTERVAL_MS (500 * MSEC)
-#define LED_CYCLE_TIME_MS (2000 * MSEC)
-#define LED_TICKS_PER_CYCLE (LED_CYCLE_TIME_MS / LED_TICK_INTERVAL_MS)
-#define LED_ON_TIME_MS (1000 * MSEC)
-#define LED_ON_TICKS (LED_ON_TIME_MS / LED_TICK_INTERVAL_MS)
-
-const enum ec_led_id supported_led_ids[] = {
- EC_LED_ID_LEFT_LED,
- EC_LED_ID_RIGHT_LED,
- EC_LED_ID_POWER_LED
-};
-
-const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids);
-
-enum led_color {
- LED_OFF = 0,
- LED_AMBER,
- LED_WHITE,
- LED_COLOR_COUNT /* Number of colors, not a color itself */
-};
-
-enum led_port {
- LEFT_PORT = 0,
- RIGHT_PORT
-};
-
-static void led_set_color_battery(int port, enum led_color color)
-{
- enum gpio_signal amber_led, white_led;
-
- amber_led = (port == RIGHT_PORT ? GPIO_C1_CHARGE_LED_AMBER_L :
- GPIO_C0_CHARGE_LED_AMBER_L);
- white_led = (port == RIGHT_PORT ? GPIO_C1_CHARGE_LED_WHITE_L :
- GPIO_C0_CHARGE_LED_WHITE_L);
-
- switch (color) {
- case LED_WHITE:
- gpio_set_level(white_led, BAT_LED_ON);
- gpio_set_level(amber_led, BAT_LED_OFF);
- break;
- case LED_AMBER:
- gpio_set_level(white_led, BAT_LED_OFF);
- gpio_set_level(amber_led, BAT_LED_ON);
- break;
- case LED_OFF:
- gpio_set_level(white_led, BAT_LED_OFF);
- gpio_set_level(amber_led, BAT_LED_OFF);
- break;
- default:
- break;
- }
-}
-
-void led_set_color_power(enum ec_led_colors color)
-{
- switch (color) {
- case LED_OFF:
- gpio_set_level(GPIO_PWR_LED_WHITE_L, POWER_LED_OFF);
- break;
- case LED_WHITE:
- gpio_set_level(GPIO_PWR_LED_WHITE_L, POWER_LED_ON);
- break;
- default:
- break;
- }
-}
-
-void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range)
-{
- switch (led_id) {
- case EC_LED_ID_LEFT_LED:
- brightness_range[EC_LED_COLOR_WHITE] = 1;
- brightness_range[EC_LED_COLOR_AMBER] = 1;
- break;
- case EC_LED_ID_RIGHT_LED:
- brightness_range[EC_LED_COLOR_WHITE] = 1;
- brightness_range[EC_LED_COLOR_AMBER] = 1;
- break;
- case EC_LED_ID_POWER_LED:
- brightness_range[EC_LED_COLOR_WHITE] = 1;
- break;
- default:
- break;
- }
-}
-
-int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness)
-{
- switch (led_id) {
- case EC_LED_ID_LEFT_LED:
- if (brightness[EC_LED_COLOR_WHITE] != 0)
- led_set_color_battery(LEFT_PORT, LED_WHITE);
- else if (brightness[EC_LED_COLOR_AMBER] != 0)
- led_set_color_battery(LEFT_PORT, LED_AMBER);
- else
- led_set_color_battery(LEFT_PORT, LED_OFF);
- break;
- case EC_LED_ID_RIGHT_LED:
- if (brightness[EC_LED_COLOR_WHITE] != 0)
- led_set_color_battery(RIGHT_PORT, LED_WHITE);
- else if (brightness[EC_LED_COLOR_AMBER] != 0)
- led_set_color_battery(RIGHT_PORT, LED_AMBER);
- else
- led_set_color_battery(RIGHT_PORT, LED_OFF);
- break;
- case EC_LED_ID_POWER_LED:
- if (brightness[EC_LED_COLOR_WHITE] != 0)
- led_set_color_power(LED_WHITE);
- else
- led_set_color_power(LED_OFF);
- break;
- default:
- return EC_ERROR_PARAM1;
- }
-
- return EC_SUCCESS;
-}
-
-/*
- * Set active charge port color to the parameter, turn off all others.
- * If no port is active (-1), turn off all LEDs.
- */
-static void set_active_port_color(enum led_color color)
-{
- int port = charge_manager_get_active_charge_port();
-
- if (led_auto_control_is_enabled(EC_LED_ID_RIGHT_LED))
- led_set_color_battery(RIGHT_PORT,
- (port == RIGHT_PORT) ? color : LED_OFF);
- if (led_auto_control_is_enabled(EC_LED_ID_LEFT_LED))
- led_set_color_battery(LEFT_PORT,
- (port == LEFT_PORT) ? color : LED_OFF);
-}
-
-static void led_set_battery(void)
-{
- static unsigned int battery_ticks;
- uint32_t chflags = charge_get_flags();
-
- battery_ticks++;
-
- switch (charge_get_state()) {
- case PWR_STATE_CHARGE:
- /* Always indicate when charging, even in suspend. */
- set_active_port_color(LED_AMBER);
- break;
- case PWR_STATE_DISCHARGE:
- if (led_auto_control_is_enabled(EC_LED_ID_RIGHT_LED)) {
- if (charge_get_percent() < 10)
- led_set_color_battery(RIGHT_PORT,
- (battery_ticks % LED_TICKS_PER_CYCLE
- < LED_ON_TICKS) ? LED_WHITE : LED_OFF);
- else
- led_set_color_battery(RIGHT_PORT, LED_OFF);
- }
-
- if (led_auto_control_is_enabled(EC_LED_ID_LEFT_LED))
- led_set_color_battery(LEFT_PORT, LED_OFF);
- break;
- case PWR_STATE_ERROR:
- set_active_port_color((battery_ticks & 0x1) ?
- LED_WHITE : LED_OFF);
- break;
- case PWR_STATE_CHARGE_NEAR_FULL:
- set_active_port_color(LED_WHITE);
- break;
- case PWR_STATE_IDLE: /* External power connected in IDLE */
- if (chflags & CHARGE_FLAG_FORCE_IDLE)
- set_active_port_color((battery_ticks %
- LED_TICKS_PER_CYCLE < LED_ON_TICKS) ?
- LED_AMBER : LED_OFF);
- else
- set_active_port_color(LED_WHITE);
- break;
- default:
- /* Other states don't alter LED behavior */
- break;
- }
-}
-
-static void led_set_power(void)
-{
- static unsigned int power_tick;
-
- power_tick++;
-
- if (chipset_in_state(CHIPSET_STATE_ON))
- led_set_color_power(LED_WHITE);
- else if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND))
- led_set_color_power((power_tick %
- LED_TICKS_PER_CYCLE < LED_ON_TICKS) ?
- LED_WHITE : LED_OFF);
- else
- led_set_color_power(LED_OFF);
-}
-
-void led_task(void *u)
-{
- uint32_t start_time;
- uint32_t task_duration;
-
- while (1) {
- start_time = get_time().le.lo;
-
- if (led_auto_control_is_enabled(EC_LED_ID_POWER_LED))
- led_set_power();
-
- led_set_battery();
-
- /* Compute time for this iteration */
- task_duration = get_time().le.lo - start_time;
- /*
- * Compute wait time required to for next desired LED tick. If
- * the duration exceeds the tick time, then don't sleep.
- */
- if (task_duration < LED_TICK_INTERVAL_MS)
- usleep(LED_TICK_INTERVAL_MS - task_duration);
- }
-}
diff --git a/board/anahera/pwm.c b/board/anahera/pwm.c
deleted file mode 100644
index 54d0d05afb..0000000000
--- a/board/anahera/pwm.c
+++ /dev/null
@@ -1,31 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#include "common.h"
-
-#include "compile_time_macros.h"
-#include "hooks.h"
-#include "pwm.h"
-#include "pwm_chip.h"
-
-const struct pwm_t pwm_channels[] = {
- [PWM_CH_KBLIGHT] = {
- .channel = 3,
- .flags = 0,
- /*
- * Set PWM frequency to multiple of 50 Hz and 60 Hz to prevent
- * flicker. Higher frequencies consume similar average power to
- * lower PWM frequencies, but higher frequencies record a much
- * lower maximum power.
- */
- .freq = 2400,
- },
- [PWM_CH_FAN] = {
- .channel = 5,
- .flags = PWM_CONFIG_OPEN_DRAIN,
- .freq = 25000
- },
-};
-BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT);
diff --git a/board/anahera/sensors.c b/board/anahera/sensors.c
deleted file mode 100644
index 43fc7ef045..0000000000
--- a/board/anahera/sensors.c
+++ /dev/null
@@ -1,145 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#include "common.h"
-#include "adc_chip.h"
-#include "temp_sensor.h"
-#include "thermal.h"
-#include "temp_sensor/thermistor.h"
-
-/* ADC configuration */
-const struct adc_t adc_channels[] = {
- [ADC_TEMP_SENSOR_1_DDR] = {
- .name = "TEMP_DDR",
- .input_ch = NPCX_ADC_CH0,
- .factor_mul = ADC_MAX_VOLT,
- .factor_div = ADC_READ_MAX + 1,
- .shift = 0,
- },
- [ADC_TEMP_SENSOR_2_SOC] = {
- .name = "TEMP_SOC",
- .input_ch = NPCX_ADC_CH1,
- .factor_mul = ADC_MAX_VOLT,
- .factor_div = ADC_READ_MAX + 1,
- .shift = 0,
- },
- [ADC_TEMP_SENSOR_3_CHARGER] = {
- .name = "TEMP_CHARGER",
- .input_ch = NPCX_ADC_CH6,
- .factor_mul = ADC_MAX_VOLT,
- .factor_div = ADC_READ_MAX + 1,
- .shift = 0,
- },
- [ADC_TEMP_SENSOR_4_REGULATOR] = {
- .name = "TEMP_REGULATOR",
- .input_ch = NPCX_ADC_CH7,
- .factor_mul = ADC_MAX_VOLT,
- .factor_div = ADC_READ_MAX + 1,
- .shift = 0,
- },
-};
-BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
-
-/* Temperature sensor configuration */
-const struct temp_sensor_t temp_sensors[] = {
- [TEMP_SENSOR_1_DDR] = {
- .name = "DDR",
- .type = TEMP_SENSOR_TYPE_BOARD,
- .read = get_temp_3v3_30k9_47k_4050b,
- .idx = ADC_TEMP_SENSOR_1_DDR
- },
- [TEMP_SENSOR_2_SOC] = {
- .name = "SOC",
- .type = TEMP_SENSOR_TYPE_BOARD,
- .read = get_temp_3v3_30k9_47k_4050b,
- .idx = ADC_TEMP_SENSOR_2_SOC
- },
- [TEMP_SENSOR_3_CHARGER] = {
- .name = "Charger",
- .type = TEMP_SENSOR_TYPE_BOARD,
- .read = get_temp_3v3_30k9_47k_4050b,
- .idx = ADC_TEMP_SENSOR_3_CHARGER
- },
- [TEMP_SENSOR_4_REGULATOR] = {
- .name = "Regulator",
- .type = TEMP_SENSOR_TYPE_BOARD,
- .read = get_temp_3v3_30k9_47k_4050b,
- .idx = ADC_TEMP_SENSOR_4_REGULATOR
- },
-};
-BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT);
-
-/*
- * TODO(b/195673113): Need to update for Alder Lake/redrix
- */
-static const struct ec_thermal_config thermal_ddr = {
- .temp_host = {
- [EC_TEMP_THRESH_HIGH] = C_TO_K(70),
- [EC_TEMP_THRESH_HALT] = C_TO_K(80),
- },
- .temp_host_release = {
- [EC_TEMP_THRESH_HIGH] = C_TO_K(65),
- },
- .temp_fan_off = C_TO_K(35),
- .temp_fan_max = C_TO_K(50),
-};
-
-/*
- * TODO(b/195673113): Need to update for Alder Lake/redrix
- *
- * Tiger Lake specifies 100 C as maximum TDP temperature. THRMTRIP# occurs at
- * 130 C. However, sensor is located next to SOC, so we need to use the lower
- * SOC temperature limit (85 C)
- */
-static const struct ec_thermal_config thermal_cpu = {
- .temp_host = {
- [EC_TEMP_THRESH_HIGH] = C_TO_K(70),
- [EC_TEMP_THRESH_HALT] = C_TO_K(80),
- },
- .temp_host_release = {
- [EC_TEMP_THRESH_HIGH] = C_TO_K(65),
- },
- .temp_fan_off = C_TO_K(35),
- .temp_fan_max = C_TO_K(50),
-};
-
-/*
- * TODO(b/195673113): Need to update for Alder Lake/redrix
- */
-static const struct ec_thermal_config thermal_charger = {
- .temp_host = {
- [EC_TEMP_THRESH_HIGH] = C_TO_K(80),
- [EC_TEMP_THRESH_HALT] = C_TO_K(85),
- },
- .temp_host_release = {
- [EC_TEMP_THRESH_HIGH] = C_TO_K(75),
- },
- .temp_fan_off = C_TO_K(40),
- .temp_fan_max = C_TO_K(55),
-};
-
-/*
- * TODO(b/195673113): Need to update for Alder Lake/redrix
- */
-static const struct ec_thermal_config thermal_regulator = {
- .temp_host = {
- [EC_TEMP_THRESH_HIGH] = C_TO_K(80),
- [EC_TEMP_THRESH_HALT] = C_TO_K(85),
- },
- .temp_host_release = {
- [EC_TEMP_THRESH_HIGH] = C_TO_K(75),
- },
- .temp_fan_off = C_TO_K(40),
- .temp_fan_max = C_TO_K(55),
-};
-
-/* this should really be "const" */
-struct ec_thermal_config thermal_params[] = {
- [TEMP_SENSOR_1_DDR] = thermal_ddr,
- [TEMP_SENSOR_2_SOC] = thermal_cpu,
- [TEMP_SENSOR_3_CHARGER] = thermal_charger,
- [TEMP_SENSOR_4_REGULATOR] = thermal_regulator,
-};
-BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT);
diff --git a/board/anahera/usbc_config.c b/board/anahera/usbc_config.c
deleted file mode 100644
index 73a7b402cc..0000000000
--- a/board/anahera/usbc_config.c
+++ /dev/null
@@ -1,299 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#include <stdint.h>
-#include <stdbool.h>
-
-#include "common.h"
-#include "compile_time_macros.h"
-#include "console.h"
-#include "driver/bc12/pi3usb9201_public.h"
-#include "driver/ppc/syv682x_public.h"
-#include "driver/retimer/bb_retimer_public.h"
-#include "driver/tcpm/nct38xx.h"
-#include "driver/tcpm/tcpci.h"
-#include "ec_commands.h"
-#include "fw_config.h"
-#include "gpio.h"
-#include "gpio_signal.h"
-#include "hooks.h"
-#include "ioexpander.h"
-#include "system.h"
-#include "task.h"
-#include "task_id.h"
-#include "timer.h"
-#include "usbc_config.h"
-#include "usbc_ppc.h"
-#include "usb_charge.h"
-#include "usb_mux.h"
-#include "usb_pd.h"
-#include "usb_pd_tcpm.h"
-
-#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args)
-#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args)
-
-/* USBC TCPC configuration */
-const struct tcpc_config_t tcpc_config[] = {
- [USBC_PORT_C0] = {
- .bus_type = EC_BUS_TYPE_I2C,
- .i2c_info = {
- .port = I2C_PORT_USB_C0_TCPC,
- .addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS,
- },
- .drv = &nct38xx_tcpm_drv,
- .flags = TCPC_FLAGS_TCPCI_REV2_0,
- },
- [USBC_PORT_C1] = {
- .bus_type = EC_BUS_TYPE_I2C,
- .i2c_info = {
- .port = I2C_PORT_USB_C1_TCPC,
- .addr_flags = NCT38XX_I2C_ADDR1_4_FLAGS,
- },
- .drv = &nct38xx_tcpm_drv,
- .flags = TCPC_FLAGS_TCPCI_REV2_0,
- },
-};
-BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == USBC_PORT_COUNT);
-BUILD_ASSERT(CONFIG_USB_PD_PORT_MAX_COUNT == USBC_PORT_COUNT);
-
-/* USBC PPC configuration */
-struct ppc_config_t ppc_chips[] = {
- [USBC_PORT_C0] = {
- .i2c_port = I2C_PORT_USB_C0_PPC,
- .i2c_addr_flags = SYV682X_ADDR0_FLAGS,
- .drv = &syv682x_drv,
- },
- [USBC_PORT_C1] = {
- .i2c_port = I2C_PORT_USB_C1_PPC,
- .i2c_addr_flags = SYV682X_ADDR2_FLAGS,
- .drv = &syv682x_drv,
- },
-};
-BUILD_ASSERT(ARRAY_SIZE(ppc_chips) == USBC_PORT_COUNT);
-
-unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips);
-
-/* USBC mux configuration - Alder Lake includes internal mux */
-static const struct usb_mux usbc0_tcss_usb_mux = {
- .usb_port = USBC_PORT_C0,
- .driver = &virtual_usb_mux_driver,
- .hpd_update = &virtual_hpd_update,
-};
-static const struct usb_mux usbc1_tcss_usb_mux = {
- .usb_port = USBC_PORT_C1,
- .driver = &virtual_usb_mux_driver,
- .hpd_update = &virtual_hpd_update,
-};
-
-const struct usb_mux usb_muxes[] = {
- [USBC_PORT_C0] = {
- .usb_port = USBC_PORT_C0,
- .driver = &bb_usb_retimer,
- .hpd_update = bb_retimer_hpd_update,
- .i2c_port = I2C_PORT_USB_C0_MUX,
- .i2c_addr_flags = USBC_PORT_C0_BB_RETIMER_I2C_ADDR,
- .next_mux = &usbc0_tcss_usb_mux,
- },
- [USBC_PORT_C1] = {
- .usb_port = USBC_PORT_C1,
- .driver = &bb_usb_retimer,
- .hpd_update = bb_retimer_hpd_update,
- .i2c_port = I2C_PORT_USB_C1_MUX,
- .i2c_addr_flags = USBC_PORT_C1_BB_RETIMER_I2C_ADDR,
- .next_mux = &usbc1_tcss_usb_mux,
- },
-};
-BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == USBC_PORT_COUNT);
-
-/* BC1.2 charger detect configuration */
-const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = {
- [USBC_PORT_C0] = {
- .i2c_port = I2C_PORT_USB_C0_BC12,
- .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS,
- },
- [USBC_PORT_C1] = {
- .i2c_port = I2C_PORT_USB_C1_BC12,
- .i2c_addr_flags = PI3USB9201_I2C_ADDR_1_FLAGS,
- },
-};
-BUILD_ASSERT(ARRAY_SIZE(pi3usb9201_bc12_chips) == USBC_PORT_COUNT);
-
-/*
- * USB C0 and C1 uses burnside bridge chips and have their reset
- * controlled by their respective TCPC chips acting as GPIO expanders.
- *
- * ioex_init() is normally called before we take the TCPCs out of
- * reset, so we need to start in disabled mode, then explicitly
- * call ioex_init().
- */
-
-struct ioexpander_config_t ioex_config[] = {
- [IOEX_C0_NCT38XX] = {
- .i2c_host_port = I2C_PORT_USB_C0_TCPC,
- .i2c_addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS,
- .drv = &nct38xx_ioexpander_drv,
- .flags = IOEX_FLAGS_DISABLED,
- },
- [IOEX_C1_NCT38XX] = {
- .i2c_host_port = I2C_PORT_USB_C1_TCPC,
- .i2c_addr_flags = NCT38XX_I2C_ADDR1_4_FLAGS,
- .drv = &nct38xx_ioexpander_drv,
- .flags = IOEX_FLAGS_DISABLED,
- },
-};
-BUILD_ASSERT(ARRAY_SIZE(ioex_config) == CONFIG_IO_EXPANDER_PORT_COUNT);
-
-__override int bb_retimer_power_enable(const struct usb_mux *me, bool enable)
-{
- enum ioex_signal rst_signal;
-
- if (me->usb_port == USBC_PORT_C0) {
- rst_signal = IOEX_USB_C0_RT_RST_ODL;
- } else if (me->usb_port == USBC_PORT_C1) {
- rst_signal = IOEX_USB_C1_RT_RST_ODL;
- } else {
- return EC_ERROR_INVAL;
- }
-
- /*
- * We do not have a load switch for the burnside bridge chips,
- * so we only need to sequence reset.
- */
-
- if (enable) {
- /*
- * Tpw, minimum time from VCC to RESET_N de-assertion is 100us.
- * For boards that don't provide a load switch control, the
- * retimer_init() function ensures power is up before calling
- * this function.
- */
- ioex_set_level(rst_signal, 1);
- /*
- * Allow 1ms time for the retimer to power up lc_domain
- * which powers I2C controller within retimer
- */
- msleep(1);
- } else {
- ioex_set_level(rst_signal, 0);
- msleep(1);
- }
- return EC_SUCCESS;
-}
-
-void board_reset_pd_mcu(void)
-{
- gpio_set_level(GPIO_USB_C0_TCPC_RST_ODL, 0);
- gpio_set_level(GPIO_USB_C1_TCPC_RST_ODL, 0);
-
- /*
- * delay for power-on to reset-off and min. assertion time
- */
- msleep(NCT38XX_RESET_HOLD_DELAY_MS);
-
- gpio_set_level(GPIO_USB_C0_TCPC_RST_ODL, 1);
- gpio_set_level(GPIO_USB_C1_TCPC_RST_ODL, 1);
-
- nct38xx_reset_notify(USBC_PORT_C0);
- nct38xx_reset_notify(USBC_PORT_C1);
-
- /* wait for chips to come up */
- if (NCT3807_RESET_POST_DELAY_MS != 0)
- msleep(NCT3807_RESET_POST_DELAY_MS);
-}
-
-static void board_tcpc_init(void)
-{
- int i;
-
- /* Don't reset TCPCs after initial reset */
- if (!system_jumped_late()) {
- board_reset_pd_mcu();
-
- for (i = 0; i < CONFIG_IO_EXPANDER_PORT_COUNT; ++i) {
- ioex_config[i].flags &= ~IOEX_FLAGS_DISABLED;
- ioex_init(i);
- }
- }
-
- /* Enable PPC interrupts. */
- gpio_enable_interrupt(GPIO_USB_C0_PPC_INT_ODL);
- gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL);
-
- /* Enable TCPC interrupts. */
- gpio_enable_interrupt(GPIO_USB_C0_TCPC_INT_ODL);
- gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL);
-
- /* Enable BC1.2 interrupts. */
- gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL);
- gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_ODL);
-}
-DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_CHIPSET);
-
-uint16_t tcpc_get_alert_status(void)
-{
- uint16_t status = 0;
-
- if (gpio_get_level(GPIO_USB_C0_TCPC_INT_ODL) == 0)
- status |= PD_STATUS_TCPC_ALERT_0;
-
- if (gpio_get_level(GPIO_USB_C1_TCPC_INT_ODL) == 0)
- status |= PD_STATUS_TCPC_ALERT_1;
-
- return status;
-}
-
-void tcpc_alert_event(enum gpio_signal signal)
-{
- switch (signal) {
- case GPIO_USB_C0_TCPC_INT_ODL:
- schedule_deferred_pd_interrupt(USBC_PORT_C0);
- break;
- case GPIO_USB_C1_TCPC_INT_ODL:
- schedule_deferred_pd_interrupt(USBC_PORT_C1);
- break;
- default:
- break;
- }
-}
-
-void bc12_interrupt(enum gpio_signal signal)
-{
- switch (signal) {
- case GPIO_USB_C0_BC12_INT_ODL:
- task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12);
- break;
- case GPIO_USB_C1_BC12_INT_ODL:
- task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12);
- break;
- default:
- break;
- }
-}
-
-void ppc_interrupt(enum gpio_signal signal)
-{
- switch (signal) {
- case GPIO_USB_C0_PPC_INT_ODL:
- syv682x_interrupt(USBC_PORT_C0);
- break;
- case GPIO_USB_C1_PPC_INT_ODL:
- syv682x_interrupt(USBC_PORT_C1);
- break;
- default:
- break;
- }
-}
-
-void retimer_interrupt(enum gpio_signal signal)
-{
- /*
- * TODO(b/179513527): add USB-C support
- */
-}
-
-__override bool board_is_dts_port(int port)
-{
- return port == USBC_PORT_C0;
-}
diff --git a/board/anahera/usbc_config.h b/board/anahera/usbc_config.h
deleted file mode 100644
index c314466f77..0000000000
--- a/board/anahera/usbc_config.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Anahera board-specific USB-C configuration */
-
-#ifndef __CROS_EC_USBC_CONFIG_H
-#define __CROS_EC_USBC_CONFIG_H
-
-#define CONFIG_USB_PD_PORT_MAX_COUNT 2
-
-enum usbc_port {
- USBC_PORT_C0 = 0,
- USBC_PORT_C1,
- USBC_PORT_COUNT
-};
-
-#endif /* __CROS_EC_USBC_CONFIG_H */
diff --git a/board/anahera/vif_override.xml b/board/anahera/vif_override.xml
deleted file mode 100644
index 32736caf64..0000000000
--- a/board/anahera/vif_override.xml
+++ /dev/null
@@ -1,3 +0,0 @@
-<!-- Add VIF field overrides here. See genvif.c and the Vendor Info File
- Definition from the USB-IF.
--->