diff options
Diffstat (limited to 'board/atlas/board.h')
| -rw-r--r-- | board/atlas/board.h | 126 |
1 files changed, 61 insertions, 65 deletions
diff --git a/board/atlas/board.h b/board/atlas/board.h index c3ddafe2cb..0882b5742e 100644 --- a/board/atlas/board.h +++ b/board/atlas/board.h @@ -1,4 +1,4 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. +/* Copyright 2018 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -12,7 +12,7 @@ * By default, enable all console messages excepted HC, ACPI and event: * The sensor stack is generating a lot of activity. */ -#define CC_DEFAULT (CC_ALL & ~(CC_MASK(CC_EVENTS) | CC_MASK(CC_LPC))) +#define CC_DEFAULT (CC_ALL & ~(CC_MASK(CC_EVENTS) | CC_MASK(CC_LPC))) #undef CONFIG_HOSTCMD_DEBUG_MODE #define CONFIG_HOSTCMD_DEBUG_MODE HCDEBUG_OFF @@ -55,8 +55,8 @@ #define CONFIG_CHIPSET_RESET_HOOK #define CONFIG_CPU_PROCHOT_ACTIVE_LOW #define CONFIG_HOST_INTERFACE_ESPI -#define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 -#define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 +#define CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S3 +#define CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S4 #define CONFIG_KEYBOARD_COL2_INVERTED #define CONFIG_KEYBOARD_PROTOCOL_8042 @@ -147,29 +147,29 @@ #define CONFIG_USBC_VCONN_SWAP /* Optional feature to configure npcx chip */ -#define NPCX_UART_MODULE2 1 /* 1:GPIO64/65 as UART */ -#define NPCX_JTAG_MODULE2 0 /* 0:GPIO21/17/16/20 as JTAG */ -#define NPCX_TACH_SEL2 0 /* 0:GPIO40/73 1:GPIO93/A6 as TACH */ -#define NPCX7_PWM1_SEL 1 /* GPIO C2 is used as PWM1. */ -#define CONFIG_HIBERNATE_PSL /* Enable PSL pins for wakeup */ +#define NPCX_UART_MODULE2 1 /* 1:GPIO64/65 as UART */ +#define NPCX_JTAG_MODULE2 0 /* 0:GPIO21/17/16/20 as JTAG */ +#define NPCX_TACH_SEL2 0 /* 0:GPIO40/73 1:GPIO93/A6 as TACH */ +#define NPCX7_PWM1_SEL 1 /* GPIO C2 is used as PWM1. */ +#define CONFIG_HIBERNATE_PSL /* Enable PSL pins for wakeup */ /* I2C ports */ -#define I2C_PORT_POWER NPCX_I2C_PORT0_0 /* pmic/charger */ -#define I2C_PORT_TCPC0 NPCX_I2C_PORT1_0 -#define I2C_PORT_TCPC1 NPCX_I2C_PORT2_0 -#define I2C_PORT_SENSOR NPCX_I2C_PORT3_0 /* als */ -#define I2C_PORT_BATTERY NPCX_I2C_PORT4_1 -#define I2C_PORT_GYRO NPCX_I2C_PORT5_0 /* accel/gyro */ - -#define I2C_PORT_ACCEL I2C_PORT_GYRO -#define I2C_PORT_CHARGER I2C_PORT_POWER -#define I2C_PORT_PMIC I2C_PORT_POWER -#define I2C_PORT_THERMAL I2C_PORT_POWER +#define I2C_PORT_POWER NPCX_I2C_PORT0_0 /* pmic/charger */ +#define I2C_PORT_TCPC0 NPCX_I2C_PORT1_0 +#define I2C_PORT_TCPC1 NPCX_I2C_PORT2_0 +#define I2C_PORT_SENSOR NPCX_I2C_PORT3_0 /* als */ +#define I2C_PORT_BATTERY NPCX_I2C_PORT4_1 +#define I2C_PORT_GYRO NPCX_I2C_PORT5_0 /* accel/gyro */ + +#define I2C_PORT_ACCEL I2C_PORT_GYRO +#define I2C_PORT_CHARGER I2C_PORT_POWER +#define I2C_PORT_PMIC I2C_PORT_POWER +#define I2C_PORT_THERMAL I2C_PORT_POWER /* I2C addresses */ -#define I2C_ADDR_TCPC_FLAGS 0x0B -#define I2C_ADDR_MP2949_FLAGS 0x20 -#define I2C_ADDR_BD99992_FLAGS 0x30 +#define I2C_ADDR_TCPC_FLAGS 0x0B +#define I2C_ADDR_MP2949_FLAGS 0x20 +#define I2C_ADDR_BD99992_FLAGS 0x30 #ifndef __ASSEMBLER__ @@ -177,11 +177,11 @@ #include "registers.h" enum temp_sensor_id { - TEMP_SENSOR_BATTERY, /* BD99956GW TSENSE */ - TEMP_SENSOR_SYSTHERM0, /* BD99992GW SYSTHERM0 */ - TEMP_SENSOR_SYSTHERM1, /* BD99992GW SYSTHERM1 */ - TEMP_SENSOR_SYSTHERM2, /* BD99992GW SYSTHERM2 */ - TEMP_SENSOR_SYSTHERM3, /* BD99992GW SYSTHERM3 */ + TEMP_SENSOR_BATTERY, /* BD99956GW TSENSE */ + TEMP_SENSOR_SYSTHERM0, /* BD99992GW SYSTHERM0 */ + TEMP_SENSOR_SYSTHERM1, /* BD99992GW SYSTHERM1 */ + TEMP_SENSOR_SYSTHERM2, /* BD99992GW SYSTHERM2 */ + TEMP_SENSOR_SYSTHERM3, /* BD99992GW SYSTHERM3 */ TEMP_SENSOR_COUNT }; @@ -202,28 +202,24 @@ enum sensor_id { }; /* LID_ALS needs to be polled */ -#define CONFIG_ACCEL_FORCE_MODE_MASK BIT(LID_ALS) +#define CONFIG_ACCEL_FORCE_MODE_MASK BIT(LID_ALS) -enum adc_channel { - ADC_AMON_BMON, - ADC_PSYS, - ADC_CH_COUNT -}; +enum adc_channel { ADC_AMON_BMON, ADC_PSYS, ADC_CH_COUNT }; /* * delay to turn on the power supply max is ~16ms. * delay to turn off the power supply max is about ~180ms. */ -#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ -#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */ +#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ +#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */ /* delay to turn on/off vconn */ /* Define typical operating power and max power */ -#define PD_OPERATING_POWER_MW 15000 -#define PD_MAX_POWER_MW 60000 -#define PD_MAX_CURRENT_MA 3000 -#define PD_MAX_VOLTAGE_MV 20000 +#define PD_OPERATING_POWER_MW 15000 +#define PD_MAX_POWER_MW 60000 +#define PD_MAX_CURRENT_MA 3000 +#define PD_MAX_VOLTAGE_MV 20000 /* Board specific handlers */ int board_get_version(void); @@ -236,33 +232,33 @@ void board_reset_pd_mcu(void); * vs. names hard-coded in various parts of the EC codebase. */ -#define GPIO_AC_PRESENT GPIO_ROP_EC_ACOK -#define GPIO_BATTERY_PRESENT_L GPIO_EC_BATT_PRES_L -#define GPIO_BOARD_VERSION1 GPIO_EC_BRD_ID1 -#define GPIO_BOARD_VERSION2 GPIO_EC_BRD_ID2 -#define GPIO_BOARD_VERSION3 GPIO_EC_BRD_ID3 -#define GPIO_CPU_PROCHOT GPIO_EC_PROCHOT_ODL -#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW -#define GPIO_KBD_KSO2 GPIO_EC_KB_ROW02_INV -#define GPIO_PCH_ACOK GPIO_EC_PCH_ACPRESENT -#define GPIO_PCH_PWRBTN_L GPIO_EC_PCH_PWR_BTN_L -#define GPIO_PCH_RSMRST_L GPIO_RSMRST_L -#define GPIO_PCH_SLP_SUS_L GPIO_SLP_SUS_L_PCH -#define GPIO_PCH_WAKE_L GPIO_EC_PCH_WAKE_L -#define GPIO_PMIC_DPWROK GPIO_ROP_DSW_PWROK_EC -#define GPIO_PMIC_SLP_SUS_L GPIO_SLP_SUS_L_PMIC -#define GPIO_POWER_BUTTON_L GPIO_MECH_PWR_BTN_ODL -#define GPIO_PG_EC_RSMRST_ODL GPIO_ROP_EC_RSMRST_L -#define GPIO_PCH_SLP_S0_L GPIO_SLP_S0_L -#define GPIO_USB_C0_5V_EN GPIO_EN_USB_C0_5V_OUT -#define GPIO_USB_C0_PD_RST_L GPIO_USB_PD_RST_L -#define GPIO_USB_C1_5V_EN GPIO_EN_USB_C1_5V_OUT -#define GPIO_USB_C1_PD_RST_L GPIO_USB_PD_RST_L -#define GPIO_WP_L GPIO_EC_WP_L +#define GPIO_AC_PRESENT GPIO_ROP_EC_ACOK +#define GPIO_BATTERY_PRESENT_L GPIO_EC_BATT_PRES_L +#define GPIO_BOARD_VERSION1 GPIO_EC_BRD_ID1 +#define GPIO_BOARD_VERSION2 GPIO_EC_BRD_ID2 +#define GPIO_BOARD_VERSION3 GPIO_EC_BRD_ID3 +#define GPIO_CPU_PROCHOT GPIO_EC_PROCHOT_ODL +#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW +#define GPIO_KBD_KSO2 GPIO_EC_KB_ROW02_INV +#define GPIO_PCH_ACOK GPIO_EC_PCH_ACPRESENT +#define GPIO_PCH_PWRBTN_L GPIO_EC_PCH_PWR_BTN_L +#define GPIO_PCH_RSMRST_L GPIO_RSMRST_L +#define GPIO_PCH_SLP_SUS_L GPIO_SLP_SUS_L_PCH +#define GPIO_PCH_WAKE_L GPIO_EC_PCH_WAKE_L +#define GPIO_PMIC_DPWROK GPIO_ROP_DSW_PWROK_EC +#define GPIO_PMIC_SLP_SUS_L GPIO_SLP_SUS_L_PMIC +#define GPIO_POWER_BUTTON_L GPIO_MECH_PWR_BTN_ODL +#define GPIO_PG_EC_RSMRST_ODL GPIO_ROP_EC_RSMRST_L +#define GPIO_PCH_SLP_S0_L GPIO_SLP_S0_L +#define GPIO_USB_C0_5V_EN GPIO_EN_USB_C0_5V_OUT +#define GPIO_USB_C0_PD_RST_L GPIO_USB_PD_RST_L +#define GPIO_USB_C1_5V_EN GPIO_EN_USB_C1_5V_OUT +#define GPIO_USB_C1_PD_RST_L GPIO_USB_PD_RST_L +#define GPIO_WP_L GPIO_EC_WP_L /* ps8751 requires 1ms reset down assertion */ -#define PS8XXX_RST_L_RST_H_DELAY_MS 1 +#define PS8XXX_RST_L_RST_H_DELAY_MS 1 -#define ATLAS_REV_FIXED_EC_WP 4 +#define ATLAS_REV_FIXED_EC_WP 4 #endif /* __CROS_EC_BOARD_H */ |