diff options
Diffstat (limited to 'board/chronicler')
| -rw-r--r-- | board/chronicler/battery.c | 2 | ||||
| -rw-r--r-- | board/chronicler/board.c | 94 | ||||
| -rw-r--r-- | board/chronicler/board.h | 93 | ||||
| -rw-r--r-- | board/chronicler/build.mk | 2 | ||||
| -rw-r--r-- | board/chronicler/cbi.c | 2 | ||||
| -rw-r--r-- | board/chronicler/ec.tasklist | 2 | ||||
| -rw-r--r-- | board/chronicler/gpio.inc | 4 | ||||
| -rw-r--r-- | board/chronicler/keyboard.c | 2 | ||||
| -rw-r--r-- | board/chronicler/led.c | 61 | ||||
| -rw-r--r-- | board/chronicler/usbc_config.c | 54 | ||||
| -rw-r--r-- | board/chronicler/usbc_config.h | 8 |
11 files changed, 159 insertions, 165 deletions
diff --git a/board/chronicler/battery.c b/board/chronicler/battery.c index aee0095765..1d885607b7 100644 --- a/board/chronicler/battery.c +++ b/board/chronicler/battery.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * diff --git a/board/chronicler/board.c b/board/chronicler/board.c index 5f7f717bca..40cefc714d 100644 --- a/board/chronicler/board.c +++ b/board/chronicler/board.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -36,22 +36,22 @@ #include "gpio_list.h" /* Must come after other header files. */ -#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args) +#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ##args) /******************************************************************************/ /* Physical fans. These are logically separate from pwm_channels. */ const struct fan_conf fan_conf_0 = { .flags = FAN_USE_RPM_MODE, - .ch = MFT_CH_0, /* Use MFT id to control fan */ + .ch = MFT_CH_0, /* Use MFT id to control fan */ .pgood_gpio = -1, .enable_gpio = GPIO_EN_PP5000_FAN, }; const struct fan_rpm fan_rpm_0 = { - .rpm_min = 3000, + .rpm_min = 3000, .rpm_start = 5000, - .rpm_max = 5100, + .rpm_max = 5100, }; const struct fan_t fans[FAN_CH_COUNT] = { @@ -73,23 +73,23 @@ const struct fan_t fans[FAN_CH_COUNT] = { * TODO(b/202062363): Remove when clang is fixed. */ #define THERMAL_CONFIG_WITHOUT_FAN \ - { \ + { \ .temp_host = { \ [EC_TEMP_THRESH_HIGH] = C_TO_K(77), \ [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ }, \ .temp_host_release = { \ [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ - }, \ + }, \ } -__maybe_unused static const struct ec_thermal_config - thermal_config_without_fan = THERMAL_CONFIG_WITHOUT_FAN; +__maybe_unused static const struct ec_thermal_config thermal_config_without_fan = + THERMAL_CONFIG_WITHOUT_FAN; /* * TODO(b/202062363): Remove when clang is fixed. */ -#define THERMAL_CONFIG_WITH_FAN \ - { \ +#define THERMAL_CONFIG_WITH_FAN \ + { \ .temp_host = { \ [EC_TEMP_THRESH_HIGH] = C_TO_K(77), \ [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ @@ -120,12 +120,12 @@ struct fan_step { /* Fan control table */ static const struct fan_step fan_table0[] = { - {.on = 30, .off = 0, .rpm = 3150 }, /* Fan level 0 */ - {.on = 47, .off = 43, .rpm = 3500 }, /* Fan level 1 */ - {.on = 50, .off = 47, .rpm = 3750 }, /* Fan level 2 */ - {.on = 53, .off = 50, .rpm = 4200 }, /* Fan level 3 */ - {.on = 56, .off = 53, .rpm = 4500 }, /* Fan level 4 */ - {.on = 59, .off = 56, .rpm = 5000 }, /* Fan level 5 */ + { .on = 30, .off = 0, .rpm = 3150 }, /* Fan level 0 */ + { .on = 47, .off = 43, .rpm = 3500 }, /* Fan level 1 */ + { .on = 50, .off = 47, .rpm = 3750 }, /* Fan level 2 */ + { .on = 53, .off = 50, .rpm = 4200 }, /* Fan level 3 */ + { .on = 56, .off = 53, .rpm = 4500 }, /* Fan level 4 */ + { .on = 59, .off = 56, .rpm = 5000 }, /* Fan level 5 */ }; /* All fan tables must have the same number of levels */ @@ -148,7 +148,7 @@ int fan_percent_to_rpm(int fan, int pct) if (++cnt != FAN_AVERAGE_TIME_SEC) return fan_table[previous_level].rpm; - avg_pct = (int) avg_pct / FAN_AVERAGE_TIME_SEC; + avg_pct = (int)avg_pct / FAN_AVERAGE_TIME_SEC; /* * Compare the pct and previous pct, we have the three paths : @@ -287,8 +287,8 @@ static const struct ec_response_keybd_config main_kb = { .capabilities = KEYBD_CAP_SCRNLOCK_KEY, }; -__override const struct ec_response_keybd_config -*board_vivaldi_keybd_config(void) +__override const struct ec_response_keybd_config * +board_vivaldi_keybd_config(void) { return &main_kb; } @@ -303,15 +303,15 @@ __override const struct ec_response_keybd_config */ const int keyboard_factory_scan_pins[][2] = { - {-1, -1}, {0, 5}, {1, 1}, {1, 0}, {0, 6}, - {0, 7}, {1, 4}, {1, 3}, {1, 6}, {1, 7}, - {3, 1}, {2, 0}, {1, 5}, {2, 6}, {2, 7}, - {2, 1}, {2, 4}, {2, 5}, {1, 2}, {2, 3}, - {2, 2}, {3, 0}, {-1, -1}, {-1, -1}, {-1, -1}, + { -1, -1 }, { 0, 5 }, { 1, 1 }, { 1, 0 }, { 0, 6 }, + { 0, 7 }, { 1, 4 }, { 1, 3 }, { 1, 6 }, { 1, 7 }, + { 3, 1 }, { 2, 0 }, { 1, 5 }, { 2, 6 }, { 2, 7 }, + { 2, 1 }, { 2, 4 }, { 2, 5 }, { 1, 2 }, { 2, 3 }, + { 2, 2 }, { 3, 0 }, { -1, -1 }, { -1, -1 }, { -1, -1 }, }; const int keyboard_factory_scan_pins_used = - ARRAY_SIZE(keyboard_factory_scan_pins); + ARRAY_SIZE(keyboard_factory_scan_pins); #endif /******************************************************************************/ @@ -322,19 +322,19 @@ static int manual_run_time = -1; #endif struct drop_step { - int run_time; /* battery run time (day) */ - int drop_volt; /* drop voltage (mV) */ + int run_time; /* battery run time (day) */ + int drop_volt; /* drop voltage (mV) */ }; /* voltage drop table */ static const struct drop_step voltage_drop_table[] = { - {.run_time = 90, .drop_volt = 13200 }, /* drop level 0 */ - {.run_time = 198, .drop_volt = 13125 }, /* drop level 1 */ - {.run_time = 305, .drop_volt = 13050 }, /* drop level 2 */ - {.run_time = 412, .drop_volt = 12975 }, /* drop level 3 */ - {.run_time = 519, .drop_volt = 12900 }, /* drop level 4 */ - {.run_time = 626, .drop_volt = 12825 }, /* drop level 5 */ - {.run_time = __INT_MAX__, .drop_volt = 12750 },/* drop level 6 */ + { .run_time = 90, .drop_volt = 13200 }, /* drop level 0 */ + { .run_time = 198, .drop_volt = 13125 }, /* drop level 1 */ + { .run_time = 305, .drop_volt = 13050 }, /* drop level 2 */ + { .run_time = 412, .drop_volt = 12975 }, /* drop level 3 */ + { .run_time = 519, .drop_volt = 12900 }, /* drop level 4 */ + { .run_time = 626, .drop_volt = 12825 }, /* drop level 5 */ + { .run_time = __INT_MAX__, .drop_volt = 12750 }, /* drop level 6 */ }; #define NUM_DROP_LEVELS ARRAY_SIZE(voltage_drop_table) @@ -346,19 +346,19 @@ static int get_battery_run_time_day(uint32_t *battery_run_time) uint8_t data[6]; /* get battery run time */ - rv = sb_read_mfgacc(PARAM_FIRMWARE_RUNTIME, - SB_ALT_MANUFACTURER_ACCESS, data, sizeof(data)); + rv = sb_read_mfgacc(PARAM_FIRMWARE_RUNTIME, SB_ALT_MANUFACTURER_ACCESS, + data, sizeof(data)); if (rv) return EC_ERROR_UNKNOWN; /* * The response is 6 bytes; the runtime in seconds is the last 4 bytes. */ - run_time = *(int32_t *) (&data[2]); + run_time = *(int32_t *)(&data[2]); #ifdef BATTERY_RUNTIME_TEST - cprints(CC_CHARGER, "run_time : 0x%08x (%d day)", - run_time, (run_time / 86400)); + cprints(CC_CHARGER, "run_time : 0x%08x (%d day)", run_time, + (run_time / 86400)); /* manual battery run time fot test */ if (manual_run_time != -1) @@ -388,8 +388,8 @@ int charger_profile_override(struct charge_state_data *curr) break; } - curr->requested_voltage = MIN(curr->requested_voltage, - voltage_drop_table[i].drop_volt); + curr->requested_voltage = + MIN(curr->requested_voltage, voltage_drop_table[i].drop_volt); #ifdef BATTERY_RUNTIME_TEST cprints(CC_CHARGER, "Charger: run time(day): %d, drop level: %d, CV: %d", @@ -399,13 +399,13 @@ int charger_profile_override(struct charge_state_data *curr) } enum ec_status charger_profile_override_get_param(uint32_t param, - uint32_t *value) + uint32_t *value) { return EC_RES_INVALID_PARAM; } enum ec_status charger_profile_override_set_param(uint32_t param, - uint32_t value) + uint32_t value) { return EC_RES_INVALID_PARAM; } @@ -427,7 +427,7 @@ DECLARE_HOOK(HOOK_INIT, battery_runtime_init, HOOK_PRIO_LAST); #ifdef BATTERY_RUNTIME_TEST /* test command */ -static int command_manual_run_time(int argc, char **argv) +static int command_manual_run_time(int argc, const char **argv) { char *e = NULL; @@ -445,10 +445,10 @@ static int command_manual_run_time(int argc, char **argv) return EC_ERROR_PARAM1; cprints(CC_CHARGER, "manual run time set to %d sec (%d day)", - manual_run_time, (manual_run_time/86400)); + manual_run_time, (manual_run_time / 86400)); return EC_SUCCESS; } DECLARE_CONSOLE_COMMAND(rt, command_manual_run_time, "<battery_run_time_sec>", - "Set manual run time for test"); + "Set manual run time for test"); #endif diff --git a/board/chronicler/board.h b/board/chronicler/board.h index 1f6fb0f287..71ef0bd959 100644 --- a/board/chronicler/board.h +++ b/board/chronicler/board.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -37,27 +37,27 @@ #undef CONFIG_ACCEL_FIFO_SIZE /* USB Type C and USB PD defines */ -#define CONFIG_USB_PD_PORT_MAX_COUNT 2 +#define CONFIG_USB_PD_PORT_MAX_COUNT 2 /* TODO: b/144165680 - measure and check these values on Volteer */ -#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ -#define PD_POWER_SUPPLY_TURN_OFF_DELAY 30000 /* us */ +#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ +#define PD_POWER_SUPPLY_TURN_OFF_DELAY 30000 /* us */ /* * SN5S30 PPC supports up to 24V VBUS source and sink, however passive USB-C * cables only support up to 60W. */ -#define PD_OPERATING_POWER_MW 15000 -#define PD_MAX_POWER_MW 60000 -#define PD_MAX_CURRENT_MA 3000 -#define PD_MAX_VOLTAGE_MV 20000 +#define PD_OPERATING_POWER_MW 15000 +#define PD_MAX_POWER_MW 60000 +#define PD_MAX_CURRENT_MA 3000 +#define PD_MAX_VOLTAGE_MV 20000 /* USB Type A Features */ -#define USB_PORT_COUNT 1 +#define USB_PORT_COUNT 1 #define CONFIG_USB_PORT_POWER_DUMB /* USBC PPC*/ -#define CONFIG_USBC_PPC_SN5S330 /* USBC port C0 */ -#define CONFIG_USBC_PPC_SYV682X /* USBC port C1 */ +#define CONFIG_USBC_PPC_SN5S330 /* USBC port C0 */ +#define CONFIG_USBC_PPC_SYV682X /* USBC port C1 */ #define CONFIG_USB_PD_FRS_PPC #undef CONFIG_USB_PD_TCPC_RUNTIME_CONFIG #undef CONFIG_USB_PD_TCPM_TUSB422 @@ -72,8 +72,8 @@ #define CONFIG_FAN_RPM_CUSTOM /* charger defines */ -#define CONFIG_CHARGER_SENSE_RESISTOR 10 -#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 +#define CONFIG_CHARGER_SENSE_RESISTOR 10 +#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 #define CONFIG_CHARGER_PROFILE_OVERRIDE /* Retimer */ @@ -89,44 +89,44 @@ * then redefined here to so it's more clear which signal is being used for * which purpose. */ -#define GPIO_AC_PRESENT GPIO_ACOK_OD -#define GPIO_EC_INT_L GPIO_EC_PCH_INT_ODL -#define GPIO_EN_PP5000 GPIO_EN_PP5000_A -#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW -#define GPIO_LID_OPEN GPIO_EC_LID_OPEN -#define GPIO_KBD_KSO2 GPIO_EC_KSO_02_INV -#define GPIO_PACKET_MODE_EN GPIO_EC_H1_PACKET_MODE -#define GPIO_PCH_WAKE_L GPIO_EC_PCH_WAKE_ODL -#define GPIO_PCH_PWRBTN_L GPIO_EC_PCH_PWR_BTN_ODL -#define GPIO_PCH_RSMRST_L GPIO_EC_PCH_RSMRST_ODL -#define GPIO_PCH_RTCRST GPIO_EC_PCH_RTCRST -#define GPIO_PCH_SLP_S0_L GPIO_SLP_S0_L -#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L -#define GPIO_PCH_DSW_PWROK GPIO_EC_PCH_DSW_PWROK -#define GPIO_POWER_BUTTON_L GPIO_H1_EC_PWR_BTN_ODL -#define GPIO_CPU_PROCHOT GPIO_EC_PROCHOT_ODL -#define GPIO_SYS_RESET_L GPIO_SYS_RST_ODL -#define GPIO_WP_L GPIO_EC_WP_L -#define GPIO_USB_C1_BC12_INT_ODL GPIO_USB_C1_MIX_INT_ODL +#define GPIO_AC_PRESENT GPIO_ACOK_OD +#define GPIO_EC_INT_L GPIO_EC_PCH_INT_ODL +#define GPIO_EN_PP5000 GPIO_EN_PP5000_A +#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW +#define GPIO_LID_OPEN GPIO_EC_LID_OPEN +#define GPIO_KBD_KSO2 GPIO_EC_KSO_02_INV +#define GPIO_PACKET_MODE_EN GPIO_EC_H1_PACKET_MODE +#define GPIO_PCH_WAKE_L GPIO_EC_PCH_WAKE_ODL +#define GPIO_PCH_PWRBTN_L GPIO_EC_PCH_PWR_BTN_ODL +#define GPIO_PCH_RSMRST_L GPIO_EC_PCH_RSMRST_ODL +#define GPIO_PCH_RTCRST GPIO_EC_PCH_RTCRST +#define GPIO_PCH_SLP_S0_L GPIO_SLP_S0_L +#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L +#define GPIO_PCH_DSW_PWROK GPIO_EC_PCH_DSW_PWROK +#define GPIO_POWER_BUTTON_L GPIO_H1_EC_PWR_BTN_ODL +#define GPIO_CPU_PROCHOT GPIO_EC_PROCHOT_ODL +#define GPIO_SYS_RESET_L GPIO_SYS_RST_ODL +#define GPIO_WP_L GPIO_EC_WP_L +#define GPIO_USB_C1_BC12_INT_ODL GPIO_USB_C1_MIX_INT_ODL /* I2C Bus Configuration */ #define CONFIG_I2C -#define I2C_PORT_USB_C0 NPCX_I2C_PORT1_0 -#define I2C_PORT_USB_C1 NPCX_I2C_PORT2_0 -#define I2C_PORT_USB_1_MIX NPCX_I2C_PORT3_0 -#define I2C_PORT_POWER NPCX_I2C_PORT5_0 -#define I2C_PORT_EEPROM NPCX_I2C_PORT7_0 +#define I2C_PORT_USB_C0 NPCX_I2C_PORT1_0 +#define I2C_PORT_USB_C1 NPCX_I2C_PORT2_0 +#define I2C_PORT_USB_1_MIX NPCX_I2C_PORT3_0 +#define I2C_PORT_POWER NPCX_I2C_PORT5_0 +#define I2C_PORT_EEPROM NPCX_I2C_PORT7_0 -#define I2C_PORT_BATTERY I2C_PORT_POWER -#define I2C_PORT_CHARGER I2C_PORT_EEPROM +#define I2C_PORT_BATTERY I2C_PORT_POWER +#define I2C_PORT_CHARGER I2C_PORT_EEPROM -#define I2C_ADDR_EEPROM_FLAGS 0x50 +#define I2C_ADDR_EEPROM_FLAGS 0x50 #define CONFIG_I2C_CONTROLLER #define CONFIG_DEBUG_ASSERT_BRIEF /* Disable volume button command in EC console */ -#undef CONFIG_CMD_BUTTON +#undef CONFIG_CMD_BUTTON /* Disable volume button in ectool */ #undef CONFIG_HOSTCMD_BUTTON @@ -141,16 +141,9 @@ #include "usbc_config.h" -enum battery_type { - BATTERY_NVT_CP813907, - BATTERY_TYPE_COUNT -}; +enum battery_type { BATTERY_NVT_CP813907, BATTERY_TYPE_COUNT }; -enum pwm_channel { - PWM_CH_FAN, - PWM_CH_KBLIGHT, - PWM_CH_COUNT -}; +enum pwm_channel { PWM_CH_FAN, PWM_CH_KBLIGHT, PWM_CH_COUNT }; void board_reset_pd_mcu(void); diff --git a/board/chronicler/build.mk b/board/chronicler/build.mk index c0daa31eaa..f317b88795 100644 --- a/board/chronicler/build.mk +++ b/board/chronicler/build.mk @@ -1,5 +1,5 @@ # -*- makefile -*- -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. # diff --git a/board/chronicler/cbi.c b/board/chronicler/cbi.c index 210207eeac..712461cd2c 100644 --- a/board/chronicler/cbi.c +++ b/board/chronicler/cbi.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/board/chronicler/ec.tasklist b/board/chronicler/ec.tasklist index df7495f2a1..644c36cd37 100644 --- a/board/chronicler/ec.tasklist +++ b/board/chronicler/ec.tasklist @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/board/chronicler/gpio.inc b/board/chronicler/gpio.inc index b8b8d4f5e7..b0a9ad6981 100644 --- a/board/chronicler/gpio.inc +++ b/board/chronicler/gpio.inc @@ -1,6 +1,6 @@ /* -*- mode:c -*- * - * Copyright 2021 The Chromium OS Authors. All rights reserved. + * Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -16,7 +16,7 @@ GPIO_INT(ACOK_OD, PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, ex /* Power sequencing interrupts */ GPIO_INT(SLP_S0_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt) -#ifndef CONFIG_HOSTCMD_ESPI_VW_SLP_S3 +#ifndef CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S3 GPIO_INT(SLP_S3_L, PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt) #endif GPIO_INT(SLP_SUS_L, PIN(D, 7), GPIO_INT_BOTH, power_signal_interrupt) diff --git a/board/chronicler/keyboard.c b/board/chronicler/keyboard.c index b9cc378295..9e04d77ca3 100644 --- a/board/chronicler/keyboard.c +++ b/board/chronicler/keyboard.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/board/chronicler/led.c b/board/chronicler/led.c index dfa7fefa1b..8fd743101a 100644 --- a/board/chronicler/led.c +++ b/board/chronicler/led.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -21,10 +21,10 @@ #define POWER_LED_ON 0 #define POWER_LED_OFF 1 -#define LED_CYCLE_TIME_MS (2 * 1000) +#define LED_CYCLE_TIME_MS (2 * 1000) #define LED_TICKS_PER_CYCLE (LED_CYCLE_TIME_MS / HOOK_TICK_INTERVAL_MS) -#define LED_ON_TIME_MS (1 * 1000) -#define LED_ON_TICKS (LED_ON_TIME_MS / HOOK_TICK_INTERVAL_MS) +#define LED_ON_TIME_MS (1 * 1000) +#define LED_ON_TICKS (LED_ON_TIME_MS / HOOK_TICK_INTERVAL_MS) const enum ec_led_id supported_led_ids[] = { EC_LED_ID_LEFT_LED, @@ -37,22 +37,19 @@ enum led_color { LED_OFF = 0, LED_AMBER, LED_WHITE, - LED_COLOR_COUNT /* Number of colors, not a color itself */ + LED_COLOR_COUNT /* Number of colors, not a color itself */ }; -enum led_port { - RIGHT_PORT = 0, - LEFT_PORT -}; +enum led_port { RIGHT_PORT = 0, LEFT_PORT }; static void led_set_color_battery(enum led_port port, enum led_color color) { enum gpio_signal amber_led, white_led; amber_led = (port == RIGHT_PORT ? GPIO_C0_CHARGE_LED_AMBER_L : - GPIO_C1_CHARGE_LED_AMBER_L); + GPIO_C1_CHARGE_LED_AMBER_L); white_led = (port == RIGHT_PORT ? GPIO_C0_CHARGE_LED_WHITE_L : - GPIO_C1_CHARGE_LED_WHITE_L); + GPIO_C1_CHARGE_LED_WHITE_L); switch (color) { case LED_WHITE: @@ -124,17 +121,16 @@ static void set_active_port_color(enum led_color color) if (led_auto_control_is_enabled(EC_LED_ID_RIGHT_LED)) led_set_color_battery(RIGHT_PORT, - (port == RIGHT_PORT) ? color : LED_OFF); + (port == RIGHT_PORT) ? color : LED_OFF); if (led_auto_control_is_enabled(EC_LED_ID_LEFT_LED)) led_set_color_battery(LEFT_PORT, - (port == LEFT_PORT) ? color : LED_OFF); + (port == LEFT_PORT) ? color : LED_OFF); } static void led_set_battery(void) { static int battery_ticks; static int suspend_ticks; - uint32_t chflags = charge_get_flags(); battery_ticks++; @@ -144,14 +140,13 @@ static void led_set_battery(void) * LEDs to indicate system suspend without charging state. */ if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND) && - charge_get_state() != PWR_STATE_CHARGE) { - + charge_get_state() != PWR_STATE_CHARGE) { suspend_ticks++; - led_set_color_battery(RIGHT_PORT, suspend_ticks & 0x4 ? - LED_WHITE : LED_OFF); - led_set_color_battery(LEFT_PORT, suspend_ticks & 0x4 ? - LED_WHITE : LED_OFF); + led_set_color_battery( + RIGHT_PORT, suspend_ticks & 0x4 ? LED_WHITE : LED_OFF); + led_set_color_battery( + LEFT_PORT, suspend_ticks & 0x4 ? LED_WHITE : LED_OFF); return; } @@ -165,9 +160,12 @@ static void led_set_battery(void) case PWR_STATE_DISCHARGE: if (led_auto_control_is_enabled(EC_LED_ID_RIGHT_LED)) { if (charge_get_percent() < 10) - led_set_color_battery(RIGHT_PORT, - (battery_ticks % LED_TICKS_PER_CYCLE - < LED_ON_TICKS) ? LED_WHITE : LED_OFF); + led_set_color_battery( + RIGHT_PORT, + (battery_ticks % LED_TICKS_PER_CYCLE < + LED_ON_TICKS) ? + LED_WHITE : + LED_OFF); else led_set_color_battery(RIGHT_PORT, LED_OFF); } @@ -176,19 +174,20 @@ static void led_set_battery(void) led_set_color_battery(LEFT_PORT, LED_OFF); break; case PWR_STATE_ERROR: - set_active_port_color((battery_ticks & 0x2) ? - LED_WHITE : LED_OFF); + set_active_port_color((battery_ticks & 0x2) ? LED_WHITE : + LED_OFF); break; case PWR_STATE_CHARGE_NEAR_FULL: set_active_port_color(LED_WHITE); break; case PWR_STATE_IDLE: /* External power connected in IDLE */ - if (chflags & CHARGE_FLAG_FORCE_IDLE) - set_active_port_color((battery_ticks % - LED_TICKS_PER_CYCLE < LED_ON_TICKS) ? - LED_AMBER : LED_OFF); - else - set_active_port_color(LED_WHITE); + set_active_port_color(LED_WHITE); + break; + case PWR_STATE_FORCED_IDLE: + set_active_port_color( + (battery_ticks % LED_TICKS_PER_CYCLE < LED_ON_TICKS) ? + LED_AMBER : + LED_OFF); break; default: /* Other states don't alter LED behavior */ diff --git a/board/chronicler/usbc_config.c b/board/chronicler/usbc_config.c index c2783dd755..b05cd4ecfd 100644 --- a/board/chronicler/usbc_config.c +++ b/board/chronicler/usbc_config.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -23,18 +23,21 @@ #include "driver/tcpm/tusb422_public.h" #include "driver/tcpm/tcpci.h" -#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args) +#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ##args) /* * USB3 DB mux configuration - the top level mux still needs to be set to the * virtual_usb_mux_driver so the AP gets notified of mux changes and updates * the TCSS configuration on state changes. */ -static const struct usb_mux usbc1_usb3_db_retimer = { - .usb_port = USBC_PORT_C1, - .driver = &tcpci_tcpm_usb_mux_driver, - .hpd_update = &ps8xxx_tcpc_update_hpd_status, - .next_mux = NULL, +static const struct usb_mux_chain usbc1_usb3_db_retimer = { + .mux = + &(const struct usb_mux){ + .usb_port = USBC_PORT_C1, + .driver = &tcpci_tcpm_usb_mux_driver, + .hpd_update = &ps8xxx_tcpc_update_hpd_status, + }, + .next = NULL, }; /******************************************************************************/ @@ -104,17 +107,21 @@ const int usb_port_enable[USB_PORT_COUNT] = { /******************************************************************************/ /* USBC mux configuration - Tiger Lake includes internal mux */ -const struct usb_mux usb_muxes[] = { +const struct usb_mux_chain usb_muxes[] = { [USBC_PORT_C0] = { - .usb_port = USBC_PORT_C0, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, + .mux = &(const struct usb_mux) { + .usb_port = USBC_PORT_C0, + .driver = &virtual_usb_mux_driver, + .hpd_update = &virtual_hpd_update, + }, }, [USBC_PORT_C1] = { - .usb_port = USBC_PORT_C1, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, - .next_mux = &usbc1_usb3_db_retimer, + .mux = &(const struct usb_mux) { + .usb_port = USBC_PORT_C1, + .driver = &virtual_usb_mux_driver, + .hpd_update = &virtual_hpd_update, + }, + .next = &usbc1_usb3_db_retimer, }, }; BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == USBC_PORT_COUNT); @@ -124,8 +131,7 @@ static void ps8815_reset(void) int val; gpio_set_level(GPIO_USB_C1_RT_RST_ODL, 0); - msleep(GENERIC_MAX(PS8XXX_RESET_DELAY_MS, - PS8815_PWR_H_RST_H_DELAY_MS)); + msleep(GENERIC_MAX(PS8XXX_RESET_DELAY_MS, PS8815_PWR_H_RST_H_DELAY_MS)); gpio_set_level(GPIO_USB_C1_RT_RST_ODL, 1); msleep(PS8815_FW_INIT_DELAY_MS); @@ -136,16 +142,16 @@ static void ps8815_reset(void) CPRINTS("%s: patching ps8815 registers", __func__); - if (i2c_read8(I2C_PORT_USB_C1, - PS8XXX_I2C_ADDR1_P2_FLAGS, 0x0f, &val) == EC_SUCCESS) + if (i2c_read8(I2C_PORT_USB_C1, PS8XXX_I2C_ADDR1_P2_FLAGS, 0x0f, &val) == + EC_SUCCESS) CPRINTS("ps8815: reg 0x0f was %02x", val); - if (i2c_write8(I2C_PORT_USB_C1, - PS8XXX_I2C_ADDR1_P2_FLAGS, 0x0f, 0x31) == EC_SUCCESS) + if (i2c_write8(I2C_PORT_USB_C1, PS8XXX_I2C_ADDR1_P2_FLAGS, 0x0f, + 0x31) == EC_SUCCESS) CPRINTS("ps8815: reg 0x0f set to 0x31"); - if (i2c_read8(I2C_PORT_USB_C1, - PS8XXX_I2C_ADDR1_P2_FLAGS, 0x0f, &val) == EC_SUCCESS) + if (i2c_read8(I2C_PORT_USB_C1, PS8XXX_I2C_ADDR1_P2_FLAGS, 0x0f, &val) == + EC_SUCCESS) CPRINTS("ps8815: reg 0x0f now %02x", val); } @@ -207,7 +213,7 @@ void board_reset_pd_mcu(void) /* Daughterboard specific reset for port 1 */ ps8815_reset(); usb_mux_hpd_update(USBC_PORT_C1, USB_PD_MUX_HPD_LVL_DEASSERTED | - USB_PD_MUX_HPD_IRQ_DEASSERTED); + USB_PD_MUX_HPD_IRQ_DEASSERTED); } static void board_tcpc_init(void) diff --git a/board/chronicler/usbc_config.h b/board/chronicler/usbc_config.h index 55dfce7621..7428d0c436 100644 --- a/board/chronicler/usbc_config.h +++ b/board/chronicler/usbc_config.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,11 +8,7 @@ #ifndef __CROS_EC_USBC_CONFIG_H #define __CROS_EC_USBC_CONFIG_H -enum usbc_port { - USBC_PORT_C0 = 0, - USBC_PORT_C1, - USBC_PORT_COUNT -}; +enum usbc_port { USBC_PORT_C0 = 0, USBC_PORT_C1, USBC_PORT_COUNT }; /* Configure the USB3 daughterboard type */ void config_usb3_db_type(void); |