diff options
Diffstat (limited to 'board/hoho')
-rw-r--r-- | board/hoho/board.c | 17 | ||||
-rw-r--r-- | board/hoho/board.h | 20 | ||||
-rw-r--r-- | board/hoho/build.mk | 2 | ||||
-rw-r--r-- | board/hoho/ec.tasklist | 2 | ||||
-rw-r--r-- | board/hoho/gpio.inc | 2 | ||||
-rw-r--r-- | board/hoho/usb_pd_config.h | 17 | ||||
-rw-r--r-- | board/hoho/usb_pd_pdo.c | 4 | ||||
-rw-r--r-- | board/hoho/usb_pd_pdo.h | 2 | ||||
-rw-r--r-- | board/hoho/usb_pd_policy.c | 53 |
9 files changed, 57 insertions, 62 deletions
diff --git a/board/hoho/board.c b/board/hoho/board.c index 07b772c826..e981c9ce87 100644 --- a/board/hoho/board.c +++ b/board/hoho/board.c @@ -1,4 +1,4 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. +/* Copyright 2014 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -98,7 +98,7 @@ void board_config_pre_init(void) /* enable SYSCFG clock */ STM32_RCC_APB2ENR |= BIT(0); /* Remap USART DMA to match the USART driver */ - STM32_SYSCFG_CFGR1 |= BIT(9) | BIT(10);/* Remap USART1 RX/TX DMA */ + STM32_SYSCFG_CFGR1 |= BIT(9) | BIT(10); /* Remap USART1 RX/TX DMA */ } #ifdef CONFIG_SPI_FLASH @@ -142,11 +142,10 @@ static void factory_validation_deferred(void) /* test mcdp via serial to validate function */ if (!mcdp_get_info(&info) && (MCDP_FAMILY(info.family) == 0x0010) && - (MCDP_CHIPID(info.chipid) == 0x2850)) { + (MCDP_CHIPID(info.chipid) == 0x2850)) { gpio_set_level(GPIO_MCDP_READY, 1); pd_log_event(PD_EVENT_VIDEO_CODEC, - PD_LOG_PORT_SIZE(0, sizeof(info)), - 0, &info); + PD_LOG_PORT_SIZE(0, sizeof(info)), 0, &info); } mcdp_disable(); @@ -167,7 +166,7 @@ static void board_init(void) gpio_set_level(GPIO_STM_READY, 1); /* factory test only */ /* Delay needed to allow HDMI MCU to boot. */ - hook_call_deferred(&factory_validation_deferred_data, 200*MSEC); + hook_call_deferred(&factory_validation_deferred_data, 200 * MSEC); } DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); @@ -175,13 +174,13 @@ DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); /* ADC channels */ const struct adc_t adc_channels[] = { /* USB PD CC lines sensing. Converted to mV (3300mV/4096). */ - [ADC_CH_CC1_PD] = {"USB_C_CC1_PD", 3300, 4096, 0, STM32_AIN(1)}, + [ADC_CH_CC1_PD] = { "USB_C_CC1_PD", 3300, 4096, 0, STM32_AIN(1) }, }; BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); -const void * const usb_strings[] = { +const void *const usb_strings[] = { [USB_STR_DESC] = usb_string_desc, - [USB_STR_VENDOR] = USB_STRING_DESC("Google Inc."), + [USB_STR_VENDOR] = USB_STRING_DESC("Google LLC"), [USB_STR_PRODUCT] = USB_STRING_DESC("Hoho"), [USB_STR_VERSION] = USB_STRING_DESC(CROS_EC_VERSION32), [USB_STR_BB_URL] = USB_STRING_DESC(USB_GOOGLE_TYPEC_URL), diff --git a/board/hoho/board.h b/board/hoho/board.h index 635abfbeda..7768ab7293 100644 --- a/board/hoho/board.h +++ b/board/hoho/board.h @@ -1,4 +1,4 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. +/* Copyright 2014 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -43,7 +43,7 @@ #define CONFIG_USB_PD_IDENTITY_HW_VERS 1 #define CONFIG_USB_PD_IDENTITY_SW_VERS 1 #define CONFIG_USB_PD_LOGGING -#undef CONFIG_EVENT_LOG_SIZE +#undef CONFIG_EVENT_LOG_SIZE #define CONFIG_EVENT_LOG_SIZE 256 #define CONFIG_USB_PD_PORT_MAX_COUNT 1 #define CONFIG_USB_PD_TCPC @@ -72,7 +72,7 @@ /* Timer selection */ #define TIM_CLOCK32 2 -#define TIM_ADC 3 +#define TIM_ADC 3 #include "gpio_signal.h" @@ -95,14 +95,14 @@ enum usb_strings { }; /* we are never a source : don't care about power supply */ -#define PD_POWER_SUPPLY_TURN_ON_DELAY 0 /* us */ +#define PD_POWER_SUPPLY_TURN_ON_DELAY 0 /* us */ #define PD_POWER_SUPPLY_TURN_OFF_DELAY 0 /* us */ /* Define typical operating power and max power */ #define PD_OPERATING_POWER_MW 1000 -#define PD_MAX_POWER_MW 1500 -#define PD_MAX_CURRENT_MA 300 -#define PD_MAX_VOLTAGE_MV 5000 +#define PD_MAX_POWER_MW 1500 +#define PD_MAX_CURRENT_MA 300 +#define PD_MAX_VOLTAGE_MV 5000 #endif /* !__ASSEMBLER__ */ @@ -110,10 +110,10 @@ enum usb_strings { #define USB_DEV_CLASS USB_CLASS_BILLBOARD /* USB interface indexes (use define rather than enum to expand them) */ -#define USB_IFACE_COUNT 0 +#define USB_IFACE_COUNT 0 /* USB endpoint indexes (use define rather than enum to expand them) */ -#define USB_EP_CONTROL 0 -#define USB_EP_COUNT 1 +#define USB_EP_CONTROL 0 +#define USB_EP_COUNT 1 #endif /* __CROS_EC_BOARD_H */ diff --git a/board/hoho/build.mk b/board/hoho/build.mk index 71cea3f845..b6fbbe7a9e 100644 --- a/board/hoho/build.mk +++ b/board/hoho/build.mk @@ -1,5 +1,5 @@ # -*- makefile -*- -# Copyright 2014 The Chromium OS Authors. All rights reserved. +# Copyright 2014 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. # diff --git a/board/hoho/ec.tasklist b/board/hoho/ec.tasklist index 41fc047d6a..5a82344122 100644 --- a/board/hoho/ec.tasklist +++ b/board/hoho/ec.tasklist @@ -1,4 +1,4 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. +/* Copyright 2014 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/board/hoho/gpio.inc b/board/hoho/gpio.inc index 6d0701ded1..56a4f8808e 100644 --- a/board/hoho/gpio.inc +++ b/board/hoho/gpio.inc @@ -1,6 +1,6 @@ /* -*- mode:c -*- * - * Copyright 2014 The Chromium OS Authors. All rights reserved. + * Copyright 2014 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/board/hoho/usb_pd_config.h b/board/hoho/usb_pd_config.h index 2f01c275a8..5a7dfd12a6 100644 --- a/board/hoho/usb_pd_config.h +++ b/board/hoho/usb_pd_config.h @@ -1,4 +1,4 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. +/* Copyright 2014 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -49,7 +49,7 @@ static inline void spi_enable_clock(int port) #define TIM_TX_CCR_IDX(p) TIM_TX_CCR_C0 #define TIM_RX_CCR_IDX(p) TIM_RX_CCR_C0 -#define TIM_CCR_CS 1 +#define TIM_CCR_CS 1 #define EXTI_COMP_MASK(p) BIT(21) #define IRQ_COMP STM32_IRQ_COMP /* triggers packet detection on comparator falling edge */ @@ -88,9 +88,8 @@ static inline void pd_tx_enable(int port, int polarity) static inline void pd_tx_disable(int port, int polarity) { /* output low on SPI TX (PB4) to disable the FET */ - STM32_GPIO_MODER(GPIO_B) = (STM32_GPIO_MODER(GPIO_B) - & ~(3 << (2*4))) - | (1 << (2*4)); + STM32_GPIO_MODER(GPIO_B) = + (STM32_GPIO_MODER(GPIO_B) & ~(3 << (2 * 4))) | (1 << (2 * 4)); /* put the low level reference in Hi-Z */ gpio_set_level(GPIO_PD_CC1_TX_EN, 0); } @@ -101,8 +100,8 @@ static inline void pd_select_polarity(int port, int polarity) * use the right comparator : CC1 -> PA1 (COMP1 INP) * use VrefInt / 2 as INM (about 600mV) */ - STM32_COMP_CSR = (STM32_COMP_CSR & ~STM32_COMP_CMP1INSEL_MASK) - | STM32_COMP_CMP1EN | STM32_COMP_CMP1INSEL_VREF12; + STM32_COMP_CSR = (STM32_COMP_CSR & ~STM32_COMP_CMP1INSEL_MASK) | + STM32_COMP_CMP1EN | STM32_COMP_CMP1INSEL_VREF12; } /* Initialize pins used for TX and put them in Hi-Z */ @@ -111,7 +110,9 @@ static inline void pd_tx_init(void) gpio_config_module(MODULE_USB_PD, 1); } -static inline void pd_set_host_mode(int port, int enable) {} +static inline void pd_set_host_mode(int port, int enable) +{ +} static inline void pd_config_init(int port, uint8_t power_role) { diff --git a/board/hoho/usb_pd_pdo.c b/board/hoho/usb_pd_pdo.c index 19b5d127a5..c52179acfc 100644 --- a/board/hoho/usb_pd_pdo.c +++ b/board/hoho/usb_pd_pdo.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -13,6 +13,6 @@ const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); /* Fake PDOs : we just want our pre-defined voltages */ const uint32_t pd_snk_pdo[] = { - PDO_FIXED(5000, 500, PDO_FIXED_COMM_CAP), + PDO_FIXED(5000, 500, PDO_FIXED_COMM_CAP), }; const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); diff --git a/board/hoho/usb_pd_pdo.h b/board/hoho/usb_pd_pdo.h index 8a43db795e..e04c3aa677 100644 --- a/board/hoho/usb_pd_pdo.h +++ b/board/hoho/usb_pd_pdo.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/board/hoho/usb_pd_policy.c b/board/hoho/usb_pd_policy.c index 73f3fca16e..baf05d0e71 100644 --- a/board/hoho/usb_pd_policy.c +++ b/board/hoho/usb_pd_policy.c @@ -1,4 +1,4 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. +/* Copyright 2014 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -21,8 +21,8 @@ #include "usb_pd_tcpm.h" #include "util.h" -#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) -#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) +#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ##args) +#define CPRINTS(format, args...) cprints(CC_USBPD, format, ##args) /* Holds valid object position (opos) for entered mode */ static int alt_mode[PD_AMODE_COUNT]; @@ -54,22 +54,18 @@ __override int pd_check_power_swap(int port) return 0; } -__override int pd_check_data_swap(int port, - enum pd_data_role data_role) +__override int pd_check_data_swap(int port, enum pd_data_role data_role) { /* Always refuse data swap */ return 0; } -__override void pd_check_pr_role(int port, - enum pd_power_role pr_role, +__override void pd_check_pr_role(int port, enum pd_power_role pr_role, int flags) { } -__override void pd_check_dr_role(int port, - enum pd_data_role dr_role, - int flags) +__override void pd_check_dr_role(int port, enum pd_data_role dr_role, int flags) { } /* ----------------- Vendor Defined Messages ------------------ */ @@ -82,8 +78,8 @@ const uint32_t vdo_idh = VDO_IDH(0, /* data caps as USB host */ const uint32_t vdo_product = VDO_PRODUCT(CONFIG_USB_PID, CONFIG_USB_BCD_DEV); const uint32_t vdo_ama = VDO_AMA(CONFIG_USB_PD_IDENTITY_HW_VERS, - CONFIG_USB_PD_IDENTITY_SW_VERS, - 0, 0, 0, 0, /* SS[TR][12] */ + CONFIG_USB_PD_IDENTITY_SW_VERS, 0, 0, 0, + 0, /* SS[TR][12] */ 0, /* Vconn power */ 0, /* Vconn power required */ 1, /* Vbus power required */ @@ -109,18 +105,16 @@ static int svdm_response_svids(int port, uint32_t *payload) #define OPOS_DP 1 #define OPOS_GFU 1 -const uint32_t vdo_dp_modes[1] = { - VDO_MODE_DP(0, /* UFP pin cfg supported : none */ +const uint32_t vdo_dp_modes[1] = { + VDO_MODE_DP(0, /* UFP pin cfg supported : none */ MODE_DP_PIN_C, /* DFP pin cfg supported */ - 1, /* no usb2.0 signalling in AMode */ - CABLE_PLUG, /* its a plug */ - MODE_DP_V13, /* DPv1.3 Support, no Gen2 */ - MODE_DP_SNK) /* Its a sink only */ + 1, /* no usb2.0 signalling in AMode */ + CABLE_PLUG, /* its a plug */ + MODE_DP_V13, /* DPv1.3 Support, no Gen2 */ + MODE_DP_SNK) /* Its a sink only */ }; -const uint32_t vdo_goog_modes[1] = { - VDO_MODE_GOOGLE(MODE_GOOGLE_FU) -}; +const uint32_t vdo_goog_modes[1] = { VDO_MODE_GOOGLE(MODE_GOOGLE_FU) }; static int svdm_response_modes(int port, uint32_t *payload) { @@ -142,13 +136,15 @@ static int dp_status(int port, uint32_t *payload) if (opos != OPOS_DP) return 0; /* nak */ - payload[1] = VDO_DP_STATUS(0, /* IRQ_HPD */ - (hpd == 1), /* HPD_HI|LOW */ - 0, /* request exit DP */ - 0, /* request exit USB */ - 0, /* MF pref */ + payload[1] = VDO_DP_STATUS(0, /* IRQ_HPD */ + (hpd == 1), /* HPD_HI|LOW */ + 0, /* request exit DP */ + 0, /* request exit USB */ + 0, /* MF pref */ gpio_get_level(GPIO_PD_SBU_ENABLE), - 0, /* power low */ + 0, /* power + low + */ 0x2); return 2; } @@ -227,8 +223,7 @@ const struct svdm_response svdm_rsp = { .exit_mode = &svdm_exit_mode, }; -int pd_custom_vdm(int port, int cnt, uint32_t *payload, - uint32_t **rpayload) +int pd_custom_vdm(int port, int cnt, uint32_t *payload, uint32_t **rpayload) { int rsize; |