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-rw-r--r--board/nocturne/base_detect.c393
-rw-r--r--board/nocturne/battery.c151
-rw-r--r--board/nocturne/board.c810
-rw-r--r--board/nocturne/board.h280
-rw-r--r--board/nocturne/build.mk13
-rw-r--r--board/nocturne/ec.tasklist21
-rw-r--r--board/nocturne/gpio.inc121
-rw-r--r--board/nocturne/led.c138
-rw-r--r--board/nocturne/usb_pd_policy.c113
-rw-r--r--board/nocturne/vif_override.xml3
10 files changed, 0 insertions, 2043 deletions
diff --git a/board/nocturne/base_detect.c b/board/nocturne/base_detect.c
deleted file mode 100644
index 48c7b1f9dd..0000000000
--- a/board/nocturne/base_detect.c
+++ /dev/null
@@ -1,393 +0,0 @@
-/* Copyright 2018 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/*
- * Nocturne base detection code.
- *
- * Nocturne has two analog detection pins with which it monitors to determine
- * the base status: the attach, and detach pins.
- *
- * When the voltages cross a certain threshold, after some debouncing, the base
- * is deemed connected. Nocturne then applies the base power and monitors for
- * power faults from the eFuse as well as base disconnection. Similarly, once
- * the voltages cross a different threshold, after some debouncing, the base is
- * deemed disconnected. At this point, Nocturne disables the base power.
- */
-
-#include "adc.h"
-#include "base_state.h"
-#include "chipset.h"
-#include "common.h"
-#include "console.h"
-#include "gpio.h"
-#include "hooks.h"
-#include "timer.h"
-#include "util.h"
-
-#define CPRINTS(format, args...) cprints(CC_USB, format, ## args)
-#define CPRINTF(format, args...) cprintf(CC_USB, format, ## args)
-
-#define DEFAULT_POLL_TIMEOUT_US (250 * MSEC)
-#define DEBOUNCE_TIMEOUT_US (20 * MSEC)
-#define RAPID_DEBOUNCE_TIMEOUT_US (4 * MSEC)
-#define POWER_FAULT_RETRY_INTERVAL_US (15 * MSEC)
-
-/*
- * Number of times to attempt re-applying power within 1s when a fault occurs.
- */
-#define POWER_FAULT_MAX_RETRIES 3
-
-/* Thresholds for attach pin reading when power is not applied. */
-#define ATTACH_MIN_MV 300
-#define ATTACH_MAX_MV 900
-
-/* Threshold for attach pin reading when power IS applied. */
-#define PWREN_ATTACH_MIN_MV 2300
-
-/* Threshold for detach pin reading. */
-#define DETACH_MIN_MV 10
-
-/*
- * For the base to be considered detached, the average detach pin readings must
- * be below this value. The reason that this is higher than DETACH_MIN_MV is
- * that due to leakage current, sometimes the readings bounce under and over
- * DETACH_MIN_MV.
- */
-#define DETACH_MIN_AVG_MV 20
-
-/*
- * The number of recent samples used to determine average detach pin readings.
- */
-#define WINDOW_SIZE 5
-
-
-enum base_detect_state {
- BASE_DETACHED = 0,
- BASE_ATTACHED_DEBOUNCE,
- BASE_ATTACHED,
- BASE_DETACHED_DEBOUNCE,
- // Default for |forced_state|. Should be set only on |forced_state|.
- BASE_NO_FORCED_STATE,
-};
-
-static int debug;
-static enum base_detect_state forced_state = BASE_NO_FORCED_STATE;
-static enum base_detect_state state;
-static int detach_avg[WINDOW_SIZE]; /* Rolling buffer of detach pin readings. */
-static uint8_t last_idx; /* last insertion index into the buffer. */
-static timestamp_t detached_decision_deadline;
-
-static void enable_base_interrupts(int enable)
-{
- int (*fn)(enum gpio_signal) = enable ? gpio_enable_interrupt :
- gpio_disable_interrupt;
-
- /* This pin is present on boards newer than rev 0. */
- if (board_get_version() > 0)
- fn(GPIO_BASE_USB_FAULT_ODL);
-
- fn(GPIO_BASE_PWR_FAULT_ODL);
-}
-
-static void base_power_enable(int enable)
-{
- /* Nothing to do if the state is the same. */
- if (gpio_get_level(GPIO_BASE_PWR_EN) == enable)
- return;
-
- if (enable) {
- /* Apply power to the base only if the AP is on or sleeping. */
- if (chipset_in_state(CHIPSET_STATE_ON |
- CHIPSET_STATE_ANY_SUSPEND)) {
- gpio_set_level(GPIO_BASE_PWR_EN, 1);
- /* Allow time for the fault line to rise. */
- msleep(1);
- /* Monitor for base power faults. */
- enable_base_interrupts(1);
- }
- } else {
- /*
- * Disable power fault interrupt. It will read low when base
- * power is removed.
- */
- enable_base_interrupts(0);
- /* Now, remove power to the base. */
- gpio_set_level(GPIO_BASE_PWR_EN, 0);
- }
-
- CPRINTS("BP: %d", enable);
-}
-
-static void base_detect_changed(void)
-{
- switch (state) {
- case BASE_DETACHED:
- base_set_state(0);
- base_power_enable(0);
- break;
-
- case BASE_ATTACHED:
- base_set_state(1);
- base_power_enable(1);
- break;
-
- default:
- return;
- };
-}
-
-static int base_seems_attached(int attach_pin_mv, int detach_pin_mv)
-{
- /* We can't tell if we don't have good readings. */
- if (attach_pin_mv == ADC_READ_ERROR ||
- detach_pin_mv == ADC_READ_ERROR)
- return 0;
-
- if (gpio_get_level(GPIO_BASE_PWR_EN))
- return (attach_pin_mv >= PWREN_ATTACH_MIN_MV) &&
- (detach_pin_mv >= DETACH_MIN_MV);
- else
- return (attach_pin_mv <= ATTACH_MAX_MV) &&
- (attach_pin_mv >= ATTACH_MIN_MV) &&
- (detach_pin_mv <= DETACH_MIN_MV);
-}
-
-static int base_seems_detached(int attach_pin_mv, int detach_pin_mv)
-{
- /* We can't tell if we don't have good readings. */
- if (attach_pin_mv == ADC_READ_ERROR ||
- detach_pin_mv == ADC_READ_ERROR)
- return 0;
-
- return (attach_pin_mv >= PWREN_ATTACH_MIN_MV) &&
- (detach_pin_mv <= DETACH_MIN_MV);
-}
-
-static void set_state(enum base_detect_state new_state)
-{
- if (new_state != state) {
- CPRINTS("BD: st%d", new_state);
- state = new_state;
- }
-}
-
-static int average_detach_mv(void)
-{
- int i;
- int sum = 0;
-
- for (i = 0; i < WINDOW_SIZE; i++)
- sum += detach_avg[i];
-
- return sum / WINDOW_SIZE;
-}
-
-static void base_detect_deferred(void);
-DECLARE_DEFERRED(base_detect_deferred);
-static void base_detect_deferred(void)
-{
- int attach_reading;
- int detach_reading;
- int timeout = DEFAULT_POLL_TIMEOUT_US;
-
- if (forced_state != BASE_NO_FORCED_STATE) {
- if (state != forced_state) {
- CPRINTS("BD forced %s",
- forced_state == BASE_ATTACHED ?
- "attached" : "detached");
- set_state(forced_state);
- base_detect_changed();
- }
- return;
- }
-
- attach_reading = adc_read_channel(ADC_BASE_ATTACH);
- detach_reading = adc_read_channel(ADC_BASE_DETACH);
-
- /* Update the detach_avg */
- detach_avg[last_idx] = detach_reading;
-
- if (debug) {
- int i;
-
- CPRINTS("BD st%d: att: %dmV det: %dmV", state,
- attach_reading,
- detach_reading);
- CPRINTF("det readings = [");
- for (i = 0; i < WINDOW_SIZE; i++)
- CPRINTF("%d%s ", detach_avg[i],
- i == last_idx ? "*" : " ");
- CPRINTF("]\n");
- }
- last_idx = (last_idx + 1) % WINDOW_SIZE;
-
- switch (state) {
- case BASE_DETACHED:
- /* Check to see if a base may be attached. */
- if (base_seems_attached(attach_reading, detach_reading)) {
- timeout = DEBOUNCE_TIMEOUT_US;
- set_state(BASE_ATTACHED_DEBOUNCE);
- }
- break;
-
- case BASE_ATTACHED_DEBOUNCE:
- /* Check to see if it's still attached. */
- if (base_seems_attached(attach_reading, detach_reading)) {
- CPRINTS("BD: att: %dmV det: %dmV", attach_reading,
- detach_reading);
- set_state(BASE_ATTACHED);
- base_detect_changed();
- } else if (base_seems_detached(attach_reading,
- detach_reading)) {
- set_state(BASE_DETACHED);
- }
- break;
-
- case BASE_ATTACHED:
- /* Check to see if a base may be detached. */
- if (base_seems_detached(attach_reading, detach_reading)) {
- /*
- * The base seems detached based off of one reading.
- * Let's pay closer attention to the pins and then
- * decide if it really is detached or not. It could
- * have been just a spurious low reading.
- */
- timeout = RAPID_DEBOUNCE_TIMEOUT_US;
-
- /*
- * Set a deadline to make a call about actually being
- * detached. In the meantime, we'll collect samples
- * and calculate an average.
- */
- detached_decision_deadline = get_time();
- detached_decision_deadline.val += DEBOUNCE_TIMEOUT_US;
- set_state(BASE_DETACHED_DEBOUNCE);
- }
- break;
-
- case BASE_DETACHED_DEBOUNCE:
- /* Check to see if a base is still detached.
- *
- * We look at rolling average of the detach readings to make
- * sure one or two consecutive low samples don't result in a
- * false detach.
- */
- CPRINTS("BD: det avg: %d", average_detach_mv());
- if (timestamp_expired(detached_decision_deadline, NULL)) {
- /* Alright, time's up, time to decide. */
- if (average_detach_mv() < DETACH_MIN_AVG_MV) {
- set_state(BASE_DETACHED);
- base_detect_changed();
- } else {
- set_state(BASE_ATTACHED);
- }
- }
-
- /*
- * Shorten the timeout to collect more samples before the
- * deadline.
- */
- timeout = RAPID_DEBOUNCE_TIMEOUT_US;
- break;
- /* TODO(b/74239259): do you want to add an interrupt? */
-
- default:
- break;
- };
-
- /* Check again in the appropriate time only if the AP is on. */
- if (chipset_in_state(CHIPSET_STATE_ON | CHIPSET_STATE_ANY_SUSPEND))
- hook_call_deferred(&base_detect_deferred_data, timeout);
-};
-DECLARE_HOOK(HOOK_INIT, base_detect_deferred, HOOK_PRIO_INIT_ADC + 1);
-
-static void restart_state_machine(void)
-{
- /*
- * Since we do not poll in anything lower than S3, the base may or may
- * not be connected, therefore intentionally set the state to detached
- * such that we can detect and power on the base if necessary.
- */
- set_state(BASE_DETACHED);
- hook_call_deferred(&base_detect_deferred_data, 0);
-}
-DECLARE_HOOK(HOOK_CHIPSET_RESUME, restart_state_machine, HOOK_PRIO_DEFAULT);
-
-static void power_off_base(void)
-{
- base_power_enable(0);
-}
-DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, power_off_base, HOOK_PRIO_DEFAULT);
-
-static uint8_t base_power_on_attempts;
-static void clear_base_power_on_attempts_deferred(void)
-{
- base_power_on_attempts = 0;
-}
-DECLARE_DEFERRED(clear_base_power_on_attempts_deferred);
-
-static void check_and_reapply_base_power_deferred(void)
-{
- if (state != BASE_ATTACHED)
- return;
-
- if (base_power_on_attempts < POWER_FAULT_MAX_RETRIES) {
- CPRINTS("Reapply base pwr");
- base_power_enable(1);
- base_power_on_attempts++;
-
- hook_call_deferred(&clear_base_power_on_attempts_deferred_data,
- SECOND);
- }
-
-}
-DECLARE_DEFERRED(check_and_reapply_base_power_deferred);
-
-void base_pwr_fault_interrupt(enum gpio_signal s)
-{
- /* Inverted because active low. */
- int pwr_fault_detected = !gpio_get_level(GPIO_BASE_PWR_FAULT_ODL);
- int usb_fault_detected = s == GPIO_BASE_USB_FAULT_ODL;
-
- if (pwr_fault_detected | usb_fault_detected) {
- /* Turn off base power. */
- CPRINTS("Base Pwr Flt! %s%s", pwr_fault_detected ? "p" : "-",
- usb_fault_detected ? "u" : "-");
- base_power_enable(0);
-
- /*
- * Try and apply power in a bit if maybe it was just a temporary
- * condition.
- */
- hook_call_deferred(&check_and_reapply_base_power_deferred_data,
- POWER_FAULT_RETRY_INTERVAL_US);
- }
-}
-
-static int command_basedetectdebug(int argc, char **argv)
-{
- if ((argc > 1) && !parse_bool(argv[1], &debug))
- return EC_ERROR_PARAM1;
-
- CPRINTS("BD: %sst%d", forced_state != BASE_NO_FORCED_STATE ?
- "forced " : "", state);
- return EC_SUCCESS;
-}
-
-DECLARE_CONSOLE_COMMAND(basedebug, command_basedetectdebug, "[ena|dis]",
- "En/Disable base detection debug");
-
-
-void base_force_state(enum ec_set_base_state_cmd state)
-{
- if (state == EC_SET_BASE_STATE_ATTACH)
- forced_state = BASE_ATTACHED;
- else if (state == EC_SET_BASE_STATE_DETACH)
- forced_state = BASE_DETACHED;
- else
- forced_state = BASE_NO_FORCED_STATE;
-
- hook_call_deferred(&base_detect_deferred_data, 0);
-}
diff --git a/board/nocturne/battery.c b/board/nocturne/battery.c
deleted file mode 100644
index ff3f16fa33..0000000000
--- a/board/nocturne/battery.c
+++ /dev/null
@@ -1,151 +0,0 @@
-/* Copyright 2018 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- *
- * Battery pack vendor provided charging profile
- */
-
-#include "battery.h"
-#include "battery_smart.h"
-#include "charge_manager.h"
-#include "charger.h"
-#include "chipset.h"
-#include "charge_state_v2.h"
-#include "common.h"
-#include "console.h"
-#include "ec_commands.h"
-#include "extpower.h"
-#include "hooks.h"
-#include "temp_sensor.h"
-#include "usb_pd.h"
-
-/* Shutdown mode parameter to write to manufacturer access register */
-#define SB_SHUTDOWN_DATA 0x0010
-
-/*
- * We need to stop charging the battery when the DRAM temperature sensor gets
- * over 47 C (320 K), and resume charging once it cools back down.
- */
-#define DRAM_STOPCHARGE_TEMP_K 320
-
-/* Battery info */
-static const struct battery_info info = {
- .voltage_max = 8880,
- .voltage_normal = 7700,
- .voltage_min = 6000,
- .precharge_current = 160,
- .start_charging_min_c = 10,
- .start_charging_max_c = 50,
- .charging_min_c = 10,
- .charging_max_c = 50,
- .discharging_min_c = -20,
- .discharging_max_c = 60,
-};
-
-int board_cut_off_battery(void)
-{
- int rv;
-
- /* Ship mode command must be sent twice to take effect */
- rv = sb_write(SB_MANUFACTURER_ACCESS, SB_SHUTDOWN_DATA);
- if (rv != EC_SUCCESS)
- return EC_RES_ERROR;
-
- rv = sb_write(SB_MANUFACTURER_ACCESS, SB_SHUTDOWN_DATA);
- return rv ? EC_RES_ERROR : EC_RES_SUCCESS;
-}
-
-const struct battery_info *battery_get_info(void)
-{
- return &info;
-}
-
-enum battery_disconnect_state battery_get_disconnect_state(void)
-{
- uint8_t data[6];
- int rv;
-
- /*
- * Take note if we find that the battery isn't in disconnect state,
- * and always return NOT_DISCONNECTED without probing the battery.
- * This assumes the battery will not go to disconnect state during
- * runtime.
- */
- static int not_disconnected;
-
- if (not_disconnected)
- return BATTERY_NOT_DISCONNECTED;
-
- /* Check if battery discharge FET is disabled. */
- rv = sb_read_mfgacc(PARAM_OPERATION_STATUS,
- SB_ALT_MANUFACTURER_ACCESS, data, sizeof(data));
- if (rv)
- return BATTERY_DISCONNECT_ERROR;
- if (~data[3] & (BATTERY_DISCHARGING_DISABLED)) {
- not_disconnected = 1;
- return BATTERY_NOT_DISCONNECTED;
- }
-
- /*
- * Battery discharge FET is disabled. Verify that we didn't enter this
- * state due to a safety fault.
- */
- rv = sb_read_mfgacc(PARAM_SAFETY_STATUS,
- SB_ALT_MANUFACTURER_ACCESS, data, sizeof(data));
- if (rv || data[2] || data[3] || data[4] || data[5])
- return BATTERY_DISCONNECT_ERROR;
-
- /* No safety fault, battery is disconnected */
- return BATTERY_DISCONNECTED;
-}
-
-enum ec_status charger_profile_override_get_param(uint32_t param,
- uint32_t *value)
-{
- return EC_RES_INVALID_PARAM;
-}
-
-enum ec_status charger_profile_override_set_param(uint32_t param,
- uint32_t value)
-{
- return EC_RES_INVALID_PARAM;
-}
-
-static int should_stopcharge(void)
-{
- int t_dram;
-
- /* We can only stop charging on AC, if AC is plugged in. */
- if (!gpio_get_level(GPIO_AC_PRESENT))
- return 0;
-
- /*
- * The DRAM temperature sensor is only available when the AP is on,
- * therefore only inhibit charging when we can actually read a
- * temperature.
- */
- if (chipset_in_state(CHIPSET_STATE_ON) &&
- !temp_sensor_read(TEMP_SENSOR_DRAM, &t_dram) &&
- (t_dram >= DRAM_STOPCHARGE_TEMP_K))
- return 1;
- else
- return 0;
-}
-
-int charger_profile_override(struct charge_state_data *curr)
-{
- static uint8_t stopcharge_on_ac;
- int enable_stopcharge;
-
- enable_stopcharge = should_stopcharge();
- if (enable_stopcharge != stopcharge_on_ac) {
- stopcharge_on_ac = enable_stopcharge;
- if (enable_stopcharge) {
- chgstate_set_manual_current(0);
- } else {
- chgstate_set_manual_current(-1);
- }
- }
-
- return 0;
-}
diff --git a/board/nocturne/board.c b/board/nocturne/board.c
deleted file mode 100644
index 5987bae025..0000000000
--- a/board/nocturne/board.c
+++ /dev/null
@@ -1,810 +0,0 @@
-/* Copyright 2018 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Nocturne board-specific configuration */
-
-#include "adc_chip.h"
-#include "button.h"
-#include "charge_manager.h"
-#include "charge_state.h"
-#include "charge_state_v2.h"
-#include "chipset.h"
-#include "common.h"
-#include "console.h"
-#include "compile_time_macros.h"
-#include "driver/accelgyro_bmi_common.h"
-#include "driver/als_opt3001.h"
-#include "driver/charger/isl923x.h"
-#include "driver/ppc/sn5s330.h"
-#include "driver/sync.h"
-#include "driver/tcpm/ps8xxx.h"
-#include "driver/temp_sensor/bd99992gw.h"
-#include "ec_commands.h"
-#include "extpower.h"
-#include "gpio.h"
-#include "hooks.h"
-#include "i2c.h"
-#include "lid_switch.h"
-#include "lpc.h"
-#include "mkbp_event.h"
-#include "motion_sense.h"
-#include "power.h"
-#include "power_button.h"
-#include "pwm.h"
-#include "pwm_chip.h"
-#include "registers.h"
-#include "system.h"
-#include "system_chip.h"
-#include "switch.h"
-#include "task.h"
-#include "tcpm/tcpci.h"
-#include "temp_sensor.h"
-#include "usb_mux.h"
-#include "usb_pd_tcpm.h"
-#include "usbc_ppc.h"
-#include "util.h"
-
-#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args)
-#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args)
-
-static void tcpc_alert_event(enum gpio_signal s)
-{
- int port = -1;
-
- switch (s) {
- case GPIO_USB_C0_PD_INT_ODL:
- port = 0;
- break;
- case GPIO_USB_C1_PD_INT_ODL:
- port = 1;
- break;
- default:
- return;
- }
-
- schedule_deferred_pd_interrupt(port);
-}
-
-/*
- * Nocturne shares the TCPC Alert# line with the TI SN5S330's interrupt line.
- * Therefore, we need to also check on that part.
- */
-static void usb_c_interrupt(enum gpio_signal s)
-{
- int port = (s == GPIO_USB_C0_PD_INT_ODL) ? 0 : 1;
-
- tcpc_alert_event(s);
- sn5s330_interrupt(port);
-}
-
-static void board_connect_c0_sbu_deferred(void)
-{
- /*
- * If CCD_MODE_ODL asserts, it means there's a debug accessory connected
- * and we should enable the SBU FETs.
- */
- ppc_set_sbu(0, 1);
-}
-DECLARE_DEFERRED(board_connect_c0_sbu_deferred);
-
-static void board_connect_c0_sbu(enum gpio_signal s)
-{
- hook_call_deferred(&board_connect_c0_sbu_deferred_data, 0);
-}
-
-#include "gpio_list.h"
-
-const enum gpio_signal hibernate_wake_pins[] = {
- GPIO_LID_OPEN,
- GPIO_AC_PRESENT,
- GPIO_POWER_BUTTON_L,
-};
-const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins);
-
-const struct adc_t adc_channels[] = {
- [ADC_BASE_ATTACH] = {
- "BASE ATTACH", NPCX_ADC_CH0, ADC_MAX_VOLT, ADC_READ_MAX + 1, 0
- },
-
- [ADC_BASE_DETACH] = {
- "BASE DETACH", NPCX_ADC_CH1, ADC_MAX_VOLT, ADC_READ_MAX + 1, 0
- },
-};
-
-/* PWM channels. Must be in the exactly same order as in enum pwm_channel. */
-const struct pwm_t pwm_channels[] = {
- [PWM_CH_DB0_LED_RED] = { 3, PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP,
- 986 },
- [PWM_CH_DB0_LED_GREEN] = { 0, PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP,
- 986 },
- [PWM_CH_DB0_LED_BLUE] = { 2, PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP,
- 986 },
- [PWM_CH_DB1_LED_RED] = { 7, PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP,
- 986 },
- [PWM_CH_DB1_LED_GREEN] = { 5, PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP,
- 986 },
- [PWM_CH_DB1_LED_BLUE] = { 6, PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP,
- 986 },
-};
-BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT);
-
-/* I2C port map */
-const struct i2c_port_t i2c_ports[] = {
- {
- "battery", I2C_PORT_BATTERY, 100, GPIO_EC_I2C4_BATTERY_SCL,
- GPIO_EC_I2C4_BATTERY_SDA
- },
-
- {
- "power", I2C_PORT_POWER, 100, GPIO_EC_I2C0_POWER_SCL,
- GPIO_EC_I2C0_POWER_SDA
- },
-
- {
- "als_gyro", I2C_PORT_ALS_GYRO, 400, GPIO_EC_I2C5_ALS_GYRO_SCL,
- GPIO_EC_I2C5_ALS_GYRO_SDA
- },
-
- {
- "usbc0", I2C_PORT_USB_C0, 100, GPIO_USB_C0_SCL, GPIO_USB_C0_SDA
- },
-
- {
- "usbc1", I2C_PORT_USB_C1, 100, GPIO_USB_C1_SCL, GPIO_USB_C1_SDA
- },
-};
-const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
-
-
-/*
- * Motion Sense
- */
-
-/* Lid Sensor mutex */
-static struct mutex g_lid_mutex;
-
-/* Sensor driver data */
-static struct bmi_drv_data_t g_bmi160_data;
-static struct opt3001_drv_data_t g_opt3001_data = {
- .scale = 1,
- .uscale = 0,
- .offset = 0,
-};
-
-/* Matrix to rotate accel/gyro into standard reference frame. */
-const mat33_fp_t lid_standard_ref = {
- { 0, FLOAT_TO_FP(1), 0},
- { FLOAT_TO_FP(-1), 0, 0},
- { 0, 0, FLOAT_TO_FP(1)}
-};
-
-struct motion_sensor_t motion_sensors[] = {
- [LID_ACCEL] = {
- .name = "BMI160 ACC",
- .active_mask = SENSOR_ACTIVE_S0_S3,
- .chip = MOTIONSENSE_CHIP_BMI160,
- .type = MOTIONSENSE_TYPE_ACCEL,
- .location = MOTIONSENSE_LOC_LID,
- .drv = &bmi160_drv,
- .mutex = &g_lid_mutex,
- .drv_data = &g_bmi160_data,
- .port = I2C_PORT_ALS_GYRO,
- .i2c_spi_addr_flags = BMI160_ADDR0_FLAGS,
- .rot_standard_ref = &lid_standard_ref,
- .default_range = 4, /* g, to meet CDD 7.3.1/C-1-4 reqs */
- .min_frequency = BMI_ACCEL_MIN_FREQ,
- .max_frequency = BMI_ACCEL_MAX_FREQ,
- .config = {
- /* EC setup accel for chrome usage */
- [SENSOR_CONFIG_EC_S0] = {
- .odr = 10000 | ROUND_UP_FLAG,
- },
- },
- },
-
- [LID_GYRO] = {
- .name = "BMI160 GYRO",
- .active_mask = SENSOR_ACTIVE_S0_S3,
- .chip = MOTIONSENSE_CHIP_BMI160,
- .type = MOTIONSENSE_TYPE_GYRO,
- .location = MOTIONSENSE_LOC_LID,
- .drv = &bmi160_drv,
- .mutex = &g_lid_mutex,
- .drv_data = &g_bmi160_data,
- .port = I2C_PORT_ALS_GYRO,
- .i2c_spi_addr_flags = BMI160_ADDR0_FLAGS,
- .rot_standard_ref = &lid_standard_ref,
- .default_range = 1000, /* dps */
- .min_frequency = BMI_GYRO_MIN_FREQ,
- .max_frequency = BMI_GYRO_MAX_FREQ,
- },
-
- [LID_ALS] = {
- .name = "Light",
- .active_mask = SENSOR_ACTIVE_S0_S3,
- .chip = MOTIONSENSE_CHIP_OPT3001,
- .type = MOTIONSENSE_TYPE_LIGHT,
- .location = MOTIONSENSE_LOC_LID,
- .drv = &opt3001_drv,
- .drv_data = &g_opt3001_data,
- .port = I2C_PORT_ALS_GYRO,
- .i2c_spi_addr_flags = OPT3001_I2C_ADDR_FLAGS,
- .rot_standard_ref = NULL,
- /* scale = 43.4513 http://b/111528815#comment14 */
- .default_range = 0x2b11a1,
- .min_frequency = OPT3001_LIGHT_MIN_FREQ,
- .max_frequency = OPT3001_LIGHT_MAX_FREQ,
- .config = {
- /* Run ALS sensor in S0 */
- [SENSOR_CONFIG_EC_S0] = {
- .odr = 1000,
- },
- },
- },
-
- [VSYNC] = {
- .name = "Camera VSYNC",
- .active_mask = SENSOR_ACTIVE_S0,
- .chip = MOTIONSENSE_CHIP_GPIO,
- .type = MOTIONSENSE_TYPE_SYNC,
- .location = MOTIONSENSE_LOC_CAMERA,
- .drv = &sync_drv,
- .default_range = 0,
- .min_frequency = 0,
- .max_frequency = 1,
- },
-};
-const unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors);
-
-/* ALS instances when LPC mapping is needed. Each entry directs to a sensor. */
-const struct motion_sensor_t *motion_als_sensors[] = {
- &motion_sensors[LID_ALS],
-};
-BUILD_ASSERT(ARRAY_SIZE(motion_als_sensors) == ALS_COUNT);
-
-static void disable_sensor_irqs(void)
-{
- /*
- * In S5, sensors are unpowered, therefore disable their interrupts on
- * shutdown.
- */
- gpio_disable_interrupt(GPIO_ACCELGYRO3_INT_L);
- gpio_disable_interrupt(GPIO_RCAM_VSYNC);
-}
-DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, disable_sensor_irqs, HOOK_PRIO_DEFAULT);
-
-static void enable_sensor_irqs(void)
-{
- /*
- * Re-enable the sensor interrupts when entering S0.
- */
- gpio_enable_interrupt(GPIO_ACCELGYRO3_INT_L);
- gpio_enable_interrupt(GPIO_RCAM_VSYNC);
-}
-DECLARE_HOOK(HOOK_CHIPSET_RESUME, enable_sensor_irqs, HOOK_PRIO_DEFAULT);
-
-struct ppc_config_t ppc_chips[] = {
- {
- .i2c_port = I2C_PORT_USB_C0,
- .i2c_addr_flags = SN5S330_ADDR0_FLAGS,
- .drv = &sn5s330_drv
- },
- {
- .i2c_port = I2C_PORT_USB_C1,
- .i2c_addr_flags = SN5S330_ADDR0_FLAGS,
- .drv = &sn5s330_drv,
- },
-};
-unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips);
-
-const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = {
- {
- .bus_type = EC_BUS_TYPE_I2C,
- .i2c_info = {
- .port = I2C_PORT_USB_C0,
- .addr_flags = PS8751_I2C_ADDR1_FLAGS,
- },
- .drv = &ps8xxx_tcpm_drv,
- },
- {
- .bus_type = EC_BUS_TYPE_I2C,
- .i2c_info = {
- .port = I2C_PORT_USB_C1,
- .addr_flags = PS8751_I2C_ADDR1_FLAGS,
- },
- .drv = &ps8xxx_tcpm_drv,
- },
-};
-
-const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = {
- {
- .usb_port = 0,
- .driver = &tcpci_tcpm_usb_mux_driver,
- .hpd_update = &ps8xxx_tcpc_update_hpd_status,
- },
-
- {
- .usb_port = 1,
- .driver = &tcpci_tcpm_usb_mux_driver,
- .hpd_update = &ps8xxx_tcpc_update_hpd_status,
- },
-};
-
-const struct charger_config_t chg_chips[] = {
- {
- .i2c_port = I2C_PORT_CHARGER,
- .i2c_addr_flags = ISL923X_ADDR_FLAGS,
- .drv = &isl923x_drv,
- },
-};
-
-void board_chipset_startup(void)
-{
- gpio_set_level(GPIO_EN_5V, 1);
-}
-DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_chipset_startup, HOOK_PRIO_DEFAULT);
-
-static void imvp8_tune_deferred(void)
-{
- /* For the IMVP8, reduce the steps during decay from 3 to 1. */
- if (i2c_write16(I2C_PORT_POWER, I2C_ADDR_MP2949_FLAGS,
- 0xFA, 0x0AC5))
- CPRINTS("Failed to change step decay!");
-}
-DECLARE_DEFERRED(imvp8_tune_deferred);
-
-void board_chipset_resume(void)
-{
- /* Write to the IMVP8 after 250ms. */
- hook_call_deferred(&imvp8_tune_deferred_data, 250 * MSEC);
-}
-DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_chipset_resume, HOOK_PRIO_DEFAULT);
-
-void board_chipset_shutdown(void)
-{
- gpio_set_level(GPIO_EN_5V, 0);
-}
-DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, board_chipset_shutdown, HOOK_PRIO_DEFAULT);
-
-int board_get_version(void)
-{
- static int board_version = -1;
-
- if (board_version == -1) {
- board_version = 0;
- /* BRD_ID0 is LSb. */
- if (gpio_get_level(GPIO_EC_BRD_ID0))
- board_version |= 0x1;
- if (gpio_get_level(GPIO_EC_BRD_ID1))
- board_version |= 0x2;
- if (gpio_get_level(GPIO_EC_BRD_ID2))
- board_version |= 0x4;
- if (gpio_get_level(GPIO_EC_BRD_ID3))
- board_version |= 0x8;
- }
-
- return board_version;
-}
-
-void board_hibernate(void)
-{
- int p;
-
- /* Configure PSL pins */
- for (p = 0; p < hibernate_wake_pins_used; p++)
- system_config_psl_mode(hibernate_wake_pins[p]);
-
- /*
- * Enter PSL mode. Note that on Nocturne, simply enabling PSL mode does
- * not cut the EC's power. Therefore, we'll need to cut off power via
- * the ROP PMIC afterwards.
- */
- system_enter_psl_mode();
-
- /* Cut off DSW power via the ROP PMIC. */
- i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992_FLAGS, 0x49, 0x1);
-
- /* Wait for power to be cut. */
- while (1)
- ;
-}
-
-static void board_init(void)
-{
- /* Enable USB Type-C interrupts. */
- gpio_enable_interrupt(GPIO_USB_C0_PD_INT_ODL);
- gpio_enable_interrupt(GPIO_USB_C1_PD_INT_ODL);
-
- /* Enable sensor IRQs if we're in S0. */
- if (chipset_in_state(CHIPSET_STATE_ON))
- enable_sensor_irqs();
-}
-DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
-
-int board_is_i2c_port_powered(int port)
-{
- if (port != I2C_PORT_ALS_GYRO)
- return 1;
-
- /* The sensors are not powered in anything lower than S5. */
- return chipset_in_state(CHIPSET_STATE_ANY_OFF) ? 0 : 1;
-}
-
-static void board_lid_change(void)
-{
- /* This is done in hardware on old revisions. */
- if (board_get_version() <= 1)
- return;
-
- if (lid_is_open())
- gpio_set_level(GPIO_UHALL_PWR_EN, 1);
- else
- gpio_set_level(GPIO_UHALL_PWR_EN, 0);
-}
-DECLARE_HOOK(HOOK_LID_CHANGE, board_lid_change, HOOK_PRIO_DEFAULT);
-
-static void board_pmic_disable_slp_s0_vr_decay(void)
-{
- /*
- * VCCIOCNT:
- * Bit 6 (0) - Disable decay of VCCIO on SLP_S0# assertion
- * Bits 5:4 (11) - Nominal output voltage: 0.850V
- * Bits 3:2 (10) - VR set to AUTO on SLP_S0# de-assertion
- * Bits 1:0 (10) - VR set to AUTO operating mode
- */
- i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992_FLAGS, 0x30, 0x3a);
-
- /*
- * V18ACNT:
- * Bits 7:6 (00) - Disable low power mode on SLP_S0# assertion
- * Bits 5:4 (10) - Nominal voltage set to 1.8V
- * Bits 3:2 (10) - VR set to AUTO on SLP_S0# de-assertion
- * Bits 1:0 (10) - VR set to AUTO operating mode
- */
- i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992_FLAGS, 0x34, 0x2a);
-
- /*
- * V085ACNT:
- * Bits 7:6 (00) - Disable low power mode on SLP_S0# assertion
- * Bits 5:4 (10) - Nominal voltage 0.85V
- * Bits 3:2 (10) - VR set to AUTO on SLP_S0# de-assertion
- * Bits 1:0 (10) - VR set to AUTO operating mode
- */
- i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992_FLAGS, 0x38, 0x2a);
-}
-
-static void board_pmic_enable_slp_s0_vr_decay(void)
-{
- /*
- * VCCIOCNT:
- * Bit 6 (1) - Enable decay of VCCIO on SLP_S0# assertion
- * Bits 5:4 (11) - Nominal output voltage: 0.850V
- * Bits 3:2 (10) - VR set to AUTO on SLP_S0# de-assertion
- * Bits 1:0 (10) - VR set to AUTO operating mode
- */
- i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992_FLAGS, 0x30, 0x7a);
-
- /*
- * V18ACNT:
- * Bits 7:6 (01) - Enable low power mode on SLP_S0# assertion
- * Bits 5:4 (10) - Nominal voltage set to 1.8V
- * Bits 3:2 (10) - VR set to AUTO on SLP_S0# de-assertion
- * Bits 1:0 (10) - VR set to AUTO operating mode
- */
- i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992_FLAGS, 0x34, 0x6a);
-
- /*
- * V085ACNT:
- * Bits 7:6 (01) - Enable low power mode on SLP_S0# assertion
- * Bits 5:4 (10) - Nominal voltage 0.85V
- * Bits 3:2 (10) - VR set to AUTO on SLP_S0# de-assertion
- * Bits 1:0 (10) - VR set to AUTO operating mode
- */
- i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992_FLAGS, 0x38, 0x6a);
-}
-
-__override void power_board_handle_host_sleep_event(
- enum host_sleep_event state)
-{
- if (state == HOST_SLEEP_EVENT_S0IX_SUSPEND)
- board_pmic_enable_slp_s0_vr_decay();
- else if (state == HOST_SLEEP_EVENT_S0IX_RESUME)
- board_pmic_disable_slp_s0_vr_decay();
-}
-
-static void board_pmic_init(void)
-{
- int pgmask1;
-
- /* Mask V5A_DS3_PG from PMIC PGMASK1. */
- if (i2c_read8(I2C_PORT_PMIC, I2C_ADDR_BD99992_FLAGS,
- 0x18, &pgmask1))
- return;
- pgmask1 |= BIT(2);
- i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992_FLAGS, 0x18, pgmask1);
-
- board_pmic_disable_slp_s0_vr_decay();
-
- /* Enable active discharge (100 ohms) on V33A_PCH and V1.8A. */
- i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992_FLAGS, 0x3D, 0x5);
-
- /* Enable active discharge (500 ohms) on 1.8U and (100 ohms) 1.2U. */
- i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992_FLAGS, 0x3E, 0xD0);
-}
-DECLARE_HOOK(HOOK_INIT, board_pmic_init, HOOK_PRIO_DEFAULT);
-
-static void board_quirks(void)
-{
- /*
- * Newer board revisions have external pull ups stuffed, so remove the
- * internal pulls.
- */
- if (board_get_version() > 0) {
- gpio_set_flags(GPIO_USB_C0_PD_INT_ODL, GPIO_INT_FALLING);
- gpio_set_flags(GPIO_USB_C1_PD_INT_ODL, GPIO_INT_FALLING);
- }
-
- /*
- * Older boards don't have the SBU bypass circuitry needed for CCD, so
- * enable the CCD_MODE_ODL interrupt such that we can help in making
- * sure the SBU FETs are connected.
- */
- if (board_get_version() < 2)
- gpio_enable_interrupt(GPIO_CCD_MODE_ODL);
-}
-DECLARE_HOOK(HOOK_INIT, board_quirks, HOOK_PRIO_DEFAULT);
-
-void board_overcurrent_event(int port, int is_overcurrented)
-{
- int lvl;
-
- /* Check that port number is valid. */
- if ((port < 0) || (port >= CONFIG_USB_PD_PORT_MAX_COUNT))
- return;
-
- /* Note that the levels are inverted because the pin is active low. */
- lvl = is_overcurrented ? 0 : 1;
-
- switch (port) {
- case 0:
- gpio_set_level(GPIO_USB_C0_OC_ODL, lvl);
- break;
-
- case 1:
- gpio_set_level(GPIO_USB_C1_OC_ODL, lvl);
- break;
-
- default:
- return;
- };
-}
-
-static int read_gyro_sensor_temp(int idx, int *temp_ptr)
-{
- /*
- * The gyro is only powered in S0, so don't go and read it if the AP is
- * off.
- */
- if (chipset_in_state(CHIPSET_STATE_ANY_OFF))
- return EC_ERROR_NOT_POWERED;
-
- return bmi160_get_sensor_temp(idx, temp_ptr);
-}
-
-const struct temp_sensor_t temp_sensors[] = {
- {"Battery", TEMP_SENSOR_TYPE_BATTERY, charge_get_battery_temp, 0},
-
- /* These BD99992GW temp sensors are only readable in S0 */
- {"Ambient", TEMP_SENSOR_TYPE_BOARD, bd99992gw_get_val,
- BD99992GW_ADC_CHANNEL_SYSTHERM0},
- {"Charger", TEMP_SENSOR_TYPE_BOARD, bd99992gw_get_val,
- BD99992GW_ADC_CHANNEL_SYSTHERM1},
- {"DRAM", TEMP_SENSOR_TYPE_BOARD, bd99992gw_get_val,
- BD99992GW_ADC_CHANNEL_SYSTHERM2},
- {"eMMC", TEMP_SENSOR_TYPE_BOARD, bd99992gw_get_val,
- BD99992GW_ADC_CHANNEL_SYSTHERM3},
- /* The Gyro temperature sensor is only readable in S0. */
- {"Gyro", TEMP_SENSOR_TYPE_BOARD, read_gyro_sensor_temp, LID_GYRO}
-};
-BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT);
-
-/*
- * Thermal limits for each temp sensor. All temps are in degrees K. Must be in
- * same order as enum temp_sensor_id. To always ignore any temp, use 0.
- */
-struct ec_thermal_config thermal_params[] = {
- /* {Twarn, Thigh, Thalt}, fan_off, fan_max */
- {{0, 0, 0}, {0, 0, 0}, 0, 0}, /* Battery */
- {{0, 0, 0}, {0, 0, 0}, 0, 0}, /* Ambient */
- {{0, 0, 0}, {0, 0, 0}, 0, 0}, /* Charger */
- {{0, C_TO_K(52), 0}, {0, 0, 0}, 0, 0}, /* DRAM */
- {{0, 0, 0}, {0, 0, 0}, 0, 0}, /* eMMC */
- {{0, 0, 0}, {0, 0, 0}, 0, 0} /* Gyro */
-};
-BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT);
-
-
-/*
- * Check if PMIC fault registers indicate VR fault. If yes, print out fault
- * register info to console. Additionally, set panic reason so that the OS can
- * check for fault register info by looking at offset 0x14(PWRSTAT1) and
- * 0x15(PWRSTAT2) in cros ec panicinfo.
- */
-static void board_report_pmic_fault(const char *str)
-{
- int vrfault, pwrstat1 = 0, pwrstat2 = 0;
- uint32_t info;
-
- /* RESETIRQ1 -- Bit 4: VRFAULT */
- if (i2c_read8(I2C_PORT_PMIC, I2C_ADDR_BD99992_FLAGS, 0x8, &vrfault)
- != EC_SUCCESS)
- return;
-
- if (!(vrfault & BIT(4)))
- return;
-
- /* VRFAULT has occurred, print VRFAULT status bits. */
-
- /* PWRSTAT1 */
- i2c_read8(I2C_PORT_PMIC, I2C_ADDR_BD99992_FLAGS, 0x16, &pwrstat1);
-
- /* PWRSTAT2 */
- i2c_read8(I2C_PORT_PMIC, I2C_ADDR_BD99992_FLAGS, 0x17, &pwrstat2);
-
- CPRINTS("PMIC VRFAULT: %s", str);
- CPRINTS("PMIC VRFAULT: PWRSTAT1=0x%02x PWRSTAT2=0x%02x", pwrstat1,
- pwrstat2);
-
- /* Clear all faults -- Write 1 to clear. */
- i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992_FLAGS, 0x8, BIT(4));
- i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992_FLAGS, 0x16, pwrstat1);
- i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992_FLAGS, 0x17, pwrstat2);
-
- /*
- * Status of the fault registers can be checked in the OS by looking at
- * offset 0x14(PWRSTAT1) and 0x15(PWRSTAT2) in cros ec panicinfo.
- */
- info = ((pwrstat2 & 0xFF) << 8) | (pwrstat1 & 0xFF);
- panic_set_reason(PANIC_SW_PMIC_FAULT, info, 0);
-}
-
-void board_reset_pd_mcu(void)
-{
- cprints(CC_USB, "Resetting TCPCs...");
- cflush();
- /* GPIO_USB_PD_RST_L resets all the TCPCs. */
- gpio_set_level(GPIO_USB_PD_RST_L, 0);
- msleep(10); /* TODO(aaboagye): Verify min hold time. */
- gpio_set_level(GPIO_USB_PD_RST_L, 1);
- msleep(PS8805_FW_INIT_DELAY_MS);
-}
-
-void board_set_tcpc_power_mode(int port, int mode)
-{
- /* Ignore the "mode" to turn the chip on. We can only do a reset. */
- if (mode)
- return;
-
- board_reset_pd_mcu();
-}
-
-int board_set_active_charge_port(int port)
-{
- int is_real_port = (port >= 0 &&
- port < CONFIG_USB_PD_PORT_MAX_COUNT);
- int i;
- int rv;
- int old_port;
-
- if (!is_real_port && port != CHARGE_PORT_NONE)
- return EC_ERROR_INVAL;
-
- old_port = charge_manager_get_active_charge_port();
-
- CPRINTS("New chg p%d", port);
-
- if (port == CHARGE_PORT_NONE) {
- /* Disable all ports. */
- for (i = 0; i < ppc_cnt; i++) {
- rv = ppc_vbus_sink_enable(i, 0);
- /*
- * Deliberately ignoring this error since it may cause
- * an assertion error.
- */
- if (rv)
- CPRINTS("Disabling p%d sink path failed.", i);
- }
-
- return EC_SUCCESS;
- }
-
- /* Check if the port is sourcing VBUS. */
- if (ppc_is_sourcing_vbus(port)) {
- CPRINTF("Skip enable p%d", port);
- return EC_ERROR_INVAL;
- }
-
- /*
- * Turn off the other ports' sink path FETs, before enabling the
- * requested charge port.
- */
- for (i = 0; i < ppc_cnt; i++) {
- if (i == port)
- continue;
-
- if (ppc_vbus_sink_enable(i, 0))
- CPRINTS("p%d: sink path disable failed.", i);
- }
-
- /*
- * Stop the charger IC from switching while changing ports. Otherwise,
- * we can overcurrent the adapter we're switching to. (crbug.com/926056)
- */
- if (old_port != CHARGE_PORT_NONE)
- charger_discharge_on_ac(1);
-
- /* Enable requested charge port. */
- if (ppc_vbus_sink_enable(port, 1)) {
- CPRINTS("p%d: sink path enable failed.", port);
- charger_discharge_on_ac(0);
- return EC_ERROR_UNKNOWN;
- }
-
- /* Allow the charger IC to begin/continue switching. */
- charger_discharge_on_ac(0);
-
- return EC_SUCCESS;
-}
-
-void board_set_charge_limit(int port, int supplier, int charge_ma,
- int max_ma, int charge_mv)
-{
- int icl = MAX(charge_ma, CONFIG_CHARGER_INPUT_CURRENT);
-
- /*
- * Nocturne seems to overdraw its set input current limit by about 5%.
- * Request at most 95% of what's desired.
- */
- icl = icl * 95 / 100;
- charge_set_input_current_limit(icl, charge_mv);
-}
-
-static void board_chipset_reset(void)
-{
- board_report_pmic_fault("CHIPSET RESET");
-}
-DECLARE_HOOK(HOOK_CHIPSET_RESET, board_chipset_reset, HOOK_PRIO_DEFAULT);
-
-uint16_t tcpc_get_alert_status(void)
-{
- uint16_t status = 0;
- int regval;
-
- /*
- * The interrupt line is shared between the TCPC and PPC. Therefore, go
- * out and actually read the alert registers to report the alert status.
- */
- if (!gpio_get_level(GPIO_USB_C0_PD_INT_ODL)) {
- if (!tcpc_read16(0, TCPC_REG_ALERT, &regval)) {
- /* The TCPCI spec says to ignore bits 14:12. */
- regval &= ~(BIT(14) | BIT(13) | BIT(12));
-
- if (regval)
- status |= PD_STATUS_TCPC_ALERT_0;
- }
- }
-
- if (!gpio_get_level(GPIO_USB_C1_PD_INT_ODL)) {
- if (!tcpc_read16(1, TCPC_REG_ALERT, &regval)) {
- /* TCPCI spec says to ignore bits 14:12. */
- regval &= ~(BIT(14) | BIT(13) | BIT(12));
-
- if (regval)
- status |= PD_STATUS_TCPC_ALERT_1;
- }
- }
-
- return status;
-}
diff --git a/board/nocturne/board.h b/board/nocturne/board.h
deleted file mode 100644
index 95f8d14403..0000000000
--- a/board/nocturne/board.h
+++ /dev/null
@@ -1,280 +0,0 @@
-/* Copyright 2018 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Nocturne board configuration */
-
-#ifndef __CROS_EC_BOARD_H
-#define __CROS_EC_BOARD_H
-
-/*
- * By default, enable all console messages excepted HC, ACPI and event:
- * The sensor stack is generating a lot of activity.
- */
-#define CC_DEFAULT (CC_ALL & ~(CC_MASK(CC_EVENTS) | CC_MASK(CC_LPC)))
-#undef CONFIG_HOSTCMD_DEBUG_MODE
-#define CONFIG_HOSTCMD_DEBUG_MODE HCDEBUG_OFF
-
-/* NPCX7 config */
-#define NPCX_UART_MODULE2 1 /* GPIO64/65 are used as UART pins. */
-#define NPCX_TACH_SEL2 0 /* No tach. */
-#define NPCX7_PWM1_SEL 0 /* GPIO C2 is not used as PWM1. */
-#define CONFIG_HIBERNATE_PSL
-
-/* Internal SPI flash on NPCX7 */
-#define CONFIG_FLASH_SIZE_BYTES (512 * 1024) /* It's really 1MB. */
-#define CONFIG_SPI_FLASH_REGS
-#define CONFIG_SPI_FLASH_W25Q80 /* Internal SPI flash type. */
-
-/* EC modules */
-#define CONFIG_ADC
-#define CONFIG_BACKLIGHT_LID
-#define CONFIG_HOSTCMD_ESPI
-#define CONFIG_I2C
-#define CONFIG_I2C_BUS_MAY_BE_UNPOWERED
-#define CONFIG_I2C_CONTROLLER
-#define CONFIG_LOW_POWER_IDLE
-#define CONFIG_PWM
-#define CONFIG_THROTTLE_AP
-#define CONFIG_VBOOT_HASH
-#define CONFIG_VSTORE
-#define CONFIG_VSTORE_SLOT_COUNT 1
-
-#define CONFIG_DETACHABLE_BASE
-
-/* EC console commands */
-#define CONFIG_CMD_ACCELS
-#define CONFIG_CMD_ACCEL_INFO
-#define CONFIG_CMD_BUTTON
-#define CONFIG_CMD_CHARGEN
-#define CONFIG_HOSTCMD_PD_CONTROL
-#define CONFIG_CMD_PPC_DUMP
-
-/* Battery */
-#define CONFIG_BATTERY_CUT_OFF
-#define CONFIG_BATTERY_SMART
-#define CONFIG_BATTERY_REVIVE_DISCONNECT
-#define CONFIG_BATTERY_PRESENT_GPIO GPIO_BAT_PRESENT_L
-#define CONFIG_BATT_FULL_CHIPSET_OFF_INPUT_LIMIT_MV 9000
-
-/* Buttons / Switches */
-#define CONFIG_BASE_ATTACHED_SWITCH
-#define CONFIG_BUTTON_TRIGGERED_RECOVERY
-#define CONFIG_VOLUME_BUTTONS
-
-/* Charger */
-#define CONFIG_CHARGE_MANAGER
-#define CONFIG_CHARGER
-#define CONFIG_CHARGER_DISCHARGE_ON_AC
-#define CONFIG_CHARGER_INPUT_CURRENT 128
-#define CONFIG_CHARGER_ISL9238
-#undef CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON
-#define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON 1
-#define CONFIG_CHARGER_PROFILE_OVERRIDE
-#define CONFIG_CHARGER_SENSE_RESISTOR 10
-#define CONFIG_CHARGER_SENSE_RESISTOR_AC 20
-#define CONFIG_EXTPOWER_GPIO
-
-/* LEDs */
-#define CONFIG_LED_COMMON
-#define CONFIG_LED_PWM_ACTIVE_CHARGE_PORT_ONLY
-#define CONFIG_LED_PWM_COUNT 2
-#undef CONFIG_LED_PWM_NEAR_FULL_COLOR
-#define CONFIG_LED_PWM_NEAR_FULL_COLOR EC_LED_COLOR_WHITE
-
-/* MKBP */
-#define CONFIG_MKBP_EVENT
-#define CONFIG_MKBP_EVENT_WAKEUP_MASK (1<<EC_MKBP_EVENT_SWITCH)
-#define CONFIG_MKBP_INPUT_DEVICES
-#define CONFIG_MKBP_USE_GPIO_AND_HOST_EVENT
-
-/* Sensors */
-#define CONFIG_ALS
-#define ALS_COUNT 1
-#define CONFIG_ALS_OPT3001
-#define OPT3001_I2C_ADDR_FLAGS OPT3001_I2C_ADDR1_FLAGS
-/* Enable sensor fifo, must also define the _SIZE and _THRES */
-#define CONFIG_ACCEL_FIFO
-/* Must be a power of 2 */
-#define CONFIG_ACCEL_FIFO_SIZE 512
-/* Depends on how fast the AP boots and typical ODRs */
-#define CONFIG_ACCEL_FIFO_THRES (CONFIG_ACCEL_FIFO_SIZE / 3)
-#define CONFIG_ACCEL_INTERRUPTS
-#define CONFIG_ACCELGYRO_BMI160
-#define CONFIG_ACCELGYRO_BMI160_INT_EVENT \
- TASK_EVENT_MOTION_SENSOR_INTERRUPT(LID_ACCEL)
-#define CONFIG_SYNC
-#define CONFIG_SYNC_INT_EVENT \
- TASK_EVENT_MOTION_SENSOR_INTERRUPT(VSYNC)
-#define CONFIG_TEMP_SENSOR
-#define CONFIG_TEMP_SENSOR_BD99992GW
-#define CONFIG_THERMISTOR_NCP15WB
-
-/* SoC */
-#define CONFIG_BOARD_HAS_RTC_RESET
-#define CONFIG_CHIPSET_CAN_THROTTLE
-#define CONFIG_CHIPSET_SKYLAKE
-#define CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET
-#define CONFIG_CHIPSET_RESET_HOOK
-#define CONFIG_CPU_PROCHOT_ACTIVE_LOW
-#define CONFIG_DPTF
-#define CONFIG_DO_NOT_INCLUDE_RV32I_PANIC_DATA
-#define CONFIG_POWER_COMMON
-#define CONFIG_POWER_BUTTON
-#define CONFIG_POWER_BUTTON_X86
-#define CONFIG_POWER_S0IX
-#define CONFIG_POWER_TRACK_HOST_SLEEP_STATE
-
-#define CONFIG_USB_PID 0x5045
-
-/* USB PD */
-#define CONFIG_USB_DRP_ACC_TRYSRC
-#define CONFIG_USB_PD_3A_PORTS 0
-#define CONFIG_USB_PD_ALT_MODE
-#define CONFIG_USB_PD_ALT_MODE_DFP
-#define CONFIG_USB_PD_COMM_LOCKED
-#define CONFIG_USB_PD_DECODE_SOP
-#define CONFIG_USB_PD_DISCHARGE_PPC
-#define CONFIG_USB_PD_DP_HPD_GPIO
-#define CONFIG_USB_PD_DUAL_ROLE
-#define CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE
-#define CONFIG_USB_PD_LOGGING
-#define CONFIG_USB_PD_PORT_MAX_COUNT 2
-#define CONFIG_USB_PD_TCPC_LOW_POWER
-#define CONFIG_USB_PD_REV30
-#define CONFIG_USB_PD_TCPMV2
-#define CONFIG_USB_PD_TCPM_MUX
-#define CONFIG_USB_PD_TCPM_PS8805
-#define CONFIG_USB_PD_TCPM_TCPCI
-#define CONFIG_USB_PD_TRY_SRC
-#define CONFIG_USB_PD_VBUS_DETECT_TCPC
-#define CONFIG_USB_PD_VBUS_MEASURE_NOT_PRESENT
-#define CONFIG_USB_PE_SM
-#define CONFIG_USB_POWER_DELIVERY
-#define CONFIG_USB_PRL_SM
-#define CONFIG_USB_TYPEC_SM
-#define CONFIG_USBC_PPC_SN5S330
-#define CONFIG_USBC_SS_MUX
-#define CONFIG_USBC_SS_MUX_DFP_ONLY
-#define CONFIG_USBC_VCONN
-#define CONFIG_USBC_VCONN_SWAP
-
-/* Define typical operating power and max power. */
-#define PD_MAX_VOLTAGE_MV 20000
-#define PD_MAX_CURRENT_MA 3000
-#define PD_MAX_POWER_MW 45000
-#define PD_OPERATING_POWER_MW 15000
-
-/* TODO(aaboagye): Verify these timings. */
-/*
- * delay to turn on the power supply max is ~16ms.
- * delay to turn off the power supply max is about ~180ms.
- */
-#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */
-#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */
-
-/* I2C config */
-#define I2C_PORT_CHARGER I2C_PORT_POWER
-#define I2C_PORT_PMIC I2C_PORT_POWER
-#define I2C_PORT_POWER NPCX_I2C_PORT0_0
-#define I2C_PORT_BATTERY NPCX_I2C_PORT4_1
-#define I2C_PORT_ALS_GYRO NPCX_I2C_PORT5_0
-#define I2C_PORT_ACCEL I2C_PORT_ALS_GYRO
-#define I2C_PORT_USB_C0 NPCX_I2C_PORT1_0
-#define I2C_PORT_USB_C1 NPCX_I2C_PORT2_0
-#define I2C_PORT_THERMAL I2C_PORT_PMIC
-
-#define GPIO_USB_C0_SCL GPIO_EC_I2C1_USB_C0_SCL
-#define GPIO_USB_C0_SDA GPIO_EC_I2C1_USB_C0_SDA
-#define GPIO_USB_C1_SCL GPIO_EC_I2C2_USB_C1_SCL
-#define GPIO_USB_C1_SDA GPIO_EC_I2C2_USB_C1_SDA
-
-#define I2C_ADDR_MP2949_FLAGS 0x20
-#define I2C_ADDR_BD99992_FLAGS 0x30
-
-/*
- * Remapping of schematic GPIO names to common GPIO names expected (hardcoded)
- * in the EC code base.
- */
-#define GPIO_AC_PRESENT GPIO_ACOK_OD
-#define GPIO_ENABLE_BACKLIGHT GPIO_EC_BL_DISABLE_ODL
-#define GPIO_BAT_PRESENT_L GPIO_EC_BATT_PRES_L
-#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW
-#define GPIO_PCH_PWRBTN_L GPIO_EC_PCH_PWR_BTN_L
-#define GPIO_PCH_RSMRST_L GPIO_RSMRST_L
-#define GPIO_PCH_RTCRST GPIO_EC_PCH_RTCRST
-#define GPIO_PCH_SLP_S0_L GPIO_SLP_S0_L
-#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L
-#define GPIO_PCH_SLP_S4_L GPIO_SLP_S4_L
-#define GPIO_PCH_SLP_SUS_L GPIO_SLP_SUS_L_PCH
-#define GPIO_PCH_WAKE_L GPIO_EC_PCH_WAKE_L
-#define GPIO_PMIC_DPWROK GPIO_ROP_DSW_PWROK_EC
-#define GPIO_PMIC_SLP_SUS_L GPIO_SLP_SUS_L_PMIC
-#define GPIO_POWER_BUTTON_L GPIO_EC_PWR_BTN_IN_ODL
-#define GPIO_CPU_PROCHOT GPIO_EC_PROCHOT_ODL
-#define GPIO_RSMRST_L_PGOOD GPIO_ROP_EC_RSMRST_L
-#define GPIO_VOLUME_UP_L GPIO_H1_EC_VOL_UP_ODL
-#define GPIO_VOLUME_DOWN_L GPIO_H1_EC_VOL_DOWN_ODL
-#define GPIO_WP_L GPIO_EC_WP_L
-
-#define PORT_TO_HPD(port) ((port) ? GPIO_USB_C1_DP_HPD : GPIO_USB_C0_DP_HPD)
-
-#ifndef __ASSEMBLER__
-
-#include "gpio_signal.h"
-#include "registers.h"
-
-/* ADC signal */
-enum adc_channel {
- ADC_BASE_ATTACH,
- ADC_BASE_DETACH,
- ADC_CH_COUNT
-};
-
-enum temp_sensor_id {
- TEMP_SENSOR_BATTERY, /* BD99956GW TSENSE */
- TEMP_SENSOR_AMBIENT, /* BD99992GW SYSTHERM0 */
- TEMP_SENSOR_CHARGER, /* BD99992GW SYSTHERM1 */
- TEMP_SENSOR_DRAM, /* BD99992GW SYSTHERM2 */
- TEMP_SENSOR_EMMC, /* BD99992GW SYSTHERM3 */
- TEMP_SENSOR_GYRO, /* BMI160 */
- TEMP_SENSOR_COUNT
-};
-
-enum pwm_channel {
- PWM_CH_DB0_LED_RED = 0,
- PWM_CH_DB0_LED_GREEN,
- PWM_CH_DB0_LED_BLUE,
- PWM_CH_DB1_LED_RED,
- PWM_CH_DB1_LED_GREEN,
- PWM_CH_DB1_LED_BLUE,
- PWM_CH_COUNT
-};
-
-/*
- * Motion sensors:
- * When reading through IO memory is set up for sensors (LPC is used),
- * the first 2 entries must be accelerometers, then gyroscope.
- * For BMI160, accel and gyro sensors must be next to each other.
- */
-enum sensor_id {
- LID_ACCEL,
- LID_GYRO,
- LID_ALS,
- VSYNC,
- SENSOR_COUNT,
-};
-
-#define CONFIG_ACCEL_FORCE_MODE_MASK BIT(LID_ALS)
-
-void base_pwr_fault_interrupt(enum gpio_signal s);
-int board_get_version(void);
-
-/* Reset all TCPCs. */
-void board_reset_pd_mcu(void);
-void board_set_tcpc_power_mode(int port, int mode);
-
-#endif /* __ASSEMBLER__ */
-
-#endif /* __CROS_EC_BOARD_H */
diff --git a/board/nocturne/build.mk b/board/nocturne/build.mk
deleted file mode 100644
index 1c2e1e04f2..0000000000
--- a/board/nocturne/build.mk
+++ /dev/null
@@ -1,13 +0,0 @@
-# -*- makefile -*-
-# Copyright 2018 The Chromium OS Authors. All rights reserved.
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-#
-# Board specific files build
-#
-
-CHIP:=npcx
-CHIP_FAMILY:=npcx7
-CHIP_VARIANT:=npcx7m6f
-
-board-y=base_detect.o battery.o board.o led.o usb_pd_policy.o
diff --git a/board/nocturne/ec.tasklist b/board/nocturne/ec.tasklist
deleted file mode 100644
index 4fb7a035a9..0000000000
--- a/board/nocturne/ec.tasklist
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Copyright 2018 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/*
- * See CONFIG_TASK_LIST in config.h for details.
- */
-
-#define CONFIG_TASK_LIST \
- TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \
- TASK_ALWAYS(CHARGER, charger_task, NULL, LARGER_TASK_STACK_SIZE) \
- TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \
- TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \
- TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \
- TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \
- TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \
- TASK_ALWAYS(PD_C0, pd_task, NULL, LARGER_TASK_STACK_SIZE) \
- TASK_ALWAYS(PD_C1, pd_task, NULL, LARGER_TASK_STACK_SIZE) \
- TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, TASK_STACK_SIZE) \
- TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, TASK_STACK_SIZE)
diff --git a/board/nocturne/gpio.inc b/board/nocturne/gpio.inc
deleted file mode 100644
index 75d2275424..0000000000
--- a/board/nocturne/gpio.inc
+++ /dev/null
@@ -1,121 +0,0 @@
-/* -*- mode:c -*-
- *
- * Copyright 2018 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/*
- * Declare symbolic names for all the GPIOs that we care about.
- * Note: Those with interrupt handlers must be declared first.
- */
-
-/* USB-C interrupts */
-GPIO_INT(USB_C0_PD_INT_ODL, PIN(6, 1), GPIO_INT_FALLING | GPIO_PULL_UP, usb_c_interrupt)
-GPIO_INT(USB_C1_PD_INT_ODL, PIN(F, 5), GPIO_INT_FALLING | GPIO_PULL_UP, usb_c_interrupt)
-
-/* Power Sequencing interrupts */
-GPIO_INT(ROP_DSW_PWROK_EC, PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(ROP_EC_RSMRST_L, PIN(E, 2), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(EC_PWR_BTN_IN_ODL, PIN(0, 1), GPIO_INT_BOTH | GPIO_PULL_UP, power_button_interrupt)
-GPIO_INT(SLP_S0_L, PIN(A, 4), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(SLP_S4_L, PIN(A, 3), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(SLP_S3_L, PIN(A, 6), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(SLP_SUS_L_PCH, PIN(D, 4), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(ACOK_OD, PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, extpower_interrupt)
-GPIO_INT(ROP_INT_L, PIN(D, 5), GPIO_INT_BOTH | GPIO_PULL_UP, power_signal_interrupt)
-
-/* Misc. interrupts */
-GPIO_INT(H1_EC_VOL_DOWN_ODL, PIN(6, 3), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt)
-GPIO_INT(H1_EC_VOL_UP_ODL, PIN(7, 5), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt)
-GPIO_INT(EC_WP_L, PIN(A, 1), GPIO_INT_BOTH, switch_interrupt)
-GPIO_INT(LID_OPEN, PIN(D, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, lid_interrupt)
-GPIO_INT(ACCELGYRO3_INT_L, PIN(4, 1), GPIO_INT_FALLING, bmi160_interrupt)
-GPIO_INT(BASE_USB_FAULT_ODL, PIN(2, 3), GPIO_INT_FALLING, base_pwr_fault_interrupt)
-GPIO_INT(BASE_PWR_FAULT_ODL, PIN(2, 4), GPIO_INT_FALLING, base_pwr_fault_interrupt)
-GPIO_INT(RCAM_VSYNC, PIN(E, 4), GPIO_INT_RISING, sync_interrupt)
-GPIO_INT(CCD_MODE_ODL, PIN(E, 3), GPIO_INT_FALLING, board_connect_c0_sbu)
-
-/* SoC */
-GPIO(RSMRST_L, PIN(C, 2), GPIO_OUT_LOW)
-GPIO(EC_PCH_PWR_BTN_L, PIN(C, 1), GPIO_OUT_HIGH)
-GPIO(EC_PCH_RTCRST, PIN(7, 6), GPIO_OUT_LOW)
-GPIO(SLP_SUS_L_PMIC, PIN(D, 7), GPIO_OUT_LOW)
-GPIO(EC_PCH_WAKE_L, PIN(7, 4), GPIO_ODR_HIGH | GPIO_PULL_UP)
-GPIO(EC_PROCHOT_ODL, PIN(3, 4), GPIO_ODR_HIGH | GPIO_SEL_1P8V)
-GPIO(SYS_RESET_L, PIN(0, 2), GPIO_ODR_HIGH)
-GPIO(USB_C0_DP_HPD, PIN(C, 5), GPIO_OUT_LOW)
-GPIO(USB_C1_DP_HPD, PIN(C, 6), GPIO_OUT_LOW)
-
-/* Power Sequencing */
-GPIO(EC_PCH_ACPRESENT, PIN(7, 3), GPIO_OUT_LOW)
-
-/* USB-C */
-GPIO(USB_C0_OC_ODL, PIN(6, 7), GPIO_ODR_HIGH)
-GPIO(USB_C1_OC_ODL, PIN(7, 0), GPIO_ODR_HIGH)
-GPIO(EN_5V, PIN(0, 3), GPIO_OUT_LOW)
-GPIO(EN_USB_C0_3A, PIN(6, 2), GPIO_OUT_LOW)
-GPIO(EN_USB_C1_3A, PIN(8, 3), GPIO_OUT_LOW)
-
-/* Misc */
-GPIO(EC_BRD_ID0, PIN(4, 0), GPIO_INPUT)
-GPIO(EC_BRD_ID1, PIN(9, 6), GPIO_INPUT)
-GPIO(EC_BRD_ID2, PIN(9, 3), GPIO_INPUT)
-GPIO(EC_BRD_ID3, PIN(F, 0), GPIO_INPUT)
-GPIO(EC_INT_L, PIN(9, 5), GPIO_OUT_HIGH)
-GPIO(UHALL_PWR_EN, PIN(E, 0), GPIO_OUT_HIGH)
-GPIO(USB2_VBUSSENSE, PIN(A, 2), GPIO_OUT_LOW)
-GPIO(USB2_ID, PIN(A, 0), GPIO_OUT_LOW)
-GPIO(USB_PD_RST_L, PIN(F, 1), GPIO_OUT_HIGH)
-GPIO(ALS_INT_L, PIN(5, 0), GPIO_INPUT)
-GPIO(EC_BATT_PRES_L, PIN(E, 5), GPIO_INPUT)
-GPIO(EC_ENTERING_RW, PIN(E, 1), GPIO_OUT_LOW)
-GPIO(EC_BL_DISABLE_ODL, PIN(D, 3), GPIO_ODR_HIGH)
-GPIO(EC_PLATFORM_RST, PIN(8, 6), GPIO_OUT_LOW)
-GPIO(EC_GPIO31, PIN(3, 1), GPIO_OUT_LOW)
-GPIO(BASE_PWR_EN, PIN(2, 2), GPIO_OUT_LOW)
-GPIO(PP3300_NVME_EN, PIN(2, 1), GPIO_INPUT | GPIO_PULL_DOWN) /*NC*/
-GPIO(PP1800_NVME_EN, PIN(2, 0), GPIO_INPUT | GPIO_PULL_DOWN) /*NC*/
-GPIO(PPVAR_NVME_CORE_EN, PIN(1, 7), GPIO_INPUT | GPIO_PULL_DOWN) /*NC*/
-GPIO(EC_GPIO16, PIN(1, 6), GPIO_OUT_LOW)
-GPIO(EC_GPIO15, PIN(1, 5), GPIO_OUT_LOW)
-GPIO(EC_GPIO14, PIN(1, 4), GPIO_OUT_LOW)
-
-/* I2C pins */
-GPIO(EC_I2C1_USB_C0_SCL, PIN(9, 0), GPIO_INPUT)
-GPIO(EC_I2C1_USB_C0_SDA, PIN(8, 7), GPIO_INPUT)
-GPIO(EC_I2C2_USB_C1_SCL, PIN(9, 2), GPIO_INPUT)
-GPIO(EC_I2C2_USB_C1_SDA, PIN(9, 1), GPIO_INPUT)
-GPIO(EC_I2C5_ALS_GYRO_SCL, PIN(3, 3), GPIO_INPUT | GPIO_SEL_1P8V)
-GPIO(EC_I2C5_ALS_GYRO_SDA, PIN(3, 6), GPIO_INPUT | GPIO_SEL_1P8V)
-GPIO(EC_I2C0_POWER_SCL, PIN(B, 5), GPIO_INPUT)
-GPIO(EC_I2C0_POWER_SDA, PIN(B, 4), GPIO_INPUT)
-GPIO(EC_I2C4_BATTERY_SCL, PIN(F, 3), GPIO_INPUT)
-GPIO(EC_I2C4_BATTERY_SDA, PIN(F, 2), GPIO_INPUT)
-
-/* Strap pins */
-GPIO(GPO66_NC, PIN(6, 6), GPIO_INPUT | GPIO_PULL_UP)
-GPIO(GPOB6_NC, PIN(B, 6), GPIO_INPUT | GPIO_PULL_UP)
-
-/* Alternate mode configuration */
-/* UART pins */
-ALTERNATE(PIN_MASK(6, 0x30), 0, MODULE_UART, 0) /* Cr50 requires no pullups. */
-/* I2C ports */
-ALTERNATE(PIN_MASK(B, 0x30), 0, MODULE_I2C, 0) /* I2C0 */
-ALTERNATE(PIN_MASK(8, 0x80), 0, MODULE_I2C, 0) /* I2C1 SDA */
-ALTERNATE(PIN_MASK(9, 0x07), 0, MODULE_I2C, 0) /* I2C1 SCL, I2C 2 */
-ALTERNATE(PIN_MASK(F, 0x0C), 0, MODULE_I2C, 0) /* I2C4 */
-ALTERNATE(PIN_MASK(3, 0x48), 0, MODULE_I2C, GPIO_INPUT | GPIO_SEL_1P8V) /* 1.8V I2C5 */
-
-/* PWM */
-ALTERNATE(PIN_MASK(6, 0x01), 0, MODULE_PWM, 0) /* PWM7 */
-ALTERNATE(PIN_MASK(8, 0x01), 0, MODULE_PWM, 0) /* PWM3 */
-ALTERNATE(PIN_MASK(B, 0x80), 0, MODULE_PWM, 0) /* PWM5 */
-ALTERNATE(PIN_MASK(C, 0x19), 0, MODULE_PWM, 0) /* PWM0,2, 6 */
-
-/* ADC */
-ALTERNATE(PIN_MASK(4, 0x30), 0, MODULE_ADC, 0) /* ADC0,1 */
-
-/* Power Switch Logic (PSL) inputs */
-ALTERNATE(PIN_MASK(0, 0x03), 0, MODULE_PMU, 0) /* GPIO00, GPIO01 */
-ALTERNATE(PIN_MASK(D, 0x04), 0, MODULE_PMU, 0) /* GPIOD2 */
diff --git a/board/nocturne/led.c b/board/nocturne/led.c
deleted file mode 100644
index b214a8df84..0000000000
--- a/board/nocturne/led.c
+++ /dev/null
@@ -1,138 +0,0 @@
-/* Copyright 2018 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Nocturne specific PWM LED settings. */
-
-#include "common.h"
-#include "ec_commands.h"
-#include "hooks.h"
-#include "led_pwm.h"
-#include "pwm.h"
-#include "util.h"
-
-const enum ec_led_id supported_led_ids[] = {
- EC_LED_ID_LEFT_LED,
- EC_LED_ID_RIGHT_LED,
-};
-const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids);
-
-struct pwm_led_color_map led_color_map_v3[EC_LED_COLOR_COUNT] = {
- /* Red, Green, Blue */
- [EC_LED_COLOR_RED] = { 36, 0, 0 },
- [EC_LED_COLOR_GREEN] = { 0, 15, 0 },
- [EC_LED_COLOR_BLUE] = { 0, 0, 100 },
- [EC_LED_COLOR_YELLOW] = { 36, 15, 0 },
- [EC_LED_COLOR_WHITE] = { 30, 9, 15 },
- [EC_LED_COLOR_AMBER] = { 30, 1, 0 },
-};
-
-/* Map for board rev 2 */
-struct pwm_led_color_map led_color_map_v2[EC_LED_COLOR_COUNT] = {
- /* Red, Green, Blue */
- [EC_LED_COLOR_RED] = { 62, 0, 0 },
- [EC_LED_COLOR_GREEN] = { 0, 31, 0 },
- [EC_LED_COLOR_BLUE] = { 0, 0, 100 },
- [EC_LED_COLOR_YELLOW] = { 100, 54, 0 },
- [EC_LED_COLOR_WHITE] = { 70, 54, 100 },
- [EC_LED_COLOR_AMBER] = { 100, 15, 0 },
-};
-
-/* Map for board rev 0 and 1 */
-struct pwm_led_color_map led_color_map_v0_1[EC_LED_COLOR_COUNT] = {
- /* Red, Green, Blue */
- [EC_LED_COLOR_RED] = { 1, 0, 0 },
- [EC_LED_COLOR_GREEN] = { 0, 1, 0 },
- [EC_LED_COLOR_BLUE] = { 0, 0, 1 },
- [EC_LED_COLOR_YELLOW] = { 1, 1, 0 },
- [EC_LED_COLOR_WHITE] = { 9, 15, 15 },
- [EC_LED_COLOR_AMBER] = { 15, 1, 0 },
-};
-
-struct pwm_led_color_map led_color_map[EC_LED_COLOR_COUNT] = { { 0 } };
-
-/* Two tri-color LEDs with red, green, and blue channels. */
-struct pwm_led pwm_leds[CONFIG_LED_PWM_COUNT] = {
- {
- .ch0 = PWM_CH_DB0_LED_RED,
- .ch1 = PWM_CH_DB0_LED_GREEN,
- .ch2 = PWM_CH_DB0_LED_BLUE,
- .enable = &pwm_enable,
- .set_duty = &pwm_set_duty,
- },
-
- {
- .ch0 = PWM_CH_DB1_LED_RED,
- .ch1 = PWM_CH_DB1_LED_GREEN,
- .ch2 = PWM_CH_DB1_LED_BLUE,
- .enable = &pwm_enable,
- .set_duty = &pwm_set_duty,
- },
-};
-
-void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range)
-{
- brightness_range[EC_LED_COLOR_RED] = 100;
- brightness_range[EC_LED_COLOR_GREEN] = 100;
- brightness_range[EC_LED_COLOR_YELLOW] = 100;
- brightness_range[EC_LED_COLOR_AMBER] = 100;
- brightness_range[EC_LED_COLOR_BLUE] = 100;
- brightness_range[EC_LED_COLOR_WHITE] = 100;
-}
-
-int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness)
-{
- enum pwm_led_id pwm_id;
-
- /* Convert ec_led_id to pwm_led_id. */
- if (led_id == EC_LED_ID_LEFT_LED)
- pwm_id = PWM_LED0;
- else if (led_id == EC_LED_ID_RIGHT_LED)
- pwm_id = PWM_LED1;
- else
- return EC_ERROR_UNKNOWN;
-
- if (brightness[EC_LED_COLOR_RED])
- set_pwm_led_color(pwm_id, EC_LED_COLOR_RED);
- else if (brightness[EC_LED_COLOR_GREEN])
- set_pwm_led_color(pwm_id, EC_LED_COLOR_GREEN);
- else if (brightness[EC_LED_COLOR_YELLOW])
- set_pwm_led_color(pwm_id, EC_LED_COLOR_YELLOW);
- else if (brightness[EC_LED_COLOR_AMBER])
- set_pwm_led_color(pwm_id, EC_LED_COLOR_AMBER);
- else if (brightness[EC_LED_COLOR_BLUE])
- set_pwm_led_color(pwm_id, EC_LED_COLOR_BLUE);
- else if (brightness[EC_LED_COLOR_WHITE])
- set_pwm_led_color(pwm_id, EC_LED_COLOR_WHITE);
- else
- /* Otherwise, the "color" is "off". */
- set_pwm_led_color(pwm_id, -1);
-
- return EC_SUCCESS;
-}
-
-static void fill_led_color_map(struct pwm_led_color_map map[])
-{
- memcpy(led_color_map, map,
- EC_LED_COLOR_COUNT * sizeof(struct pwm_led_color_map));
-}
-
-static void select_color_map(void)
-{
- switch (board_get_version()) {
- case 0:
- case 1:
- fill_led_color_map(led_color_map_v0_1);
- break;
-
- case 2:
- fill_led_color_map(led_color_map_v2);
- break;
-
- default:
- fill_led_color_map(led_color_map_v3);
- break;
- }
-}
-DECLARE_HOOK(HOOK_INIT, select_color_map, HOOK_PRIO_INIT_PWM-1);
diff --git a/board/nocturne/usb_pd_policy.c b/board/nocturne/usb_pd_policy.c
deleted file mode 100644
index 14329b61b3..0000000000
--- a/board/nocturne/usb_pd_policy.c
+++ /dev/null
@@ -1,113 +0,0 @@
-/* Copyright 2018 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#include "charge_manager.h"
-#include "chipset.h"
-#include "common.h"
-#include "console.h"
-#include "compile_time_macros.h"
-#include "ec_commands.h"
-#include "gpio.h"
-#include "system.h"
-#include "usb_mux.h"
-#include "usb_pd.h"
-#include "usbc_ppc.h"
-#include "util.h"
-
-#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args)
-#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args)
-
-int pd_check_vconn_swap(int port)
-{
- /* Do not allow VCONN swap is 5V is off. */
- return gpio_get_level(GPIO_EN_5V);
-}
-
-__override void pd_execute_data_swap(int port,
- enum pd_data_role data_role)
-{
- int level;
-
- /* Only port 0 supports device mode. */
- if (port != 0)
- return;
-
- level = (data_role == PD_ROLE_UFP) ? 1 : 0;
-
- gpio_set_level(GPIO_USB2_ID, level);
- gpio_set_level(GPIO_USB2_VBUSSENSE, level);
-}
-
-void pd_power_supply_reset(int port)
-{
- /*
- * Disable VBUS and discharge to vSafe0V.
- *
- * The PPC will automatically disable the discharge circuitry once it
- * reaches vSafe0V.
- */
- ppc_vbus_source_enable(port, 0);
- ppc_discharge_vbus(port, 1);
-
-#ifdef CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT
- /* Give back the current quota we are no longer using */
- charge_manager_source_port(port, 0);
-#endif /* defined(CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT) */
-
- /* Notify host of power info change. */
- pd_send_host_event(PD_EVENT_POWER_CHANGE);
-}
-
-int pd_set_power_supply_ready(int port)
-{
- int rv;
-
- if (port >= ppc_cnt)
- return EC_ERROR_INVAL;
-
- /* Disable charging. */
- rv = ppc_vbus_sink_enable(port, 0);
- if (rv)
- return rv;
-
- /* The 5V rail used for sourcing is not powered when the AP is off. */
- if (chipset_in_state(CHIPSET_STATE_ANY_OFF))
- return EC_ERROR_NOT_POWERED;
-
- /* Provide Vbus. */
- rv = ppc_vbus_source_enable(port, 1);
- if (rv)
- return rv;
-
-#ifdef CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT
- /* Ensure we advertise the proper available current quota */
- charge_manager_source_port(port, 1);
-#endif /* defined(CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT) */
-
- /* Notify host of power info change. */
- pd_send_host_event(PD_EVENT_POWER_CHANGE);
-
- return EC_SUCCESS;
-}
-
-/* ----------------- Vendor Defined Messages ------------------ */
-__override void svdm_safe_dp_mode(int port)
-{
- /* make DP interface safe until configure */
- usb_mux_set(port, USB_PD_MUX_NONE,
- USB_SWITCH_CONNECT,
- polarity_rm_dts(pd_get_polarity(port)));
-
- /*
- * Isolate the SBU lines.
- *
- * Older boards don't have the SBU line bypass needed for CCD, so never
- * disable the SBU lines for port 0.
- */
- if ((board_get_version() < 2) && (port == 0))
- CPRINTS("Skip disable SBU lines for C0.");
- else
- ppc_set_sbu(port, 0);
-}
diff --git a/board/nocturne/vif_override.xml b/board/nocturne/vif_override.xml
deleted file mode 100644
index 32736caf64..0000000000
--- a/board/nocturne/vif_override.xml
+++ /dev/null
@@ -1,3 +0,0 @@
-<!-- Add VIF field overrides here. See genvif.c and the Vendor Info File
- Definition from the USB-IF.
--->