summaryrefslogtreecommitdiff
path: root/board/npcx7_evb
diff options
context:
space:
mode:
Diffstat (limited to 'board/npcx7_evb')
-rw-r--r--board/npcx7_evb/board.c85
-rw-r--r--board/npcx7_evb/board.h30
-rw-r--r--board/npcx7_evb/build.mk2
-rw-r--r--board/npcx7_evb/ec.tasklist2
-rw-r--r--board/npcx7_evb/gpio.inc2
5 files changed, 58 insertions, 63 deletions
diff --git a/board/npcx7_evb/board.c b/board/npcx7_evb/board.c
index 7909668d2c..c78a30f3de 100644
--- a/board/npcx7_evb/board.c
+++ b/board/npcx7_evb/board.c
@@ -1,4 +1,4 @@
-/* Copyright 2017 The Chromium OS Authors. All rights reserved.
+/* Copyright 2017 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -36,18 +36,23 @@
/******************************************************************************/
/* ADC channels. Must be in the exactly same order as in enum adc_channel. */
const struct adc_t adc_channels[] = {
- [ADC_CH_0] = {"ADC0", NPCX_ADC_CH0, ADC_MAX_VOLT, ADC_READ_MAX+1, 0},
- [ADC_CH_1] = {"ADC1", NPCX_ADC_CH1, ADC_MAX_VOLT, ADC_READ_MAX+1, 0},
- [ADC_CH_2] = {"ADC2", NPCX_ADC_CH2, ADC_MAX_VOLT, ADC_READ_MAX+1, 0},
- [ADC_CH_3] = {"ADC3", NPCX_ADC_CH3, ADC_MAX_VOLT, ADC_READ_MAX+1, 0},
- [ADC_CH_4] = {"ADC4", NPCX_ADC_CH4, ADC_MAX_VOLT, ADC_READ_MAX+1, 0},
+ [ADC_CH_0] = { "ADC0", NPCX_ADC_CH0, ADC_MAX_VOLT, ADC_READ_MAX + 1,
+ 0 },
+ [ADC_CH_1] = { "ADC1", NPCX_ADC_CH1, ADC_MAX_VOLT, ADC_READ_MAX + 1,
+ 0 },
+ [ADC_CH_2] = { "ADC2", NPCX_ADC_CH2, ADC_MAX_VOLT, ADC_READ_MAX + 1,
+ 0 },
+ [ADC_CH_3] = { "ADC3", NPCX_ADC_CH3, ADC_MAX_VOLT, ADC_READ_MAX + 1,
+ 0 },
+ [ADC_CH_4] = { "ADC4", NPCX_ADC_CH4, ADC_MAX_VOLT, ADC_READ_MAX + 1,
+ 0 },
};
BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
/******************************************************************************/
/* PWM channels. Must be in the exactly same order as in enum pwm_channel. */
const struct pwm_t pwm_channels[] = {
- [PWM_CH_FAN] = { 0, PWM_CONFIG_OPEN_DRAIN, 25000},
+ [PWM_CH_FAN] = { 0, PWM_CONFIG_OPEN_DRAIN, 25000 },
[PWM_CH_KBLIGHT] = { 2, 0, 10000 },
};
BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT);
@@ -56,7 +61,7 @@ BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT);
/* Physical fans. These are logically separate from pwm_channels. */
const struct fan_conf fan_conf_0 = {
.flags = FAN_USE_RPM_MODE,
- .ch = 0, /* Use MFT id to control fan */
+ .ch = 0, /* Use MFT id to control fan */
.pgood_gpio = GPIO_PGOOD_FAN,
.enable_gpio = -1,
};
@@ -75,55 +80,45 @@ BUILD_ASSERT(ARRAY_SIZE(fans) == FAN_CH_COUNT);
/******************************************************************************/
/* MFT channels. These are logically separate from pwm_channels. */
const struct mft_t mft_channels[] = {
- [MFT_CH_0] = { NPCX_MFT_MODULE_1, TCKC_LFCLK, PWM_CH_FAN},
+ [MFT_CH_0] = { NPCX_MFT_MODULE_1, TCKC_LFCLK, PWM_CH_FAN },
};
BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT);
/******************************************************************************/
/* I2C ports */
const struct i2c_port_t i2c_ports[] = {
- {
- .name = "master0-0",
- .port = NPCX_I2C_PORT0_0,
- .kbps = 100,
- .scl = GPIO_I2C0_SCL0,
- .sda = GPIO_I2C0_SDA0
- },
- {
- .name = "master1-0",
- .port = NPCX_I2C_PORT1_0,
- .kbps = 100,
- .scl = GPIO_I2C1_SCL0,
- .sda = GPIO_I2C1_SDA0
- },
- {
- .name = "master2-0",
- .port = NPCX_I2C_PORT2_0,
- .kbps = 100,
- .scl = GPIO_I2C2_SCL0,
- .sda = GPIO_I2C2_SDA0
- },
- {
- .name = "master3-0",
- .port = NPCX_I2C_PORT3_0,
- .kbps = 100,
- .scl = GPIO_I2C3_SCL0,
- .sda = GPIO_I2C3_SDA0
- },
- {
- .name = "master7-0",
- .port = NPCX_I2C_PORT7_0,
- .kbps = 100,
- .scl = GPIO_I2C7_SCL0,
- .sda = GPIO_I2C7_SDA0
- },
+ { .name = "master0-0",
+ .port = NPCX_I2C_PORT0_0,
+ .kbps = 100,
+ .scl = GPIO_I2C0_SCL0,
+ .sda = GPIO_I2C0_SDA0 },
+ { .name = "master1-0",
+ .port = NPCX_I2C_PORT1_0,
+ .kbps = 100,
+ .scl = GPIO_I2C1_SCL0,
+ .sda = GPIO_I2C1_SDA0 },
+ { .name = "master2-0",
+ .port = NPCX_I2C_PORT2_0,
+ .kbps = 100,
+ .scl = GPIO_I2C2_SCL0,
+ .sda = GPIO_I2C2_SDA0 },
+ { .name = "master3-0",
+ .port = NPCX_I2C_PORT3_0,
+ .kbps = 100,
+ .scl = GPIO_I2C3_SCL0,
+ .sda = GPIO_I2C3_SDA0 },
+ { .name = "master7-0",
+ .port = NPCX_I2C_PORT7_0,
+ .kbps = 100,
+ .scl = GPIO_I2C7_SCL0,
+ .sda = GPIO_I2C7_SDA0 },
};
const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
/******************************************************************************/
/* SPI devices */
const struct spi_device_t spi_devices[] = {
- { CONFIG_SPI_FLASH_PORT, 0, GPIO_SPI_CS_L},
+ { CONFIG_SPI_FLASH_PORT, 0, GPIO_SPI_CS_L },
};
const unsigned int spi_devices_used = ARRAY_SIZE(spi_devices);
diff --git a/board/npcx7_evb/board.h b/board/npcx7_evb/board.h
index ab8b850d94..8a7b0246e9 100644
--- a/board/npcx7_evb/board.h
+++ b/board/npcx7_evb/board.h
@@ -1,4 +1,4 @@
-/* Copyright 2017 The Chromium OS Authors. All rights reserved.
+/* Copyright 2017 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -15,11 +15,11 @@
* npcx7m6f/npcx7m6fb/npcx7m6fc/npcx7m7fc/npcx7m7wb/npcx7m7wc
*/
#if defined(CHIP_VARIANT_NPCX7M6G)
-#define BOARD_VERSION 1
-#elif defined(CHIP_VARIANT_NPCX7M6F) || defined(CHIP_VARIANT_NPCX7M6FB) || \
+#define BOARD_VERSION 1
+#elif defined(CHIP_VARIANT_NPCX7M6F) || defined(CHIP_VARIANT_NPCX7M6FB) || \
defined(CHIP_VARIANT_NPCX7M6FC) || defined(CHIP_VARIANT_NPCX7M7FC) || \
defined(CHIP_VARIANT_NPCX7M7WB) || defined(CHIP_VARIANT_NPCX7M7WC)
-#define BOARD_VERSION 2
+#define BOARD_VERSION 2
#endif
/* EC modules */
@@ -29,8 +29,8 @@
#define CONFIG_I2C
/* Features of eSPI */
#define CONFIG_HOST_INTERFACE_ESPI
-#define CONFIG_HOSTCMD_ESPI_VW_SLP_S3
-#define CONFIG_HOSTCMD_ESPI_VW_SLP_S4
+#define CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S3
+#define CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S4
/* Optional features */
#define CONFIG_ENABLE_JTAG_SELECTION
@@ -39,9 +39,9 @@
#define CONFIG_I2C_CONTROLLER
#define CONFIG_KEYBOARD_PROTOCOL_8042
-#undef CONFIG_LOW_POWER_IDLE /* Deep Sleep Support */
+#undef CONFIG_LOW_POWER_IDLE /* Deep Sleep Support */
#define CONFIG_POWER_BUTTON
-#undef CONFIG_PSTORE
+#undef CONFIG_PSTORE
#define CONFIG_PWM_KBLIGHT
#define CONFIG_VBOOT_HASH
#define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands */
@@ -57,7 +57,7 @@
/* I2C port for CONFIG_CMD_I2CWEDGE */
#define I2C_PORT_MASTER NPCX_I2C_PORT0_0
-#define I2C_PORT_HOST 0
+#define I2C_PORT_HOST 0
/* Fans for testing */
#define CONFIG_FANS 1
@@ -95,20 +95,20 @@
/* Select which UART Controller is the Console UART */
#undef CONFIG_CONSOLE_UART
-#define CONFIG_CONSOLE_UART 0 /* 0:UART1 1:UART2 */
+#define CONFIG_CONSOLE_UART 0 /* 0:UART1 1:UART2 */
/*
* This definition below actually doesn't define which UART controller to be
* used. Instead, it defines which pinouts (GPIO10/11 or GPIO64/65) are
* connected to "UART1" controller.
*/
#if (BOARD_VERSION == 2)
-#define NPCX_UART_MODULE2 1 /* 1:GPIO64/65 as UART1 */
+#define NPCX_UART_MODULE2 1 /* 1:GPIO64/65 as UART1 */
#else
-#define NPCX_UART_MODULE2 0 /* 0:GPIO10/11 as UART1 */
+#define NPCX_UART_MODULE2 0 /* 0:GPIO10/11 as UART1 */
#endif
-#define NPCX_JTAG_MODULE2 0 /* 0:GPIO21/17/16/20 1:GPIOD5/E2/D4/E5 as JTAG */
-#define NPCX_TACH_SEL2 0 /* 0:GPIO40/73 1:GPIO93/A6 as TACH */
-#define NPCX7_PWM1_SEL 0 /* 0:GPIOC2 as I2CSCL0 1:as PWM1 (only in npcx7) */
+#define NPCX_JTAG_MODULE2 0 /* 0:GPIO21/17/16/20 1:GPIOD5/E2/D4/E5 as JTAG */
+#define NPCX_TACH_SEL2 0 /* 0:GPIO40/73 1:GPIO93/A6 as TACH */
+#define NPCX7_PWM1_SEL 0 /* 0:GPIOC2 as I2CSCL0 1:as PWM1 (only in npcx7) */
#ifndef __ASSEMBLER__
diff --git a/board/npcx7_evb/build.mk b/board/npcx7_evb/build.mk
index 4bd829202c..e51c3bdc5c 100644
--- a/board/npcx7_evb/build.mk
+++ b/board/npcx7_evb/build.mk
@@ -1,5 +1,5 @@
# -*- makefile -*-
-# Copyright 2017 The Chromium OS Authors. All rights reserved.
+# Copyright 2017 The ChromiumOS Authors
# Use of this source code is governed by a BSD-style license that can be
# found in the LICENSE file.
#
diff --git a/board/npcx7_evb/ec.tasklist b/board/npcx7_evb/ec.tasklist
index 88b5ffaa62..24e3b42d7c 100644
--- a/board/npcx7_evb/ec.tasklist
+++ b/board/npcx7_evb/ec.tasklist
@@ -1,4 +1,4 @@
-/* Copyright 2017 The Chromium OS Authors. All rights reserved.
+/* Copyright 2017 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
diff --git a/board/npcx7_evb/gpio.inc b/board/npcx7_evb/gpio.inc
index 145a48de85..b8cfa1d8d5 100644
--- a/board/npcx7_evb/gpio.inc
+++ b/board/npcx7_evb/gpio.inc
@@ -1,6 +1,6 @@
/* -*- mode:c -*-
*
- * Copyright 2017 The Chromium OS Authors. All rights reserved.
+ * Copyright 2017 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
View Lorry Controller Status