diff options
Diffstat (limited to 'board/npcx9_evb/board.h')
| -rw-r--r-- | board/npcx9_evb/board.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/board/npcx9_evb/board.h b/board/npcx9_evb/board.h index a0d209c938..681e36157a 100644 --- a/board/npcx9_evb/board.h +++ b/board/npcx9_evb/board.h @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -14,8 +14,8 @@ #define CONFIG_I2C /* Features of eSPI */ #define CONFIG_HOST_INTERFACE_ESPI -#define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 -#define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 +#define CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S3 +#define CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S4 /* Optional features */ #define CONFIG_ENABLE_JTAG_SELECTION @@ -25,9 +25,9 @@ #define CONFIG_I2C_CONTROLLER #define CONFIG_KEYBOARD_PROTOCOL_8042 -#undef CONFIG_LOW_POWER_IDLE /* Deep Sleep Support */ +#undef CONFIG_LOW_POWER_IDLE /* Deep Sleep Support */ #define CONFIG_POWER_BUTTON -#undef CONFIG_PSTORE +#undef CONFIG_PSTORE #define CONFIG_PWM_KBLIGHT #define CONFIG_VBOOT_HASH #define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands */ @@ -43,14 +43,14 @@ /* I2C port for CONFIG_CMD_I2CWEDGE */ #define I2C_PORT_MASTER NPCX_I2C_PORT0_0 -#define I2C_PORT_HOST 0 +#define I2C_PORT_HOST 0 /* Fans for testing */ #define CONFIG_FANS 1 #define CONFIG_TEMP_SENSOR #define CONFIG_TEMP_SENSOR_TMP112 -#define I2C_PORT_THERMAL NPCX_I2C_PORT2_0 +#define I2C_PORT_THERMAL NPCX_I2C_PORT2_0 #define CONFIG_KEYBOARD_KSO_HIGH_DRIVE /* Quasi-bidirectional buf for KSOs */ #define CONFIG_HIBERNATE_PSL /* Use PSL (Power Switch Logic) for hibernate */ @@ -60,15 +60,15 @@ /* Select which UART Controller is the Console UART */ #undef CONFIG_CONSOLE_UART -#define CONFIG_CONSOLE_UART 0 /* 0:UART1 1:UART2 */ +#define CONFIG_CONSOLE_UART 0 /* 0:UART1 1:UART2 */ /* * This definition below actually doesn't define which UART controller to be * used. Instead, it defines which pinouts (GPIO10/11 or GPIO64/65) are * connected to "UART1" controller. */ -#define NPCX_UART_MODULE2 1 /* 1:GPIO64/65 as UART1 */ -#define NPCX_TACH_SEL2 0 /* 0:GPIO40/73 1:GPIO93/A6 as TACH */ -#define NPCX9_PWM1_SEL 0 /* 0:GPIOC2 as I2CSCL0 1:as PWM1 */ +#define NPCX_UART_MODULE2 1 /* 1:GPIO64/65 as UART1 */ +#define NPCX_TACH_SEL2 0 /* 0:GPIO40/73 1:GPIO93/A6 as TACH */ +#define NPCX9_PWM1_SEL 0 /* 0:GPIOC2 as I2CSCL0 1:as PWM1 */ #ifndef __ASSEMBLER__ @@ -94,7 +94,7 @@ enum tmp112_sensor { }; enum temp_sensor_id { - TEMP_SENSOR_SYSTHERM0, /* TMP100 */ + TEMP_SENSOR_SYSTHERM0, /* TMP100 */ TEMP_SENSOR_COUNT }; |