diff options
Diffstat (limited to 'board/npcx_evb_arm')
-rw-r--r-- | board/npcx_evb_arm/board.c | 110 | ||||
-rw-r--r-- | board/npcx_evb_arm/board.h | 93 | ||||
-rw-r--r-- | board/npcx_evb_arm/build.mk | 15 | ||||
-rw-r--r-- | board/npcx_evb_arm/ec.tasklist | 13 | ||||
-rw-r--r-- | board/npcx_evb_arm/gpio.inc | 92 |
5 files changed, 0 insertions, 323 deletions
diff --git a/board/npcx_evb_arm/board.c b/board/npcx_evb_arm/board.c deleted file mode 100644 index 4ee03e7a00..0000000000 --- a/board/npcx_evb_arm/board.c +++ /dev/null @@ -1,110 +0,0 @@ -/* Copyright 2015 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -/* EC for Nuvoton M4 EB configuration */ - -#include "adc.h" -#include "backlight.h" -#include "chipset.h" -#include "common.h" -#include "driver/temp_sensor/tmp006.h" -#include "extpower.h" -#include "fan.h" -#include "fan_chip.h" -#include "gpio.h" -#include "i2c.h" -#include "keyboard_scan.h" -#include "lid_switch.h" -#include "peci.h" -#include "power.h" -#include "power_button.h" -#include "pwm.h" -#include "pwm_chip.h" -#include "registers.h" -#include "switch.h" -#include "temp_sensor.h" -#include "temp_sensor_chip.h" -#include "timer.h" -#include "thermal.h" -#include "util.h" -#include "shi_chip.h" - -#include "gpio_list.h" - -/******************************************************************************/ -/* ADC channels. Must be in the exactly same order as in enum adc_channel. */ -const struct adc_t adc_channels[] = { - [ADC_CH_0] = {"ADC0", NPCX_ADC_CH0, ADC_MAX_VOLT, ADC_READ_MAX+1, 0}, - [ADC_CH_1] = {"ADC1", NPCX_ADC_CH1, ADC_MAX_VOLT, ADC_READ_MAX+1, 0}, - [ADC_CH_2] = {"ADC2", NPCX_ADC_CH2, ADC_MAX_VOLT, ADC_READ_MAX+1, 0}, -}; -BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); - -/******************************************************************************/ -/* PWM channels. Must be in the exactly same order as in enum pwm_channel. */ -const struct pwm_t pwm_channels[] = { - [PWM_CH_FAN] = { 0, PWM_CONFIG_OPEN_DRAIN, 25000}, - [PWM_CH_KBLIGHT] = { 1, 0, 10000 }, -}; -BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); - -/******************************************************************************/ -/* Physical fans. These are logically separate from pwm_channels. */ -const struct fan_conf fan_conf_0 = { - .flags = FAN_USE_RPM_MODE, - .ch = 0, /* Use MFT id to control fan */ - .pgood_gpio = GPIO_PGOOD_FAN, - .enable_gpio = -1, -}; - -const struct fan_rpm fan_rpm_0 = { - .rpm_min = 1000, - .rpm_start = 1000, - .rpm_max = 5200, -}; - -const struct fan_t fans[] = { - [FAN_CH_0] = { .conf = &fan_conf_0, .rpm = &fan_rpm_0, }, -}; -BUILD_ASSERT(ARRAY_SIZE(fans) == FAN_CH_COUNT); - -/******************************************************************************/ -/* MFT channels. These are logically separate from pwm_channels. */ -const struct mft_t mft_channels[] = { - [MFT_CH_0] = { NPCX_MFT_MODULE_1, TCKC_LFCLK, PWM_CH_FAN}, -}; -BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT); - -/******************************************************************************/ -/* I2C ports */ -const struct i2c_port_t i2c_ports[] = { - {"master0-0", NPCX_I2C_PORT0_0, 100, GPIO_I2C0_SCL0, GPIO_I2C0_SDA0}, - {"master0-1", NPCX_I2C_PORT0_1, 100, GPIO_I2C0_SCL1, GPIO_I2C0_SDA1}, - {"master1", NPCX_I2C_PORT1, 100, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"master2", NPCX_I2C_PORT2, 100, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, - {"master3", NPCX_I2C_PORT3, 100, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, -}; -const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); - -/******************************************************************************/ -/* Wake-up pins for hibernate */ -const enum gpio_signal hibernate_wake_pins[] = { - GPIO_POWER_BUTTON_L, -}; -const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); - -/******************************************************************************/ -/* Keyboard scan setting */ -__override struct keyboard_scan_config keyscan_config = { - .output_settle_us = 40, - .debounce_down_us = 6 * MSEC, - .debounce_up_us = 30 * MSEC, - .scan_period_us = 1500, - .min_post_scan_delay_us = 1000, - .poll_timeout_us = SECOND, - .actual_key_mask = { - 0x14, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff, - 0xa4, 0xff, 0xf6, 0x55, 0xfa, 0xc8 /* full set */ - }, -}; diff --git a/board/npcx_evb_arm/board.h b/board/npcx_evb_arm/board.h deleted file mode 100644 index c3fd341365..0000000000 --- a/board/npcx_evb_arm/board.h +++ /dev/null @@ -1,93 +0,0 @@ -/* Copyright 2015 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Configuration for Nuvoton M4 EB */ - -#ifndef __CROS_EC_BOARD_H -#define __CROS_EC_BOARD_H - -/* Optional modules */ -#define CONFIG_ADC -#define CONFIG_PWM -#define CONFIG_HOSTCMD_SHI /* Used in ARM-based platform for host interface */ - -/* Optional features */ -#define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands for testing */ -#define CONFIG_FLASH_SIZE_BYTES 0x00800000 /* 8MB spi flash */ -#define CONFIG_SPI_FLASH_REGS -#define CONFIG_SPI_FLASH_W25Q64 -#define CONFIG_I2C -#define CONFIG_I2C_CONTROLLER - -#define CONFIG_KEYBOARD_PROTOCOL_MKBP /* Instead of 8042 protocol of keyboard */ -#define CONFIG_MKBP_USE_GPIO -#define CONFIG_POWER_BUTTON -#define CONFIG_VBOOT_HASH -#define CONFIG_PWM_KBLIGHT -#define CONFIG_BOARD_VERSION_GPIO -#define CONFIG_ENABLE_JTAG_SELECTION - -/* Optional features for test commands */ -#define CONFIG_CMD_TASKREADY -#define CONFIG_CMD_STACKOVERFLOW -#define CONFIG_CMD_JUMPTAGS -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_SPI_FLASH -#define CONFIG_CMD_SCRATCHPAD -#define CONFIG_CMD_I2CWEDGE - -#define CONFIG_UART_HOST 0 -#define CONFIG_FANS 1 - -/* Optional feature - used by nuvoton */ -#define NPCX_UART_MODULE2 0 /* 0:GPIO10/11 1:GPIO64/65 as UART */ -#define NPCX_JTAG_MODULE2 0 /* 0:GPIO21/17/16/20 1:GPIOD5/E2/D4/E5 as JTAG*/ -#define NPCX_TACH_SEL2 0 /* 0:GPIO40/73 1:GPIO93/A6 as TACH */ -/* Enable SHI PU on transition to S0. Disable the PU otherwise for leakage. */ -#define NPCX_SHI_CS_PU -/* Enable bypass since shi outputs invalid data when across 256B boundary */ -#define NPCX_SHI_BYPASS_OVER_256B - -/* Optional for testing */ -#undef CONFIG_PSTORE -#undef CONFIG_LOW_POWER_IDLE /* Deep Sleep Support */ - -/* Single I2C port, where the EC is the master. */ -#define I2C_PORT_MASTER NPCX_I2C_PORT0_0 -#define I2C_PORT_HOST 0 - -#ifndef __ASSEMBLER__ - -enum adc_channel { - ADC_CH_0 = 0, - ADC_CH_1, - ADC_CH_2, - ADC_CH_COUNT -}; - -enum pwm_channel { - PWM_CH_FAN, - PWM_CH_KBLIGHT, - /* Number of PWM channels */ - PWM_CH_COUNT -}; - -enum fan_channel { - FAN_CH_0, - /* Number of FAN channels */ - FAN_CH_COUNT -}; - -enum mft_channel { - MFT_CH_0, - /* Number of MFT channels */ - MFT_CH_COUNT -}; - -#include "gpio_signal.h" - -#endif /* !__ASSEMBLER__ */ - -#endif /* __CROS_EC_BOARD_H */ diff --git a/board/npcx_evb_arm/build.mk b/board/npcx_evb_arm/build.mk deleted file mode 100644 index 48116c5454..0000000000 --- a/board/npcx_evb_arm/build.mk +++ /dev/null @@ -1,15 +0,0 @@ -# -*- makefile -*- -# Copyright 2015 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. -# -# Board specific files build -# - -# the IC is Nuvoton NPCX5 M-Series EC (npcx5m5g, npcx5m6g) - -CHIP:=npcx -CHIP_FAMILY:=npcx5 -CHIP_VARIANT:=npcx5m5g - -board-y=board.o diff --git a/board/npcx_evb_arm/ec.tasklist b/board/npcx_evb_arm/ec.tasklist deleted file mode 100644 index a014b86350..0000000000 --- a/board/npcx_evb_arm/ec.tasklist +++ /dev/null @@ -1,13 +0,0 @@ -/* Copyright 2015 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/** - * See CONFIG_TASK_LIST in config.h for details. - */ -#define CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(HOSTCMD, host_command_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) diff --git a/board/npcx_evb_arm/gpio.inc b/board/npcx_evb_arm/gpio.inc deleted file mode 100644 index 1cdda98300..0000000000 --- a/board/npcx_evb_arm/gpio.inc +++ /dev/null @@ -1,92 +0,0 @@ -/* -*- mode:c -*- - * - * Copyright 2015 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Declare symbolic names for all the GPIOs that we care about. - * Note: Those with interrupt handlers must be declared first. */ - -/********************** Inputs with interrupt handlers **********************/ -/* TODO: Redefine debug 2 inputs */ -GPIO_INT(RECOVERY_L, PIN(0, 0), GPIO_PULL_UP | GPIO_INT_BOTH, switch_interrupt) /* Recovery signal from servo */ -GPIO_INT(WP_L, PIN(9, 3), GPIO_PULL_UP | GPIO_INT_BOTH, switch_interrupt) /* Write protect input */ -/* Used for ARM based platform */ -GPIO_INT(SHI_CS_L, PIN(5, 3), GPIO_INT_FALLING,shi_cs_event) /* SHI CS Ready, Low Active. */ -/* For testing keyboard commands, we need the following 4 GPIOs */ -/* TODO: Redefine 4 inputs */ -GPIO_INT(POWER_BUTTON_L, PIN(0, 2), GPIO_PULL_UP | GPIO_INT_BOTH, power_button_interrupt) /* Power button */ -GPIO_INT(LID_OPEN, PIN(3, 3), GPIO_PULL_DOWN | GPIO_INT_BOTH, lid_interrupt) /* Lid switch */ - -/**************************** Need a empty line between GPIO_INT and GPIO ****************************/ -#ifdef CONFIG_TEST_1P8V -GPIO(ENTERING_RW, PIN(3, 6), GPIO_ODR_LOW | GPIO_SEL_1P8V) /* Indicate when EC is entering RW code */ -#else -GPIO(ENTERING_RW, PIN(3, 6), GPIO_OUT_LOW ) /* Indicate when EC is entering RW code */ -#endif -GPIO(PCH_WAKE_L, PIN(5, 0), GPIO_OUT_HIGH) /* Wake signal output to PCH */ -/* For testing keyboard mkbp */ -GPIO(EC_INT_L, PIN(7, 4), GPIO_ODR_HIGH) /* Interrupt pin for keyboard mkbp */ -/* Used for module testing */ -GPIO(PGOOD_FAN, PIN(C, 7), GPIO_PULL_UP | GPIO_INPUT) /* Power Good for FAN test */ - -/* - * I2C pins should be configured as inputs until I2C module is - * initialized. This will avoid driving the lines unintentionally. - */ -#ifdef CONFIG_TEST_1P8V -GPIO(I2C0_SCL0, PIN(B, 5), GPIO_ODR_HIGH | GPIO_SEL_1P8V) -GPIO(I2C0_SDA0, PIN(B, 4), GPIO_ODR_HIGH | GPIO_SEL_1P8V) -#else -GPIO(I2C0_SCL0, PIN(B, 5), GPIO_ODR_HIGH) -GPIO(I2C0_SDA0, PIN(B, 4), GPIO_ODR_HIGH) -#endif -GPIO(I2C0_SCL1, PIN(B, 3), GPIO_ODR_HIGH) -GPIO(I2C0_SDA1, PIN(B, 2), GPIO_ODR_HIGH) -GPIO(I2C1_SCL, PIN(9, 0), GPIO_ODR_HIGH) -GPIO(I2C1_SDA, PIN(8, 7), GPIO_ODR_HIGH) -GPIO(I2C2_SCL, PIN(9, 2), GPIO_ODR_HIGH) -GPIO(I2C2_SDA, PIN(9, 1), GPIO_ODR_HIGH) -GPIO(I2C3_SCL, PIN(D, 1), GPIO_ODR_HIGH) -GPIO(I2C3_SDA, PIN(D, 0), GPIO_ODR_HIGH) - -/* Used for board version command */ -GPIO(BOARD_VERSION1, PIN(6, 4), GPIO_INPUT) /* Board version stuffing resistor 1 */ -GPIO(BOARD_VERSION2, PIN(6, 5), GPIO_INPUT) /* Board version stuffing resistor 2 */ -GPIO(BOARD_VERSION3, PIN(6, 6), GPIO_INPUT) /* Board version stuffing resistor 3 */ - -/**************************** Alternate pins for UART/I2C/ADC/SPI/PWM/MFT ****************************/ -/* Alternate pins for UART/I2C/ADC/SPI/PWM/MFT */ -#if NPCX_UART_MODULE2 -ALTERNATE(PIN_MASK(6, 0x30), 1, MODULE_UART, 0) /* CR_SIN/SOUT GPIO64/65 */ -#else -ALTERNATE(PIN_MASK(1, 0x03), 1, MODULE_UART, 0) /* CR_SIN/SOUT GPIO10/11 */ -#endif -ALTERNATE(PIN_MASK(B, 0x0C), 1, MODULE_I2C, 0) /* I2C0SDA1/I2C0SCL1 GPIOB2/B3 */ -ALTERNATE(PIN_MASK(B, 0x30), 1, MODULE_I2C, 0) /* I2C0SDA0/I2C0SCL0 GPIOB4/B5 */ -ALTERNATE(PIN_MASK(8, 0x80), 1, MODULE_I2C, 0) /* I2C1SDA GPIO87 */ -ALTERNATE(PIN_MASK(9, 0x07), 1, MODULE_I2C, 0) /* I2C1SCL/I2C2SDA/I2C2SCL GPIO90/91/92 */ -ALTERNATE(PIN_MASK(D, 0x03), 1, MODULE_I2C, 0) /* I2C3SDA/I2C3SCL GPIOD0/D1 */ -ALTERNATE(PIN_MASK(4, 0x38), 1, MODULE_ADC, 0) /* ADC GPIO45/44/43 */ -ALTERNATE(PIN_MASK(A, 0x0A), 1, MODULE_SPI, 0) /* SPIP_MOSI/SPIP_SCLK GPIOA3/A1 */ -ALTERNATE(PIN_MASK(9, 0x20), 1, MODULE_SPI, 0) /* SPIP_MISO GPIO95 */ -ALTERNATE(PIN_MASK(C, 0x04), 1, MODULE_PWM, 0) /* PWM1 for PWM/KBLIGHT Test GPIOC2 */ -/* Alternative functionality for FANS */ -#ifdef CONFIG_FANS -ALTERNATE(PIN_MASK(C, 0x08), 1, MODULE_PWM, 0) /* PWM0 for PWM/FAN Test GPIOC3 */ -#if NPCX_TACH_SEL2 -ALTERNATE(PIN_MASK(9, 0x08), 1, MODULE_PWM, 0) /* MFT-1/TA1_TACH1 for FAN GPIO93 */ -#else -ALTERNATE(PIN_MASK(4, 0x01), 1, MODULE_PWM, 0) /* MFT-1/TA1_TACH1 for FAN Test GPIO40 */ -#endif -#endif - -/* Keyboard Columns */ -ALTERNATE(PIN_MASK(0, 0xE0), 0, MODULE_KEYBOARD_SCAN, 0) -ALTERNATE(PIN_MASK(1, 0xFF), 0, MODULE_KEYBOARD_SCAN, 0) -ALTERNATE(PIN_MASK(2, 0x03), 0, MODULE_KEYBOARD_SCAN, 0) - -/* Keyboard Rows */ -ALTERNATE(PIN_MASK(2, 0xFC), 0, MODULE_KEYBOARD_SCAN, 0) -ALTERNATE(PIN_MASK(3, 0x03), 0, MODULE_KEYBOARD_SCAN, 0) |