diff options
Diffstat (limited to 'board/servo_micro')
| -rw-r--r-- | board/servo_micro/board.c | 158 | ||||
| -rw-r--r-- | board/servo_micro/board.h | 49 | ||||
| -rw-r--r-- | board/servo_micro/build.mk | 2 | ||||
| -rw-r--r-- | board/servo_micro/ccd.md | 2 | ||||
| -rw-r--r-- | board/servo_micro/ec.tasklist | 2 | ||||
| -rw-r--r-- | board/servo_micro/gpio.inc | 2 |
6 files changed, 91 insertions, 124 deletions
diff --git a/board/servo_micro/board.c b/board/servo_micro/board.c index f82376a15a..b51c522277 100644 --- a/board/servo_micro/board.c +++ b/board/servo_micro/board.c @@ -1,4 +1,4 @@ -/* Copyright 2016 The Chromium OS Authors. All rights reserved. +/* Copyright 2016 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -45,21 +45,20 @@ void board_config_pre_init(void) * i2c : no dma * tim16/17: no dma */ - STM32_SYSCFG_CFGR1 |= BIT(26); /* Remap USART3 RX/TX DMA */ + STM32_SYSCFG_CFGR1 |= BIT(26); /* Remap USART3 RX/TX DMA */ /* Remap SPI2 to DMA channels 6 and 7 */ /* STM32F072 SPI2 defaults to using DMA channels 4 and 5 */ /* but cros_ec hardcodes a 6/7 assumption in registers.h */ STM32_SYSCFG_CFGR1 |= BIT(24); - } /****************************************************************************** * Forward UARTs as a USB serial interface. */ -#define USB_STREAM_RX_SIZE 32 -#define USB_STREAM_TX_SIZE 64 +#define USB_STREAM_RX_SIZE 32 +#define USB_STREAM_TX_SIZE 64 /****************************************************************************** * Forward USART2 (EC) as a simple USB serial interface. @@ -68,33 +67,22 @@ void board_config_pre_init(void) static struct usart_config const usart2; struct usb_stream_config const usart2_usb; -static struct queue const usart2_to_usb = QUEUE_DIRECT(1024, uint8_t, - usart2.producer, usart2_usb.consumer); -static struct queue const usb_to_usart2 = QUEUE_DIRECT(64, uint8_t, - usart2_usb.producer, usart2.consumer); +static struct queue const usart2_to_usb = + QUEUE_DIRECT(1024, uint8_t, usart2.producer, usart2_usb.consumer); +static struct queue const usb_to_usart2 = + QUEUE_DIRECT(64, uint8_t, usart2_usb.producer, usart2.consumer); static struct usart_rx_dma const usart2_rx_dma = USART_RX_DMA(STM32_DMAC_CH5, 32); static struct usart_config const usart2 = - USART_CONFIG(usart2_hw, - usart2_rx_dma.usart_rx, - usart_tx_interrupt, - 115200, - 0, - usart2_to_usb, - usb_to_usart2); - -USB_STREAM_CONFIG_USART_IFACE(usart2_usb, - USB_IFACE_USART2_STREAM, - USB_STR_USART2_STREAM_NAME, - USB_EP_USART2_STREAM, - USB_STREAM_RX_SIZE, - USB_STREAM_TX_SIZE, - usb_to_usart2, - usart2_to_usb, - usart2) + USART_CONFIG(usart2_hw, usart2_rx_dma.usart_rx, usart_tx_interrupt, + 115200, 0, usart2_to_usb, usb_to_usart2); +USB_STREAM_CONFIG_USART_IFACE(usart2_usb, USB_IFACE_USART2_STREAM, + USB_STR_USART2_STREAM_NAME, USB_EP_USART2_STREAM, + USB_STREAM_RX_SIZE, USB_STREAM_TX_SIZE, + usb_to_usart2, usart2_to_usb, usart2) /****************************************************************************** * Forward USART3 (CPU) as a simple USB serial interface. @@ -103,33 +91,22 @@ USB_STREAM_CONFIG_USART_IFACE(usart2_usb, static struct usart_config const usart3; struct usb_stream_config const usart3_usb; -static struct queue const usart3_to_usb = QUEUE_DIRECT(1024, uint8_t, - usart3.producer, usart3_usb.consumer); -static struct queue const usb_to_usart3 = QUEUE_DIRECT(64, uint8_t, - usart3_usb.producer, usart3.consumer); +static struct queue const usart3_to_usb = + QUEUE_DIRECT(1024, uint8_t, usart3.producer, usart3_usb.consumer); +static struct queue const usb_to_usart3 = + QUEUE_DIRECT(64, uint8_t, usart3_usb.producer, usart3.consumer); static struct usart_rx_dma const usart3_rx_dma = USART_RX_DMA(STM32_DMAC_CH3, 32); static struct usart_config const usart3 = - USART_CONFIG(usart3_hw, - usart3_rx_dma.usart_rx, - usart_tx_interrupt, - 115200, - 0, - usart3_to_usb, - usb_to_usart3); - -USB_STREAM_CONFIG_USART_IFACE(usart3_usb, - USB_IFACE_USART3_STREAM, - USB_STR_USART3_STREAM_NAME, - USB_EP_USART3_STREAM, - USB_STREAM_RX_SIZE, - USB_STREAM_TX_SIZE, - usb_to_usart3, - usart3_to_usb, - usart3) + USART_CONFIG(usart3_hw, usart3_rx_dma.usart_rx, usart_tx_interrupt, + 115200, 0, usart3_to_usb, usb_to_usart3); +USB_STREAM_CONFIG_USART_IFACE(usart3_usb, USB_IFACE_USART3_STREAM, + USB_STR_USART3_STREAM_NAME, USB_EP_USART3_STREAM, + USB_STREAM_RX_SIZE, USB_STREAM_TX_SIZE, + usb_to_usart3, usart3_to_usb, usart3) /****************************************************************************** * Forward USART4 (cr50) as a simple USB serial interface. @@ -139,34 +116,24 @@ USB_STREAM_CONFIG_USART_IFACE(usart3_usb, static struct usart_config const usart4; struct usb_stream_config const usart4_usb; -static struct queue const usart4_to_usb = QUEUE_DIRECT(64, uint8_t, - usart4.producer, usart4_usb.consumer); -static struct queue const usb_to_usart4 = QUEUE_DIRECT(64, uint8_t, - usart4_usb.producer, usart4.consumer); +static struct queue const usart4_to_usb = + QUEUE_DIRECT(1024, uint8_t, usart4.producer, usart4_usb.consumer); +static struct queue const usb_to_usart4 = + QUEUE_DIRECT(64, uint8_t, usart4_usb.producer, usart4.consumer); static struct usart_config const usart4 = - USART_CONFIG(usart4_hw, - usart_rx_interrupt, - usart_tx_interrupt, - 115200, - 0, - usart4_to_usb, - usb_to_usart4); - -USB_STREAM_CONFIG_USART_IFACE(usart4_usb, - USB_IFACE_USART4_STREAM, - USB_STR_USART4_STREAM_NAME, - USB_EP_USART4_STREAM, - USB_STREAM_RX_SIZE, - USB_STREAM_TX_SIZE, - usb_to_usart4, - usart4_to_usb, - usart4) + USART_CONFIG(usart4_hw, usart_rx_interrupt, usart_tx_interrupt, 115200, + 0, usart4_to_usb, usb_to_usart4); + +USB_STREAM_CONFIG_USART_IFACE(usart4_usb, USB_IFACE_USART4_STREAM, + USB_STR_USART4_STREAM_NAME, USB_EP_USART4_STREAM, + USB_STREAM_RX_SIZE, USB_STREAM_TX_SIZE, + usb_to_usart4, usart4_to_usb, usart4) /****************************************************************************** * Check parity setting on usarts. */ -static int command_uart_parity(int argc, char **argv) +static int command_uart_parity(int argc, const char **argv) { int parity = 0, newparity; struct usart_config const *usart; @@ -200,14 +167,13 @@ static int command_uart_parity(int argc, char **argv) return EC_SUCCESS; } -DECLARE_CONSOLE_COMMAND(parity, command_uart_parity, - "usart[2|3|4] [0|1|2]", +DECLARE_CONSOLE_COMMAND(parity, command_uart_parity, "usart[2|3|4] [0|1|2]", "Set parity on uart"); /****************************************************************************** * Set baud rate setting on usarts. */ -static int command_uart_baud(int argc, char **argv) +static int command_uart_baud(int argc, const char **argv) { int baud = 0; struct usart_config const *usart; @@ -233,14 +199,13 @@ static int command_uart_baud(int argc, char **argv) return EC_SUCCESS; } -DECLARE_CONSOLE_COMMAND(baud, command_uart_baud, - "usart[2|3|4] rate", +DECLARE_CONSOLE_COMMAND(baud, command_uart_baud, "usart[2|3|4] rate", "Set baud rate on uart"); /****************************************************************************** * Hold the usart pins low while disabling it, or return it to normal. */ -static int command_hold_usart_low(int argc, char **argv) +static int command_hold_usart_low(int argc, const char **argv) { /* Each bit represents if that port rx is being held low */ static int usart_status; @@ -297,7 +262,7 @@ static int command_hold_usart_low(int argc, char **argv) /* Print status for get and set case. */ ccprintf("USART status: %s\n", - usart_status & usart_mask ? "held low" : "normal"); + usart_status & usart_mask ? "held low" : "normal"); return EC_SUCCESS; } @@ -309,18 +274,18 @@ DECLARE_CONSOLE_COMMAND(hold_usart_low, command_hold_usart_low, * Define the strings used in our USB descriptors. */ const void *const usb_strings[] = { - [USB_STR_DESC] = usb_string_desc, - [USB_STR_VENDOR] = USB_STRING_DESC("Google Inc."), - [USB_STR_PRODUCT] = USB_STRING_DESC("Servo Micro"), - [USB_STR_SERIALNO] = 0, - [USB_STR_VERSION] = USB_STRING_DESC(CROS_EC_VERSION32), - [USB_STR_SPI_NAME] = USB_STRING_DESC("SPI"), - [USB_STR_I2C_NAME] = USB_STRING_DESC("I2C"), - [USB_STR_USART4_STREAM_NAME] = USB_STRING_DESC("UART3"), + [USB_STR_DESC] = usb_string_desc, + [USB_STR_VENDOR] = USB_STRING_DESC("Google LLC"), + [USB_STR_PRODUCT] = USB_STRING_DESC("Servo Micro"), + [USB_STR_SERIALNO] = 0, + [USB_STR_VERSION] = USB_STRING_DESC(CROS_EC_VERSION32), + [USB_STR_SPI_NAME] = USB_STRING_DESC("SPI"), + [USB_STR_I2C_NAME] = USB_STRING_DESC("I2C"), + [USB_STR_USART4_STREAM_NAME] = USB_STRING_DESC("UART3"), [USB_STR_CONSOLE_NAME] = USB_STRING_DESC("Servo Shell"), - [USB_STR_USART3_STREAM_NAME] = USB_STRING_DESC("CPU"), - [USB_STR_USART2_STREAM_NAME] = USB_STRING_DESC("EC"), - [USB_STR_UPDATE_NAME] = USB_STRING_DESC("Firmware update"), + [USB_STR_USART3_STREAM_NAME] = USB_STRING_DESC("CPU"), + [USB_STR_USART2_STREAM_NAME] = USB_STRING_DESC("EC"), + [USB_STR_UPDATE_NAME] = USB_STRING_DESC("Firmware update"), }; BUILD_ASSERT(ARRAY_SIZE(usb_strings) == USB_STR_COUNT); @@ -332,7 +297,7 @@ BUILD_ASSERT(ARRAY_SIZE(usb_strings) == USB_STR_COUNT); /* SPI devices */ const struct spi_device_t spi_devices[] = { - { CONFIG_SPI_FLASH_PORT, 1, GPIO_SPI_CS}, + { CONFIG_SPI_FLASH_PORT, 1, GPIO_SPI_CS }, }; const unsigned int spi_devices_used = ARRAY_SIZE(spi_devices); @@ -373,17 +338,18 @@ USB_SPI_CONFIG(usb_spi, USB_IFACE_SPI, USB_EP_SPI, 0); /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - { - .name = "master", - .port = I2C_PORT_MASTER, - .kbps = 100, - .scl = GPIO_MASTER_I2C_SCL, - .sda = GPIO_MASTER_I2C_SDA - }, + { .name = "master", + .port = I2C_PORT_MASTER, + .kbps = 100, + .scl = GPIO_MASTER_I2C_SCL, + .sda = GPIO_MASTER_I2C_SDA }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); -int usb_i2c_board_is_enabled(void) { return 1; } +int usb_i2c_board_is_enabled(void) +{ + return 1; +} /* Configure ITE flash support module */ const struct ite_dfu_config_t ite_dfu_config = { diff --git a/board/servo_micro/board.h b/board/servo_micro/board.h index 1983ee13e3..801b67e07e 100644 --- a/board/servo_micro/board.h +++ b/board/servo_micro/board.h @@ -1,4 +1,4 @@ -/* Copyright 2016 The Chromium OS Authors. All rights reserved. +/* Copyright 2016 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -33,9 +33,10 @@ #define CONFIG_STM_HWTIMER32 #define CONFIG_HW_CRC #define CONFIG_PVD -/* See 'Programmable voltage detector characteristics' in the STM32F072x8 Datasheet. - PVD Threshold 1 corresponds to a falling voltage threshold of min:2.09V, max:2.27V. */ -#define PVD_THRESHOLD (1) +/* See 'Programmable voltage detector characteristics' in the STM32F072x8 + Datasheet. PVD Threshold 1 corresponds to a falling voltage threshold of + min:2.09V, max:2.27V. */ +#define PVD_THRESHOLD (1) /* USB Configuration */ #define CONFIG_USB @@ -50,25 +51,25 @@ #define DEFAULT_SERIALNO "Uninitialized" /* USB interface indexes (use define rather than enum to expand them) */ -#define USB_IFACE_USART4_STREAM 0 -#define USB_IFACE_UPDATE 1 -#define USB_IFACE_SPI 2 -#define USB_IFACE_CONSOLE 3 -#define USB_IFACE_I2C 4 -#define USB_IFACE_USART3_STREAM 5 -#define USB_IFACE_USART2_STREAM 6 -#define USB_IFACE_COUNT 7 +#define USB_IFACE_USART4_STREAM 0 +#define USB_IFACE_UPDATE 1 +#define USB_IFACE_SPI 2 +#define USB_IFACE_CONSOLE 3 +#define USB_IFACE_I2C 4 +#define USB_IFACE_USART3_STREAM 5 +#define USB_IFACE_USART2_STREAM 6 +#define USB_IFACE_COUNT 7 /* USB endpoint indexes (use define rather than enum to expand them) */ -#define USB_EP_CONTROL 0 -#define USB_EP_USART4_STREAM 1 -#define USB_EP_UPDATE 2 -#define USB_EP_SPI 3 -#define USB_EP_CONSOLE 4 -#define USB_EP_I2C 5 -#define USB_EP_USART3_STREAM 6 -#define USB_EP_USART2_STREAM 7 -#define USB_EP_COUNT 8 +#define USB_EP_CONTROL 0 +#define USB_EP_USART4_STREAM 1 +#define USB_EP_UPDATE 2 +#define USB_EP_SPI 3 +#define USB_EP_CONSOLE 4 +#define USB_EP_I2C 5 +#define USB_EP_USART3_STREAM 6 +#define USB_EP_USART2_STREAM 7 +#define USB_EP_COUNT 8 /* Enable console recasting of GPIO type. */ #define CONFIG_CMD_GPIO_EXTENDED @@ -76,7 +77,7 @@ /* Enable control of SPI over USB */ #define CONFIG_USB_SPI #define CONFIG_SPI_CONTROLLER -#define CONFIG_SPI_FLASH_PORT 0 /* First SPI controller port */ +#define CONFIG_SPI_FLASH_PORT 0 /* First SPI controller port */ /* This is not actually an EC so disable some features. */ #undef CONFIG_WATCHDOG_HELP @@ -93,8 +94,8 @@ #define CONFIG_I2C_XFER_LARGE_TRANSFER #undef CONFIG_USB_I2C_MAX_WRITE_COUNT #undef CONFIG_USB_I2C_MAX_READ_COUNT -#define CONFIG_USB_I2C_MAX_WRITE_COUNT ((1<<9) - 4) -#define CONFIG_USB_I2C_MAX_READ_COUNT ((1<<9) - 6) +#define CONFIG_USB_I2C_MAX_WRITE_COUNT ((1 << 9) - 4) +#define CONFIG_USB_I2C_MAX_READ_COUNT ((1 << 9) - 6) /* * Allow dangerous commands all the time, since we don't have a write protect diff --git a/board/servo_micro/build.mk b/board/servo_micro/build.mk index 0e069a31ad..7ac70706fc 100644 --- a/board/servo_micro/build.mk +++ b/board/servo_micro/build.mk @@ -1,5 +1,5 @@ # -*- makefile -*- -# Copyright 2016 The Chromium OS Authors. All rights reserved. +# Copyright 2016 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. # diff --git a/board/servo_micro/ccd.md b/board/servo_micro/ccd.md index 267da66776..2398e1dd46 100644 --- a/board/servo_micro/ccd.md +++ b/board/servo_micro/ccd.md @@ -1,5 +1,5 @@ <!-- - Copyright 2018 The Chromium OS Authors. All rights reserved. + Copyright 2018 The ChromiumOS Authors Use of this source code is governed by a BSD-style license that can be found in the LICENSE file. --> diff --git a/board/servo_micro/ec.tasklist b/board/servo_micro/ec.tasklist index c1fb169118..c45a1e89a7 100644 --- a/board/servo_micro/ec.tasklist +++ b/board/servo_micro/ec.tasklist @@ -1,4 +1,4 @@ -/* Copyright 2016 The Chromium OS Authors. All rights reserved. +/* Copyright 2016 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/board/servo_micro/gpio.inc b/board/servo_micro/gpio.inc index 10e411c5f2..ad1739f1e6 100644 --- a/board/servo_micro/gpio.inc +++ b/board/servo_micro/gpio.inc @@ -1,6 +1,6 @@ /* -*- mode:c -*- * - * Copyright 2016 The Chromium OS Authors. All rights reserved. + * Copyright 2016 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ |